m5249.c 2.9 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5249/config.c
  4. *
  5. * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. #include <asm/mcfclk.h>
  17. /***************************************************************************/
  18. DEFINE_CLK(pll, "pll.0", MCF_CLK);
  19. DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
  20. DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
  21. DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
  22. DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
  23. DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
  24. struct clk *mcf_clks[] = {
  25. &clk_pll,
  26. &clk_sys,
  27. &clk_mcftmr0,
  28. &clk_mcftmr1,
  29. &clk_mcfuart0,
  30. &clk_mcfuart1,
  31. NULL
  32. };
  33. /***************************************************************************/
  34. #ifdef CONFIG_M5249C3
  35. static struct resource m5249_smc91x_resources[] = {
  36. {
  37. .start = 0xe0000300,
  38. .end = 0xe0000300 + 0x100,
  39. .flags = IORESOURCE_MEM,
  40. },
  41. {
  42. .start = MCF_IRQ_GPIO6,
  43. .end = MCF_IRQ_GPIO6,
  44. .flags = IORESOURCE_IRQ,
  45. },
  46. };
  47. static struct platform_device m5249_smc91x = {
  48. .name = "smc91x",
  49. .id = 0,
  50. .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
  51. .resource = m5249_smc91x_resources,
  52. };
  53. #endif /* CONFIG_M5249C3 */
  54. static struct platform_device *m5249_devices[] __initdata = {
  55. #ifdef CONFIG_M5249C3
  56. &m5249_smc91x,
  57. #endif
  58. };
  59. /***************************************************************************/
  60. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  61. static void __init m5249_qspi_init(void)
  62. {
  63. /* QSPI irq setup */
  64. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
  65. MCFSIM_QSPIICR);
  66. mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
  67. }
  68. #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
  69. /***************************************************************************/
  70. #ifdef CONFIG_M5249C3
  71. static void __init m5249_smc91x_init(void)
  72. {
  73. u32 gpio;
  74. /* Set the GPIO line as interrupt source for smc91x device */
  75. gpio = readl(MCFSIM2_GPIOINTENABLE);
  76. writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE);
  77. gpio = readl(MCFINTC2_INTPRI5);
  78. writel(gpio | 0x04000000, MCFINTC2_INTPRI5);
  79. }
  80. #endif /* CONFIG_M5249C3 */
  81. /***************************************************************************/
  82. void __init config_BSP(char *commandp, int size)
  83. {
  84. mach_sched_init = hw_timer_init;
  85. #ifdef CONFIG_M5249C3
  86. m5249_smc91x_init();
  87. #endif
  88. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  89. m5249_qspi_init();
  90. #endif
  91. }
  92. /***************************************************************************/
  93. static int __init init_BSP(void)
  94. {
  95. platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
  96. return 0;
  97. }
  98. arch_initcall(init_BSP);
  99. /***************************************************************************/