process.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454
  1. /*
  2. * Blackfin architecture-dependent process handling
  3. *
  4. * Copyright 2004-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/module.h>
  9. #include <linux/unistd.h>
  10. #include <linux/user.h>
  11. #include <linux/uaccess.h>
  12. #include <linux/slab.h>
  13. #include <linux/sched.h>
  14. #include <linux/tick.h>
  15. #include <linux/fs.h>
  16. #include <linux/err.h>
  17. #include <asm/blackfin.h>
  18. #include <asm/fixed_code.h>
  19. #include <asm/mem_map.h>
  20. #include <asm/irq.h>
  21. asmlinkage void ret_from_fork(void);
  22. /* Points to the SDRAM backup memory for the stack that is currently in
  23. * L1 scratchpad memory.
  24. */
  25. void *current_l1_stack_save;
  26. /* The number of tasks currently using a L1 stack area. The SRAM is
  27. * allocated/deallocated whenever this changes from/to zero.
  28. */
  29. int nr_l1stack_tasks;
  30. /* Start and length of the area in L1 scratchpad memory which we've allocated
  31. * for process stacks.
  32. */
  33. void *l1_stack_base;
  34. unsigned long l1_stack_len;
  35. void (*pm_power_off)(void) = NULL;
  36. EXPORT_SYMBOL(pm_power_off);
  37. /*
  38. * The idle loop on BFIN
  39. */
  40. #ifdef CONFIG_IDLE_L1
  41. static void default_idle(void)__attribute__((l1_text));
  42. void cpu_idle(void)__attribute__((l1_text));
  43. #endif
  44. /*
  45. * This is our default idle handler. We need to disable
  46. * interrupts here to ensure we don't miss a wakeup call.
  47. */
  48. static void default_idle(void)
  49. {
  50. #ifdef CONFIG_IPIPE
  51. ipipe_suspend_domain();
  52. #endif
  53. hard_local_irq_disable();
  54. if (!need_resched())
  55. idle_with_irq_disabled();
  56. hard_local_irq_enable();
  57. }
  58. /*
  59. * The idle thread. We try to conserve power, while trying to keep
  60. * overall latency low. The architecture specific idle is passed
  61. * a value to indicate the level of "idleness" of the system.
  62. */
  63. void cpu_idle(void)
  64. {
  65. /* endless idle loop with no priority at all */
  66. while (1) {
  67. #ifdef CONFIG_HOTPLUG_CPU
  68. if (cpu_is_offline(smp_processor_id()))
  69. cpu_die();
  70. #endif
  71. tick_nohz_idle_enter();
  72. rcu_idle_enter();
  73. while (!need_resched())
  74. default_idle();
  75. rcu_idle_exit();
  76. tick_nohz_idle_exit();
  77. preempt_enable_no_resched();
  78. schedule();
  79. preempt_disable();
  80. }
  81. }
  82. /*
  83. * Do necessary setup to start up a newly executed thread.
  84. *
  85. * pass the data segment into user programs if it exists,
  86. * it can't hurt anything as far as I can tell
  87. */
  88. void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
  89. {
  90. regs->pc = new_ip;
  91. if (current->mm)
  92. regs->p5 = current->mm->start_data;
  93. #ifndef CONFIG_SMP
  94. task_thread_info(current)->l1_task_info.stack_start =
  95. (void *)current->mm->context.stack_start;
  96. task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
  97. memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
  98. sizeof(*L1_SCRATCH_TASK_INFO));
  99. #endif
  100. wrusp(new_sp);
  101. }
  102. EXPORT_SYMBOL_GPL(start_thread);
  103. void flush_thread(void)
  104. {
  105. }
  106. asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp)
  107. {
  108. #ifdef __ARCH_SYNC_CORE_DCACHE
  109. if (current->nr_cpus_allowed == num_possible_cpus())
  110. set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
  111. #endif
  112. if (newsp)
  113. newsp -= 12;
  114. return do_fork(clone_flags, newsp, 0, NULL, NULL);
  115. }
  116. int
  117. copy_thread(unsigned long clone_flags,
  118. unsigned long usp, unsigned long topstk,
  119. struct task_struct *p)
  120. {
  121. struct pt_regs *childregs;
  122. unsigned long *v;
  123. childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
  124. v = ((unsigned long *)childregs) - 2;
  125. if (unlikely(p->flags & PF_KTHREAD)) {
  126. memset(childregs, 0, sizeof(struct pt_regs));
  127. v[0] = usp;
  128. v[1] = topstk;
  129. childregs->orig_p0 = -1;
  130. childregs->ipend = 0x8000;
  131. __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):);
  132. p->thread.usp = 0;
  133. } else {
  134. *childregs = *current_pt_regs();
  135. childregs->r0 = 0;
  136. p->thread.usp = usp ? : rdusp();
  137. v[0] = v[1] = 0;
  138. }
  139. p->thread.ksp = (unsigned long)v;
  140. p->thread.pc = (unsigned long)ret_from_fork;
  141. return 0;
  142. }
  143. unsigned long get_wchan(struct task_struct *p)
  144. {
  145. unsigned long fp, pc;
  146. unsigned long stack_page;
  147. int count = 0;
  148. if (!p || p == current || p->state == TASK_RUNNING)
  149. return 0;
  150. stack_page = (unsigned long)p;
  151. fp = p->thread.usp;
  152. do {
  153. if (fp < stack_page + sizeof(struct thread_info) ||
  154. fp >= 8184 + stack_page)
  155. return 0;
  156. pc = ((unsigned long *)fp)[1];
  157. if (!in_sched_functions(pc))
  158. return pc;
  159. fp = *(unsigned long *)fp;
  160. }
  161. while (count++ < 16);
  162. return 0;
  163. }
  164. void finish_atomic_sections (struct pt_regs *regs)
  165. {
  166. int __user *up0 = (int __user *)regs->p0;
  167. switch (regs->pc) {
  168. default:
  169. /* not in middle of an atomic step, so resume like normal */
  170. return;
  171. case ATOMIC_XCHG32 + 2:
  172. put_user(regs->r1, up0);
  173. break;
  174. case ATOMIC_CAS32 + 2:
  175. case ATOMIC_CAS32 + 4:
  176. if (regs->r0 == regs->r1)
  177. case ATOMIC_CAS32 + 6:
  178. put_user(regs->r2, up0);
  179. break;
  180. case ATOMIC_ADD32 + 2:
  181. regs->r0 = regs->r1 + regs->r0;
  182. /* fall through */
  183. case ATOMIC_ADD32 + 4:
  184. put_user(regs->r0, up0);
  185. break;
  186. case ATOMIC_SUB32 + 2:
  187. regs->r0 = regs->r1 - regs->r0;
  188. /* fall through */
  189. case ATOMIC_SUB32 + 4:
  190. put_user(regs->r0, up0);
  191. break;
  192. case ATOMIC_IOR32 + 2:
  193. regs->r0 = regs->r1 | regs->r0;
  194. /* fall through */
  195. case ATOMIC_IOR32 + 4:
  196. put_user(regs->r0, up0);
  197. break;
  198. case ATOMIC_AND32 + 2:
  199. regs->r0 = regs->r1 & regs->r0;
  200. /* fall through */
  201. case ATOMIC_AND32 + 4:
  202. put_user(regs->r0, up0);
  203. break;
  204. case ATOMIC_XOR32 + 2:
  205. regs->r0 = regs->r1 ^ regs->r0;
  206. /* fall through */
  207. case ATOMIC_XOR32 + 4:
  208. put_user(regs->r0, up0);
  209. break;
  210. }
  211. /*
  212. * We've finished the atomic section, and the only thing left for
  213. * userspace is to do a RTS, so we might as well handle that too
  214. * since we need to update the PC anyways.
  215. */
  216. regs->pc = regs->rets;
  217. }
  218. static inline
  219. int in_mem(unsigned long addr, unsigned long size,
  220. unsigned long start, unsigned long end)
  221. {
  222. return addr >= start && addr + size <= end;
  223. }
  224. static inline
  225. int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
  226. unsigned long const_addr, unsigned long const_size)
  227. {
  228. return const_size &&
  229. in_mem(addr, size, const_addr + off, const_addr + const_size);
  230. }
  231. static inline
  232. int in_mem_const(unsigned long addr, unsigned long size,
  233. unsigned long const_addr, unsigned long const_size)
  234. {
  235. return in_mem_const_off(addr, size, 0, const_addr, const_size);
  236. }
  237. #ifdef CONFIG_BF60x
  238. #define ASYNC_ENABLED(bnum, bctlnum) 1
  239. #else
  240. #define ASYNC_ENABLED(bnum, bctlnum) \
  241. ({ \
  242. (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
  243. bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
  244. 1; \
  245. })
  246. #endif
  247. /*
  248. * We can't read EBIU banks that aren't enabled or we end up hanging
  249. * on the access to the async space. Make sure we validate accesses
  250. * that cross async banks too.
  251. * 0 - found, but unusable
  252. * 1 - found & usable
  253. * 2 - not found
  254. */
  255. static
  256. int in_async(unsigned long addr, unsigned long size)
  257. {
  258. if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
  259. if (!ASYNC_ENABLED(0, 0))
  260. return 0;
  261. if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
  262. return 1;
  263. size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
  264. addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
  265. }
  266. if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
  267. if (!ASYNC_ENABLED(1, 0))
  268. return 0;
  269. if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
  270. return 1;
  271. size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
  272. addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
  273. }
  274. if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
  275. if (!ASYNC_ENABLED(2, 1))
  276. return 0;
  277. if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
  278. return 1;
  279. size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
  280. addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
  281. }
  282. if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
  283. if (ASYNC_ENABLED(3, 1))
  284. return 0;
  285. if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
  286. return 1;
  287. return 0;
  288. }
  289. /* not within async bounds */
  290. return 2;
  291. }
  292. int bfin_mem_access_type(unsigned long addr, unsigned long size)
  293. {
  294. int cpu = raw_smp_processor_id();
  295. /* Check that things do not wrap around */
  296. if (addr > ULONG_MAX - size)
  297. return -EFAULT;
  298. if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
  299. return BFIN_MEM_ACCESS_CORE;
  300. if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
  301. return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
  302. if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
  303. return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
  304. if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
  305. return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
  306. if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
  307. return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
  308. #ifdef COREB_L1_CODE_START
  309. if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
  310. return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
  311. if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
  312. return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
  313. if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
  314. return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
  315. if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
  316. return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
  317. #endif
  318. if (in_mem_const(addr, size, L2_START, L2_LENGTH))
  319. return BFIN_MEM_ACCESS_CORE;
  320. if (addr >= SYSMMR_BASE)
  321. return BFIN_MEM_ACCESS_CORE_ONLY;
  322. switch (in_async(addr, size)) {
  323. case 0: return -EFAULT;
  324. case 1: return BFIN_MEM_ACCESS_CORE;
  325. case 2: /* fall through */;
  326. }
  327. if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
  328. return BFIN_MEM_ACCESS_CORE;
  329. if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
  330. return BFIN_MEM_ACCESS_DMA;
  331. return -EFAULT;
  332. }
  333. #if defined(CONFIG_ACCESS_CHECK)
  334. #ifdef CONFIG_ACCESS_OK_L1
  335. __attribute__((l1_text))
  336. #endif
  337. /* Return 1 if access to memory range is OK, 0 otherwise */
  338. int _access_ok(unsigned long addr, unsigned long size)
  339. {
  340. int aret;
  341. if (size == 0)
  342. return 1;
  343. /* Check that things do not wrap around */
  344. if (addr > ULONG_MAX - size)
  345. return 0;
  346. if (segment_eq(get_fs(), KERNEL_DS))
  347. return 1;
  348. #ifdef CONFIG_MTD_UCLINUX
  349. if (1)
  350. #else
  351. if (0)
  352. #endif
  353. {
  354. if (in_mem(addr, size, memory_start, memory_end))
  355. return 1;
  356. if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
  357. return 1;
  358. # ifndef CONFIG_ROMFS_ON_MTD
  359. if (0)
  360. # endif
  361. /* For XIP, allow user space to use pointers within the ROMFS. */
  362. if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
  363. return 1;
  364. } else {
  365. if (in_mem(addr, size, memory_start, physical_mem_end))
  366. return 1;
  367. }
  368. if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
  369. return 1;
  370. if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
  371. return 1;
  372. if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
  373. return 1;
  374. if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
  375. return 1;
  376. if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
  377. return 1;
  378. #ifdef COREB_L1_CODE_START
  379. if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
  380. return 1;
  381. if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
  382. return 1;
  383. if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
  384. return 1;
  385. if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
  386. return 1;
  387. #endif
  388. #ifndef CONFIG_EXCEPTION_L1_SCRATCH
  389. if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
  390. return 1;
  391. #endif
  392. aret = in_async(addr, size);
  393. if (aret < 2)
  394. return aret;
  395. if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
  396. return 1;
  397. if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
  398. return 1;
  399. if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
  400. return 1;
  401. return 0;
  402. }
  403. EXPORT_SYMBOL(_access_ok);
  404. #endif /* CONFIG_ACCESS_CHECK */