tlb.S 2.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071
  1. /*
  2. * Based on arch/arm/mm/tlb.S
  3. *
  4. * Copyright (C) 1997-2002 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. * Written by Catalin Marinas <catalin.marinas@arm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include <linux/linkage.h>
  21. #include <asm/assembler.h>
  22. #include <asm/asm-offsets.h>
  23. #include <asm/page.h>
  24. #include <asm/tlbflush.h>
  25. #include "proc-macros.S"
  26. /*
  27. * __cpu_flush_user_tlb_range(start, end, vma)
  28. *
  29. * Invalidate a range of TLB entries in the specified address space.
  30. *
  31. * - start - start address (may not be aligned)
  32. * - end - end address (exclusive, may not be aligned)
  33. * - vma - vma_struct describing address range
  34. */
  35. ENTRY(__cpu_flush_user_tlb_range)
  36. vma_vm_mm x3, x2 // get vma->vm_mm
  37. mmid x3, x3 // get vm_mm->context.id
  38. dsb sy
  39. lsr x0, x0, #12 // align address
  40. lsr x1, x1, #12
  41. bfi x0, x3, #48, #16 // start VA and ASID
  42. bfi x1, x3, #48, #16 // end VA and ASID
  43. 1: tlbi vae1is, x0 // TLB invalidate by address and ASID
  44. add x0, x0, #1
  45. cmp x0, x1
  46. b.lo 1b
  47. dsb sy
  48. ret
  49. ENDPROC(__cpu_flush_user_tlb_range)
  50. /*
  51. * __cpu_flush_kern_tlb_range(start,end)
  52. *
  53. * Invalidate a range of kernel TLB entries.
  54. *
  55. * - start - start address (may not be aligned)
  56. * - end - end address (exclusive, may not be aligned)
  57. */
  58. ENTRY(__cpu_flush_kern_tlb_range)
  59. dsb sy
  60. lsr x0, x0, #12 // align address
  61. lsr x1, x1, #12
  62. 1: tlbi vaae1is, x0 // TLB invalidate by address
  63. add x0, x0, #1
  64. cmp x0, x1
  65. b.lo 1b
  66. dsb sy
  67. isb
  68. ret
  69. ENDPROC(__cpu_flush_kern_tlb_range)