cpu-db8500.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348
  1. /*
  2. * Copyright (C) 2008-2009 ST-Ericsson SA
  3. *
  4. * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/types.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/amba/bus.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/io.h>
  19. #include <linux/mfd/abx500/ab8500.h>
  20. #include <linux/mfd/dbx500-prcmu.h>
  21. #include <linux/of.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/platform_data/pinctrl-nomadik.h>
  25. #include <linux/random.h>
  26. #include <asm/pmu.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/mach/arch.h>
  29. #include <mach/hardware.h>
  30. #include <mach/setup.h>
  31. #include <mach/devices.h>
  32. #include <mach/db8500-regs.h>
  33. #include <mach/irqs.h>
  34. #include "devices-db8500.h"
  35. #include "ste-dma40-db8500.h"
  36. #include "board-mop500.h"
  37. #include "id.h"
  38. /* minimum static i/o mapping required to boot U8500 platforms */
  39. static struct map_desc u8500_uart_io_desc[] __initdata = {
  40. __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
  41. __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
  42. };
  43. /* U8500 and U9540 common io_desc */
  44. static struct map_desc u8500_common_io_desc[] __initdata = {
  45. /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
  46. __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
  47. __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
  48. __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
  49. __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
  50. __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
  51. __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
  52. __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
  53. __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
  54. __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
  55. __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
  56. __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
  57. __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
  58. __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
  59. __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
  60. };
  61. /* U8500 IO map specific description */
  62. static struct map_desc u8500_io_desc[] __initdata = {
  63. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
  64. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
  65. };
  66. /* U9540 IO map specific description */
  67. static struct map_desc u9540_io_desc[] __initdata = {
  68. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
  69. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
  70. };
  71. void __init u8500_map_io(void)
  72. {
  73. /*
  74. * Map the UARTs early so that the DEBUG_LL stuff continues to work.
  75. */
  76. iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
  77. ux500_map_io();
  78. iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
  79. if (cpu_is_ux540_family())
  80. iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
  81. else
  82. iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
  83. _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
  84. }
  85. static struct resource db8500_pmu_resources[] = {
  86. [0] = {
  87. .start = IRQ_DB8500_PMU,
  88. .end = IRQ_DB8500_PMU,
  89. .flags = IORESOURCE_IRQ,
  90. },
  91. };
  92. /*
  93. * The PMU IRQ lines of two cores are wired together into a single interrupt.
  94. * Bounce the interrupt to the other core if it's not ours.
  95. */
  96. static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
  97. {
  98. irqreturn_t ret = handler(irq, dev);
  99. int other = !smp_processor_id();
  100. if (ret == IRQ_NONE && cpu_online(other))
  101. irq_set_affinity(irq, cpumask_of(other));
  102. /*
  103. * We should be able to get away with the amount of IRQ_NONEs we give,
  104. * while still having the spurious IRQ detection code kick in if the
  105. * interrupt really starts hitting spuriously.
  106. */
  107. return ret;
  108. }
  109. struct arm_pmu_platdata db8500_pmu_platdata = {
  110. .handle_irq = db8500_pmu_handler,
  111. };
  112. static struct platform_device db8500_pmu_device = {
  113. .name = "arm-pmu",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(db8500_pmu_resources),
  116. .resource = db8500_pmu_resources,
  117. .dev.platform_data = &db8500_pmu_platdata,
  118. };
  119. static struct platform_device *platform_devs[] __initdata = {
  120. &u8500_dma40_device,
  121. &db8500_pmu_device,
  122. };
  123. static resource_size_t __initdata db8500_gpio_base[] = {
  124. U8500_GPIOBANK0_BASE,
  125. U8500_GPIOBANK1_BASE,
  126. U8500_GPIOBANK2_BASE,
  127. U8500_GPIOBANK3_BASE,
  128. U8500_GPIOBANK4_BASE,
  129. U8500_GPIOBANK5_BASE,
  130. U8500_GPIOBANK6_BASE,
  131. U8500_GPIOBANK7_BASE,
  132. U8500_GPIOBANK8_BASE,
  133. };
  134. static void __init db8500_add_gpios(struct device *parent)
  135. {
  136. struct nmk_gpio_platform_data pdata = {
  137. .supports_sleepmode = true,
  138. };
  139. dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
  140. IRQ_DB8500_GPIO0, &pdata);
  141. dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
  142. }
  143. static int usb_db8500_rx_dma_cfg[] = {
  144. DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
  145. DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
  146. DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
  147. DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
  148. DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
  149. DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
  150. DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
  151. DB8500_DMA_DEV39_USB_OTG_IEP_8
  152. };
  153. static int usb_db8500_tx_dma_cfg[] = {
  154. DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
  155. DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
  156. DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
  157. DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
  158. DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
  159. DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
  160. DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
  161. DB8500_DMA_DEV39_USB_OTG_OEP_8
  162. };
  163. static const char *db8500_read_soc_id(void)
  164. {
  165. void __iomem *uid = __io_address(U8500_BB_UID_BASE);
  166. /* Throw these device-specific numbers into the entropy pool */
  167. add_device_randomness(uid, 0x14);
  168. return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
  169. readl((u32 *)uid+1),
  170. readl((u32 *)uid+1), readl((u32 *)uid+2),
  171. readl((u32 *)uid+3), readl((u32 *)uid+4));
  172. }
  173. static struct device * __init db8500_soc_device_init(void)
  174. {
  175. const char *soc_id = db8500_read_soc_id();
  176. return ux500_soc_device_init(soc_id);
  177. }
  178. /*
  179. * This function is called from the board init
  180. */
  181. struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
  182. {
  183. struct device *parent;
  184. int i;
  185. parent = db8500_soc_device_init();
  186. db8500_add_rtc(parent);
  187. db8500_add_gpios(parent);
  188. db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
  189. for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
  190. platform_devs[i]->dev.parent = parent;
  191. db8500_prcmu_device.dev.platform_data = ab8500;
  192. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  193. return parent;
  194. }
  195. #ifdef CONFIG_MACH_UX500_DT
  196. /* TODO: Once all pieces are DT:ed, remove completely. */
  197. static struct device * __init u8500_of_init_devices(void)
  198. {
  199. struct device *parent = db8500_soc_device_init();
  200. db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
  201. u8500_dma40_device.dev.parent = parent;
  202. /*
  203. * Devices to be DT:ed:
  204. * u8500_dma40_device = todo
  205. * db8500_pmu_device = done
  206. * db8500_prcmu_device = done
  207. */
  208. platform_device_register(&u8500_dma40_device);
  209. return parent;
  210. }
  211. static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
  212. /* Requires call-back bindings. */
  213. OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
  214. /* Requires DMA bindings. */
  215. OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
  216. OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
  217. OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
  218. OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
  219. OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
  220. OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
  221. OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
  222. OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
  223. /* Requires clock name bindings. */
  224. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
  225. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
  226. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
  227. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
  228. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
  229. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
  230. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
  231. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
  232. OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
  233. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
  234. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
  235. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
  236. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
  237. OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
  238. OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
  239. &db8500_prcmu_pdata),
  240. /* Requires device name bindings. */
  241. OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
  242. "pinctrl-db8500", NULL),
  243. /* Requires clock name and DMA bindings. */
  244. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
  245. "ux500-msp-i2s.0", &msp0_platform_data),
  246. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
  247. "ux500-msp-i2s.1", &msp1_platform_data),
  248. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
  249. "ux500-msp-i2s.2", &msp2_platform_data),
  250. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
  251. "ux500-msp-i2s.3", &msp3_platform_data),
  252. {},
  253. };
  254. static const struct of_device_id u8500_local_bus_nodes[] = {
  255. /* only create devices below soc node */
  256. { .compatible = "stericsson,db8500", },
  257. { .compatible = "stericsson,db8500-prcmu", },
  258. { .compatible = "simple-bus"},
  259. { },
  260. };
  261. static void __init u8500_init_machine(void)
  262. {
  263. struct device *parent = NULL;
  264. /* Pinmaps must be in place before devices register */
  265. if (of_machine_is_compatible("st-ericsson,mop500"))
  266. mop500_pinmaps_init();
  267. else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
  268. snowball_pinmaps_init();
  269. else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
  270. hrefv60_pinmaps_init();
  271. else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
  272. /* TODO: Add pinmaps for ccu9540 board. */
  273. /* TODO: Export SoC, USB, cpu-freq and DMA40 */
  274. parent = u8500_of_init_devices();
  275. /* automatically probe child nodes of db8500 device */
  276. of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
  277. }
  278. static const char * stericsson_dt_platform_compat[] = {
  279. "st-ericsson,u8500",
  280. "st-ericsson,u8540",
  281. "st-ericsson,u9500",
  282. "st-ericsson,u9540",
  283. NULL,
  284. };
  285. DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
  286. .smp = smp_ops(ux500_smp_ops),
  287. .map_io = u8500_map_io,
  288. .init_irq = ux500_init_irq,
  289. /* we re-use nomadik timer here */
  290. .init_time = ux500_timer_init,
  291. .init_machine = u8500_init_machine,
  292. .init_late = NULL,
  293. .dt_compat = stericsson_dt_platform_compat,
  294. MACHINE_END
  295. #endif