core.c 16 KB

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  1. /*
  2. *
  3. * arch/arm/mach-u300/core.c
  4. *
  5. *
  6. * Copyright (C) 2007-2012 ST-Ericsson SA
  7. * License terms: GNU General Public License (GPL) version 2
  8. * Core platform support, IRQ handling and device definitions.
  9. * Author: Linus Walleij <linus.walleij@stericsson.com>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/bitops.h>
  16. #include <linux/device.h>
  17. #include <linux/mm.h>
  18. #include <linux/termios.h>
  19. #include <linux/dmaengine.h>
  20. #include <linux/amba/bus.h>
  21. #include <linux/amba/mmci.h>
  22. #include <linux/amba/serial.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/gpio.h>
  25. #include <linux/clk.h>
  26. #include <linux/err.h>
  27. #include <linux/mtd/nand.h>
  28. #include <linux/mtd/fsmc.h>
  29. #include <linux/pinctrl/machine.h>
  30. #include <linux/pinctrl/pinconf-generic.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/platform_data/clk-u300.h>
  33. #include <linux/platform_data/pinctrl-coh901.h>
  34. #include <linux/platform_data/dma-coh901318.h>
  35. #include <linux/irqchip/arm-vic.h>
  36. #include <asm/types.h>
  37. #include <asm/setup.h>
  38. #include <asm/memory.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach-types.h>
  41. #include <asm/mach/arch.h>
  42. #include <mach/hardware.h>
  43. #include <mach/syscon.h>
  44. #include <mach/irqs.h>
  45. #include "timer.h"
  46. #include "spi.h"
  47. #include "i2c.h"
  48. #include "u300-gpio.h"
  49. /*
  50. * Static I/O mappings that are needed for booting the U300 platforms. The
  51. * only things we need are the areas where we find the timer, syscon and
  52. * intcon, since the remaining device drivers will map their own memory
  53. * physical to virtual as the need arise.
  54. */
  55. static struct map_desc u300_io_desc[] __initdata = {
  56. {
  57. .virtual = U300_SLOW_PER_VIRT_BASE,
  58. .pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
  59. .length = SZ_64K,
  60. .type = MT_DEVICE,
  61. },
  62. {
  63. .virtual = U300_AHB_PER_VIRT_BASE,
  64. .pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
  65. .length = SZ_32K,
  66. .type = MT_DEVICE,
  67. },
  68. {
  69. .virtual = U300_FAST_PER_VIRT_BASE,
  70. .pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
  71. .length = SZ_32K,
  72. .type = MT_DEVICE,
  73. },
  74. };
  75. static void __init u300_map_io(void)
  76. {
  77. iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
  78. }
  79. /*
  80. * Declaration of devices found on the U300 board and
  81. * their respective memory locations.
  82. */
  83. static struct amba_pl011_data uart0_plat_data = {
  84. #ifdef CONFIG_COH901318
  85. .dma_filter = coh901318_filter_id,
  86. .dma_rx_param = (void *) U300_DMA_UART0_RX,
  87. .dma_tx_param = (void *) U300_DMA_UART0_TX,
  88. #endif
  89. };
  90. /* Slow device at 0x3000 offset */
  91. static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
  92. { IRQ_U300_UART0 }, &uart0_plat_data);
  93. /* The U335 have an additional UART1 on the APP CPU */
  94. static struct amba_pl011_data uart1_plat_data = {
  95. #ifdef CONFIG_COH901318
  96. .dma_filter = coh901318_filter_id,
  97. .dma_rx_param = (void *) U300_DMA_UART1_RX,
  98. .dma_tx_param = (void *) U300_DMA_UART1_TX,
  99. #endif
  100. };
  101. /* Fast device at 0x7000 offset */
  102. static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
  103. { IRQ_U300_UART1 }, &uart1_plat_data);
  104. /* AHB device at 0x4000 offset */
  105. static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
  106. /* Fast device at 0x6000 offset */
  107. static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
  108. { IRQ_U300_SPI }, NULL);
  109. /* Fast device at 0x1000 offset */
  110. #define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
  111. static struct mmci_platform_data mmcsd_platform_data = {
  112. /*
  113. * Do not set ocr_mask or voltage translation function,
  114. * we have a regulator we can control instead.
  115. */
  116. .f_max = 24000000,
  117. .gpio_wp = -1,
  118. .gpio_cd = U300_GPIO_PIN_MMC_CD,
  119. .cd_invert = true,
  120. .capabilities = MMC_CAP_MMC_HIGHSPEED |
  121. MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  122. #ifdef CONFIG_COH901318
  123. .dma_filter = coh901318_filter_id,
  124. .dma_rx_param = (void *) U300_DMA_MMCSD_RX_TX,
  125. /* Don't specify a TX channel, this RX channel is bidirectional */
  126. #endif
  127. };
  128. static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
  129. U300_MMCSD_IRQS, &mmcsd_platform_data);
  130. /*
  131. * The order of device declaration may be important, since some devices
  132. * have dependencies on other devices being initialized first.
  133. */
  134. static struct amba_device *amba_devs[] __initdata = {
  135. &uart0_device,
  136. &uart1_device,
  137. &pl022_device,
  138. &pl172_device,
  139. &mmcsd_device,
  140. };
  141. /* Here follows a list of all hw resources that the platform devices
  142. * allocate. Note, clock dependencies are not included
  143. */
  144. static struct resource gpio_resources[] = {
  145. {
  146. .start = U300_GPIO_BASE,
  147. .end = (U300_GPIO_BASE + SZ_4K - 1),
  148. .flags = IORESOURCE_MEM,
  149. },
  150. {
  151. .name = "gpio0",
  152. .start = IRQ_U300_GPIO_PORT0,
  153. .end = IRQ_U300_GPIO_PORT0,
  154. .flags = IORESOURCE_IRQ,
  155. },
  156. {
  157. .name = "gpio1",
  158. .start = IRQ_U300_GPIO_PORT1,
  159. .end = IRQ_U300_GPIO_PORT1,
  160. .flags = IORESOURCE_IRQ,
  161. },
  162. {
  163. .name = "gpio2",
  164. .start = IRQ_U300_GPIO_PORT2,
  165. .end = IRQ_U300_GPIO_PORT2,
  166. .flags = IORESOURCE_IRQ,
  167. },
  168. {
  169. .name = "gpio3",
  170. .start = IRQ_U300_GPIO_PORT3,
  171. .end = IRQ_U300_GPIO_PORT3,
  172. .flags = IORESOURCE_IRQ,
  173. },
  174. {
  175. .name = "gpio4",
  176. .start = IRQ_U300_GPIO_PORT4,
  177. .end = IRQ_U300_GPIO_PORT4,
  178. .flags = IORESOURCE_IRQ,
  179. },
  180. {
  181. .name = "gpio5",
  182. .start = IRQ_U300_GPIO_PORT5,
  183. .end = IRQ_U300_GPIO_PORT5,
  184. .flags = IORESOURCE_IRQ,
  185. },
  186. {
  187. .name = "gpio6",
  188. .start = IRQ_U300_GPIO_PORT6,
  189. .end = IRQ_U300_GPIO_PORT6,
  190. .flags = IORESOURCE_IRQ,
  191. },
  192. };
  193. static struct resource keypad_resources[] = {
  194. {
  195. .start = U300_KEYPAD_BASE,
  196. .end = U300_KEYPAD_BASE + SZ_4K - 1,
  197. .flags = IORESOURCE_MEM,
  198. },
  199. {
  200. .name = "coh901461-press",
  201. .start = IRQ_U300_KEYPAD_KEYBF,
  202. .end = IRQ_U300_KEYPAD_KEYBF,
  203. .flags = IORESOURCE_IRQ,
  204. },
  205. {
  206. .name = "coh901461-release",
  207. .start = IRQ_U300_KEYPAD_KEYBR,
  208. .end = IRQ_U300_KEYPAD_KEYBR,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. };
  212. static struct resource rtc_resources[] = {
  213. {
  214. .start = U300_RTC_BASE,
  215. .end = U300_RTC_BASE + SZ_4K - 1,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. {
  219. .start = IRQ_U300_RTC,
  220. .end = IRQ_U300_RTC,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. };
  224. /*
  225. * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
  226. * but these are not yet used by the driver.
  227. */
  228. static struct resource fsmc_resources[] = {
  229. {
  230. .name = "nand_addr",
  231. .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
  232. .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. {
  236. .name = "nand_cmd",
  237. .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
  238. .end = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. {
  242. .name = "nand_data",
  243. .start = U300_NAND_CS0_PHYS_BASE,
  244. .end = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
  245. .flags = IORESOURCE_MEM,
  246. },
  247. {
  248. .name = "fsmc_regs",
  249. .start = U300_NAND_IF_PHYS_BASE,
  250. .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. };
  254. static struct resource i2c0_resources[] = {
  255. {
  256. .start = U300_I2C0_BASE,
  257. .end = U300_I2C0_BASE + SZ_4K - 1,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. {
  261. .start = IRQ_U300_I2C0,
  262. .end = IRQ_U300_I2C0,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. };
  266. static struct resource i2c1_resources[] = {
  267. {
  268. .start = U300_I2C1_BASE,
  269. .end = U300_I2C1_BASE + SZ_4K - 1,
  270. .flags = IORESOURCE_MEM,
  271. },
  272. {
  273. .start = IRQ_U300_I2C1,
  274. .end = IRQ_U300_I2C1,
  275. .flags = IORESOURCE_IRQ,
  276. },
  277. };
  278. static struct resource wdog_resources[] = {
  279. {
  280. .start = U300_WDOG_BASE,
  281. .end = U300_WDOG_BASE + SZ_4K - 1,
  282. .flags = IORESOURCE_MEM,
  283. },
  284. {
  285. .start = IRQ_U300_WDOG,
  286. .end = IRQ_U300_WDOG,
  287. .flags = IORESOURCE_IRQ,
  288. }
  289. };
  290. static struct resource dma_resource[] = {
  291. {
  292. .start = U300_DMAC_BASE,
  293. .end = U300_DMAC_BASE + PAGE_SIZE - 1,
  294. .flags = IORESOURCE_MEM,
  295. },
  296. {
  297. .start = IRQ_U300_DMA,
  298. .end = IRQ_U300_DMA,
  299. .flags = IORESOURCE_IRQ,
  300. }
  301. };
  302. static struct resource pinctrl_resources[] = {
  303. {
  304. .start = U300_SYSCON_BASE,
  305. .end = U300_SYSCON_BASE + SZ_4K - 1,
  306. .flags = IORESOURCE_MEM,
  307. },
  308. };
  309. static struct platform_device wdog_device = {
  310. .name = "coh901327_wdog",
  311. .id = -1,
  312. .num_resources = ARRAY_SIZE(wdog_resources),
  313. .resource = wdog_resources,
  314. };
  315. static struct platform_device i2c0_device = {
  316. .name = "stu300",
  317. .id = 0,
  318. .num_resources = ARRAY_SIZE(i2c0_resources),
  319. .resource = i2c0_resources,
  320. };
  321. static struct platform_device i2c1_device = {
  322. .name = "stu300",
  323. .id = 1,
  324. .num_resources = ARRAY_SIZE(i2c1_resources),
  325. .resource = i2c1_resources,
  326. };
  327. static struct platform_device pinctrl_device = {
  328. .name = "pinctrl-u300",
  329. .id = -1,
  330. .num_resources = ARRAY_SIZE(pinctrl_resources),
  331. .resource = pinctrl_resources,
  332. };
  333. /*
  334. * The different variants have a few different versions of the
  335. * GPIO block, with different number of ports.
  336. */
  337. static struct u300_gpio_platform u300_gpio_plat = {
  338. .ports = 7,
  339. .gpio_base = 0,
  340. };
  341. static struct platform_device gpio_device = {
  342. .name = "u300-gpio",
  343. .id = -1,
  344. .num_resources = ARRAY_SIZE(gpio_resources),
  345. .resource = gpio_resources,
  346. .dev = {
  347. .platform_data = &u300_gpio_plat,
  348. },
  349. };
  350. static struct platform_device keypad_device = {
  351. .name = "keypad",
  352. .id = -1,
  353. .num_resources = ARRAY_SIZE(keypad_resources),
  354. .resource = keypad_resources,
  355. };
  356. static struct platform_device rtc_device = {
  357. .name = "rtc-coh901331",
  358. .id = -1,
  359. .num_resources = ARRAY_SIZE(rtc_resources),
  360. .resource = rtc_resources,
  361. };
  362. static struct mtd_partition u300_partitions[] = {
  363. {
  364. .name = "bootrecords",
  365. .offset = 0,
  366. .size = SZ_128K,
  367. },
  368. {
  369. .name = "free",
  370. .offset = SZ_128K,
  371. .size = 8064 * SZ_1K,
  372. },
  373. {
  374. .name = "platform",
  375. .offset = 8192 * SZ_1K,
  376. .size = 253952 * SZ_1K,
  377. },
  378. };
  379. static struct fsmc_nand_platform_data nand_platform_data = {
  380. .partitions = u300_partitions,
  381. .nr_partitions = ARRAY_SIZE(u300_partitions),
  382. .options = NAND_SKIP_BBTSCAN,
  383. .width = FSMC_NAND_BW8,
  384. };
  385. static struct platform_device nand_device = {
  386. .name = "fsmc-nand",
  387. .id = -1,
  388. .resource = fsmc_resources,
  389. .num_resources = ARRAY_SIZE(fsmc_resources),
  390. .dev = {
  391. .platform_data = &nand_platform_data,
  392. },
  393. };
  394. static struct platform_device dma_device = {
  395. .name = "coh901318",
  396. .id = -1,
  397. .resource = dma_resource,
  398. .num_resources = ARRAY_SIZE(dma_resource),
  399. .dev = {
  400. .coherent_dma_mask = ~0,
  401. },
  402. };
  403. static unsigned long pin_pullup_conf[] = {
  404. PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 1),
  405. };
  406. static unsigned long pin_highz_conf[] = {
  407. PIN_CONF_PACKED(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0),
  408. };
  409. /* Pin control settings */
  410. static struct pinctrl_map __initdata u300_pinmux_map[] = {
  411. /* anonymous maps for chip power and EMIFs */
  412. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "power"),
  413. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif0"),
  414. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-u300", NULL, "emif1"),
  415. /* per-device maps for MMC/SD, SPI and UART */
  416. PIN_MAP_MUX_GROUP_DEFAULT("mmci", "pinctrl-u300", NULL, "mmc0"),
  417. PIN_MAP_MUX_GROUP_DEFAULT("pl022", "pinctrl-u300", NULL, "spi0"),
  418. PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-u300", NULL, "uart0"),
  419. /* This pin is used for clock return rather than GPIO */
  420. PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO APP GPIO 11",
  421. pin_pullup_conf),
  422. /* This pin is used for card detect */
  423. PIN_MAP_CONFIGS_PIN_DEFAULT("mmci", "pinctrl-u300", "PIO MS INS",
  424. pin_highz_conf),
  425. };
  426. /*
  427. * Notice that AMBA devices are initialized before platform devices.
  428. *
  429. */
  430. static struct platform_device *platform_devs[] __initdata = {
  431. &dma_device,
  432. &i2c0_device,
  433. &i2c1_device,
  434. &keypad_device,
  435. &rtc_device,
  436. &pinctrl_device,
  437. &gpio_device,
  438. &nand_device,
  439. &wdog_device,
  440. };
  441. /*
  442. * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
  443. * together so some interrupts are connected to the first one and some
  444. * to the second one.
  445. */
  446. static void __init u300_init_irq(void)
  447. {
  448. u32 mask[2] = {0, 0};
  449. struct clk *clk;
  450. int i;
  451. /* initialize clocking early, we want to clock the INTCON */
  452. u300_clk_init(U300_SYSCON_VBASE);
  453. /* Bootstrap EMIF and SEMI clocks */
  454. clk = clk_get_sys("pl172", NULL);
  455. BUG_ON(IS_ERR(clk));
  456. clk_prepare_enable(clk);
  457. clk = clk_get_sys("semi", NULL);
  458. BUG_ON(IS_ERR(clk));
  459. clk_prepare_enable(clk);
  460. /* Clock the interrupt controller */
  461. clk = clk_get_sys("intcon", NULL);
  462. BUG_ON(IS_ERR(clk));
  463. clk_prepare_enable(clk);
  464. for (i = 0; i < U300_VIC_IRQS_END; i++)
  465. set_bit(i, (unsigned long *) &mask[0]);
  466. vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
  467. mask[0], mask[0]);
  468. vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
  469. mask[1], mask[1]);
  470. }
  471. /*
  472. * U300 platforms peripheral handling
  473. */
  474. struct db_chip {
  475. u16 chipid;
  476. const char *name;
  477. };
  478. /*
  479. * This is a list of the Digital Baseband chips used in the U300 platform.
  480. */
  481. static struct db_chip db_chips[] __initdata = {
  482. {
  483. .chipid = 0xb800,
  484. .name = "DB3000",
  485. },
  486. {
  487. .chipid = 0xc000,
  488. .name = "DB3100",
  489. },
  490. {
  491. .chipid = 0xc800,
  492. .name = "DB3150",
  493. },
  494. {
  495. .chipid = 0xd800,
  496. .name = "DB3200",
  497. },
  498. {
  499. .chipid = 0xe000,
  500. .name = "DB3250",
  501. },
  502. {
  503. .chipid = 0xe800,
  504. .name = "DB3210",
  505. },
  506. {
  507. .chipid = 0xf000,
  508. .name = "DB3350 P1x",
  509. },
  510. {
  511. .chipid = 0xf100,
  512. .name = "DB3350 P2x",
  513. },
  514. {
  515. .chipid = 0x0000, /* List terminator */
  516. .name = NULL,
  517. }
  518. };
  519. static void __init u300_init_check_chip(void)
  520. {
  521. u16 val;
  522. struct db_chip *chip;
  523. const char *chipname;
  524. const char unknown[] = "UNKNOWN";
  525. /* Read out and print chip ID */
  526. val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
  527. /* This is in funky bigendian order... */
  528. val = (val & 0xFFU) << 8 | (val >> 8);
  529. chip = db_chips;
  530. chipname = unknown;
  531. for ( ; chip->chipid; chip++) {
  532. if (chip->chipid == (val & 0xFF00U)) {
  533. chipname = chip->name;
  534. break;
  535. }
  536. }
  537. printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
  538. "(chip ID 0x%04x)\n", chipname, val);
  539. if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
  540. printk(KERN_ERR "Platform configured for BS335 " \
  541. " with DB3350 but %s detected, expect problems!",
  542. chipname);
  543. }
  544. }
  545. /*
  546. * Some devices and their resources require reserved physical memory from
  547. * the end of the available RAM. This function traverses the list of devices
  548. * and assigns actual addresses to these.
  549. */
  550. static void __init u300_assign_physmem(void)
  551. {
  552. unsigned long curr_start = __pa(high_memory);
  553. int i, j;
  554. for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
  555. for (j = 0; j < platform_devs[i]->num_resources; j++) {
  556. struct resource *const res =
  557. &platform_devs[i]->resource[j];
  558. if (IORESOURCE_MEM == res->flags &&
  559. 0 == res->start) {
  560. res->start = curr_start;
  561. res->end += curr_start;
  562. curr_start += resource_size(res);
  563. printk(KERN_INFO "core.c: Mapping RAM " \
  564. "%#x-%#x to device %s:%s\n",
  565. res->start, res->end,
  566. platform_devs[i]->name, res->name);
  567. }
  568. }
  569. }
  570. }
  571. static void __init u300_init_machine(void)
  572. {
  573. int i;
  574. u16 val;
  575. /* Check what platform we run and print some status information */
  576. u300_init_check_chip();
  577. /* Initialize SPI device with some board specifics */
  578. u300_spi_init(&pl022_device);
  579. /* Register the AMBA devices in the AMBA bus abstraction layer */
  580. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  581. struct amba_device *d = amba_devs[i];
  582. amba_device_register(d, &iomem_resource);
  583. }
  584. u300_assign_physmem();
  585. /* Initialize pinmuxing */
  586. pinctrl_register_mappings(u300_pinmux_map,
  587. ARRAY_SIZE(u300_pinmux_map));
  588. /* Register subdevices on the I2C buses */
  589. u300_i2c_register_board_devices();
  590. /* Register the platform devices */
  591. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  592. /* Register subdevices on the SPI bus */
  593. u300_spi_register_board_devices();
  594. /* Enable SEMI self refresh */
  595. val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
  596. U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
  597. writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
  598. }
  599. /* Forward declare this function from the watchdog */
  600. void coh901327_watchdog_reset(void);
  601. static void u300_restart(char mode, const char *cmd)
  602. {
  603. switch (mode) {
  604. case 's':
  605. case 'h':
  606. #ifdef CONFIG_COH901327_WATCHDOG
  607. coh901327_watchdog_reset();
  608. #endif
  609. break;
  610. default:
  611. /* Do nothing */
  612. break;
  613. }
  614. /* Wait for system do die/reset. */
  615. while (1);
  616. }
  617. MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
  618. /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
  619. .atag_offset = 0x100,
  620. .map_io = u300_map_io,
  621. .nr_irqs = 0,
  622. .init_irq = u300_init_irq,
  623. .init_time = u300_timer_init,
  624. .init_machine = u300_init_machine,
  625. .restart = u300_restart,
  626. MACHINE_END