setup-r8a7779.c 8.9 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/input.h>
  27. #include <linux/io.h>
  28. #include <linux/serial_sci.h>
  29. #include <linux/sh_intc.h>
  30. #include <linux/sh_timer.h>
  31. #include <mach/hardware.h>
  32. #include <mach/irqs.h>
  33. #include <mach/r8a7779.h>
  34. #include <mach/common.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/time.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/hardware/cache-l2x0.h>
  40. static struct map_desc r8a7779_io_desc[] __initdata = {
  41. /* 2M entity map for 0xf0000000 (MPCORE) */
  42. {
  43. .virtual = 0xf0000000,
  44. .pfn = __phys_to_pfn(0xf0000000),
  45. .length = SZ_2M,
  46. .type = MT_DEVICE_NONSHARED
  47. },
  48. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  49. {
  50. .virtual = 0xfe000000,
  51. .pfn = __phys_to_pfn(0xfe000000),
  52. .length = SZ_16M,
  53. .type = MT_DEVICE_NONSHARED
  54. },
  55. };
  56. void __init r8a7779_map_io(void)
  57. {
  58. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  59. }
  60. static struct resource r8a7779_pfc_resources[] = {
  61. [0] = {
  62. .start = 0xfffc0000,
  63. .end = 0xfffc023b,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. [1] = {
  67. .start = 0xffc40000,
  68. .end = 0xffc46fff,
  69. .flags = IORESOURCE_MEM,
  70. }
  71. };
  72. static struct platform_device r8a7779_pfc_device = {
  73. .name = "pfc-r8a7779",
  74. .id = -1,
  75. .resource = r8a7779_pfc_resources,
  76. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  77. };
  78. void __init r8a7779_pinmux_init(void)
  79. {
  80. platform_device_register(&r8a7779_pfc_device);
  81. }
  82. static struct plat_sci_port scif0_platform_data = {
  83. .mapbase = 0xffe40000,
  84. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  85. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  86. .scbrr_algo_id = SCBRR_ALGO_2,
  87. .type = PORT_SCIF,
  88. .irqs = SCIx_IRQ_MUXED(gic_spi(88)),
  89. };
  90. static struct platform_device scif0_device = {
  91. .name = "sh-sci",
  92. .id = 0,
  93. .dev = {
  94. .platform_data = &scif0_platform_data,
  95. },
  96. };
  97. static struct plat_sci_port scif1_platform_data = {
  98. .mapbase = 0xffe41000,
  99. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  100. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  101. .scbrr_algo_id = SCBRR_ALGO_2,
  102. .type = PORT_SCIF,
  103. .irqs = SCIx_IRQ_MUXED(gic_spi(89)),
  104. };
  105. static struct platform_device scif1_device = {
  106. .name = "sh-sci",
  107. .id = 1,
  108. .dev = {
  109. .platform_data = &scif1_platform_data,
  110. },
  111. };
  112. static struct plat_sci_port scif2_platform_data = {
  113. .mapbase = 0xffe42000,
  114. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  115. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  116. .scbrr_algo_id = SCBRR_ALGO_2,
  117. .type = PORT_SCIF,
  118. .irqs = SCIx_IRQ_MUXED(gic_spi(90)),
  119. };
  120. static struct platform_device scif2_device = {
  121. .name = "sh-sci",
  122. .id = 2,
  123. .dev = {
  124. .platform_data = &scif2_platform_data,
  125. },
  126. };
  127. static struct plat_sci_port scif3_platform_data = {
  128. .mapbase = 0xffe43000,
  129. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  130. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  131. .scbrr_algo_id = SCBRR_ALGO_2,
  132. .type = PORT_SCIF,
  133. .irqs = SCIx_IRQ_MUXED(gic_spi(91)),
  134. };
  135. static struct platform_device scif3_device = {
  136. .name = "sh-sci",
  137. .id = 3,
  138. .dev = {
  139. .platform_data = &scif3_platform_data,
  140. },
  141. };
  142. static struct plat_sci_port scif4_platform_data = {
  143. .mapbase = 0xffe44000,
  144. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  145. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  146. .scbrr_algo_id = SCBRR_ALGO_2,
  147. .type = PORT_SCIF,
  148. .irqs = SCIx_IRQ_MUXED(gic_spi(92)),
  149. };
  150. static struct platform_device scif4_device = {
  151. .name = "sh-sci",
  152. .id = 4,
  153. .dev = {
  154. .platform_data = &scif4_platform_data,
  155. },
  156. };
  157. static struct plat_sci_port scif5_platform_data = {
  158. .mapbase = 0xffe45000,
  159. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  160. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  161. .scbrr_algo_id = SCBRR_ALGO_2,
  162. .type = PORT_SCIF,
  163. .irqs = SCIx_IRQ_MUXED(gic_spi(93)),
  164. };
  165. static struct platform_device scif5_device = {
  166. .name = "sh-sci",
  167. .id = 5,
  168. .dev = {
  169. .platform_data = &scif5_platform_data,
  170. },
  171. };
  172. /* TMU */
  173. static struct sh_timer_config tmu00_platform_data = {
  174. .name = "TMU00",
  175. .channel_offset = 0x4,
  176. .timer_bit = 0,
  177. .clockevent_rating = 200,
  178. };
  179. static struct resource tmu00_resources[] = {
  180. [0] = {
  181. .name = "TMU00",
  182. .start = 0xffd80008,
  183. .end = 0xffd80013,
  184. .flags = IORESOURCE_MEM,
  185. },
  186. [1] = {
  187. .start = gic_spi(32),
  188. .flags = IORESOURCE_IRQ,
  189. },
  190. };
  191. static struct platform_device tmu00_device = {
  192. .name = "sh_tmu",
  193. .id = 0,
  194. .dev = {
  195. .platform_data = &tmu00_platform_data,
  196. },
  197. .resource = tmu00_resources,
  198. .num_resources = ARRAY_SIZE(tmu00_resources),
  199. };
  200. static struct sh_timer_config tmu01_platform_data = {
  201. .name = "TMU01",
  202. .channel_offset = 0x10,
  203. .timer_bit = 1,
  204. .clocksource_rating = 200,
  205. };
  206. static struct resource tmu01_resources[] = {
  207. [0] = {
  208. .name = "TMU01",
  209. .start = 0xffd80014,
  210. .end = 0xffd8001f,
  211. .flags = IORESOURCE_MEM,
  212. },
  213. [1] = {
  214. .start = gic_spi(33),
  215. .flags = IORESOURCE_IRQ,
  216. },
  217. };
  218. static struct platform_device tmu01_device = {
  219. .name = "sh_tmu",
  220. .id = 1,
  221. .dev = {
  222. .platform_data = &tmu01_platform_data,
  223. },
  224. .resource = tmu01_resources,
  225. .num_resources = ARRAY_SIZE(tmu01_resources),
  226. };
  227. /* I2C */
  228. static struct resource rcar_i2c0_res[] = {
  229. {
  230. .start = 0xffc70000,
  231. .end = 0xffc70fff,
  232. .flags = IORESOURCE_MEM,
  233. }, {
  234. .start = gic_spi(79),
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. };
  238. static struct platform_device i2c0_device = {
  239. .name = "i2c-rcar",
  240. .id = 0,
  241. .resource = rcar_i2c0_res,
  242. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  243. };
  244. static struct resource rcar_i2c1_res[] = {
  245. {
  246. .start = 0xffc71000,
  247. .end = 0xffc71fff,
  248. .flags = IORESOURCE_MEM,
  249. }, {
  250. .start = gic_spi(82),
  251. .flags = IORESOURCE_IRQ,
  252. },
  253. };
  254. static struct platform_device i2c1_device = {
  255. .name = "i2c-rcar",
  256. .id = 1,
  257. .resource = rcar_i2c1_res,
  258. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  259. };
  260. static struct resource rcar_i2c2_res[] = {
  261. {
  262. .start = 0xffc72000,
  263. .end = 0xffc72fff,
  264. .flags = IORESOURCE_MEM,
  265. }, {
  266. .start = gic_spi(80),
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. };
  270. static struct platform_device i2c2_device = {
  271. .name = "i2c-rcar",
  272. .id = 2,
  273. .resource = rcar_i2c2_res,
  274. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  275. };
  276. static struct resource rcar_i2c3_res[] = {
  277. {
  278. .start = 0xffc73000,
  279. .end = 0xffc73fff,
  280. .flags = IORESOURCE_MEM,
  281. }, {
  282. .start = gic_spi(81),
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. };
  286. static struct platform_device i2c3_device = {
  287. .name = "i2c-rcar",
  288. .id = 3,
  289. .resource = rcar_i2c3_res,
  290. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  291. };
  292. static struct platform_device *r8a7779_early_devices[] __initdata = {
  293. &scif0_device,
  294. &scif1_device,
  295. &scif2_device,
  296. &scif3_device,
  297. &scif4_device,
  298. &scif5_device,
  299. &tmu00_device,
  300. &tmu01_device,
  301. &i2c0_device,
  302. &i2c1_device,
  303. &i2c2_device,
  304. &i2c3_device,
  305. };
  306. static struct platform_device *r8a7779_late_devices[] __initdata = {
  307. };
  308. void __init r8a7779_add_standard_devices(void)
  309. {
  310. #ifdef CONFIG_CACHE_L2X0
  311. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  312. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  313. #endif
  314. r8a7779_pm_init();
  315. r8a7779_init_pm_domains();
  316. platform_add_devices(r8a7779_early_devices,
  317. ARRAY_SIZE(r8a7779_early_devices));
  318. platform_add_devices(r8a7779_late_devices,
  319. ARRAY_SIZE(r8a7779_late_devices));
  320. }
  321. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  322. void __init __weak r8a7779_register_twd(void) { }
  323. void __init r8a7779_earlytimer_init(void)
  324. {
  325. r8a7779_clock_init();
  326. shmobile_earlytimer_init();
  327. r8a7779_register_twd();
  328. }
  329. void __init r8a7779_add_early_devices(void)
  330. {
  331. early_platform_add_devices(r8a7779_early_devices,
  332. ARRAY_SIZE(r8a7779_early_devices));
  333. /* Early serial console setup is not included here due to
  334. * memory map collisions. The SCIF serial ports in r8a7779
  335. * are difficult to entity map 1:1 due to collision with the
  336. * virtual memory range used by the coherent DMA code on ARM.
  337. *
  338. * Anyone wanting to debug early can remove UPF_IOREMAP from
  339. * the sh-sci serial console platform data, adjust mapbase
  340. * to a static M:N virt:phys mapping that needs to be added to
  341. * the mappings passed with iotable_init() above.
  342. *
  343. * Then add a call to shmobile_setup_console() from this function.
  344. *
  345. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  346. * command line in case of the marzen board.
  347. */
  348. }