mach-crag6410.c 21 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/leds.h>
  22. #include <linux/delay.h>
  23. #include <linux/mmc/host.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/regulator/fixed.h>
  26. #include <linux/pwm_backlight.h>
  27. #include <linux/dm9000.h>
  28. #include <linux/gpio_keys.h>
  29. #include <linux/basic_mmio_gpio.h>
  30. #include <linux/spi/spi.h>
  31. #include <linux/i2c/pca953x.h>
  32. #include <linux/platform_data/s3c-hsotg.h>
  33. #include <video/platform_lcd.h>
  34. #include <linux/mfd/wm831x/core.h>
  35. #include <linux/mfd/wm831x/pdata.h>
  36. #include <linux/mfd/wm831x/irq.h>
  37. #include <linux/mfd/wm831x/gpio.h>
  38. #include <sound/wm1250-ev1.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach-types.h>
  41. #include <video/samsung_fimd.h>
  42. #include <mach/hardware.h>
  43. #include <mach/map.h>
  44. #include <mach/regs-gpio.h>
  45. #include <plat/regs-serial.h>
  46. #include <plat/fb.h>
  47. #include <plat/sdhci.h>
  48. #include <plat/gpio-cfg.h>
  49. #include <linux/platform_data/spi-s3c64xx.h>
  50. #include <plat/keypad.h>
  51. #include <plat/clock.h>
  52. #include <plat/devs.h>
  53. #include <plat/cpu.h>
  54. #include <plat/adc.h>
  55. #include <linux/platform_data/i2c-s3c2410.h>
  56. #include <plat/pm.h>
  57. #include "common.h"
  58. #include "crag6410.h"
  59. #include "regs-gpio-memport.h"
  60. #include "regs-modem.h"
  61. #include "regs-sys.h"
  62. /* serial port setup */
  63. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  64. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  65. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  66. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  67. [0] = {
  68. .hwport = 0,
  69. .flags = 0,
  70. .ucon = UCON,
  71. .ulcon = ULCON,
  72. .ufcon = UFCON,
  73. },
  74. [1] = {
  75. .hwport = 1,
  76. .flags = 0,
  77. .ucon = UCON,
  78. .ulcon = ULCON,
  79. .ufcon = UFCON,
  80. },
  81. [2] = {
  82. .hwport = 2,
  83. .flags = 0,
  84. .ucon = UCON,
  85. .ulcon = ULCON,
  86. .ufcon = UFCON,
  87. },
  88. [3] = {
  89. .hwport = 3,
  90. .flags = 0,
  91. .ucon = UCON,
  92. .ulcon = ULCON,
  93. .ufcon = UFCON,
  94. },
  95. };
  96. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  97. .pwm_id = 0,
  98. .max_brightness = 1000,
  99. .dft_brightness = 600,
  100. .pwm_period_ns = 100000, /* about 1kHz */
  101. };
  102. static struct platform_device crag6410_backlight_device = {
  103. .name = "pwm-backlight",
  104. .id = -1,
  105. .dev = {
  106. .parent = &s3c_device_timer[0].dev,
  107. .platform_data = &crag6410_backlight_data,
  108. },
  109. };
  110. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  111. {
  112. pr_debug("%s: setting power %d\n", __func__, power);
  113. if (power) {
  114. gpio_set_value(S3C64XX_GPB(0), 1);
  115. msleep(1);
  116. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  117. } else {
  118. gpio_direction_output(S3C64XX_GPF(14), 0);
  119. gpio_set_value(S3C64XX_GPB(0), 0);
  120. }
  121. }
  122. static struct platform_device crag6410_lcd_powerdev = {
  123. .name = "platform-lcd",
  124. .id = -1,
  125. .dev.parent = &s3c_device_fb.dev,
  126. .dev.platform_data = &(struct plat_lcd_data) {
  127. .set_power = crag6410_lcd_power_set,
  128. },
  129. };
  130. /* 640x480 URT */
  131. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  132. .max_bpp = 32,
  133. .default_bpp = 16,
  134. .xres = 640,
  135. .yres = 480,
  136. .virtual_y = 480 * 2,
  137. .virtual_x = 640,
  138. };
  139. static struct fb_videomode crag6410_lcd_timing = {
  140. .left_margin = 150,
  141. .right_margin = 80,
  142. .upper_margin = 40,
  143. .lower_margin = 5,
  144. .hsync_len = 40,
  145. .vsync_len = 5,
  146. .xres = 640,
  147. .yres = 480,
  148. };
  149. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  150. static struct s3c_fb_platdata crag6410_lcd_pdata = {
  151. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  152. .vtiming = &crag6410_lcd_timing,
  153. .win[0] = &crag6410_fb_win0,
  154. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  155. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  156. };
  157. /* 2x6 keypad */
  158. static uint32_t crag6410_keymap[] = {
  159. /* KEY(row, col, keycode) */
  160. KEY(0, 0, KEY_VOLUMEUP),
  161. KEY(0, 1, KEY_HOME),
  162. KEY(0, 2, KEY_VOLUMEDOWN),
  163. KEY(0, 3, KEY_HELP),
  164. KEY(0, 4, KEY_MENU),
  165. KEY(0, 5, KEY_MEDIA),
  166. KEY(1, 0, 232),
  167. KEY(1, 1, KEY_DOWN),
  168. KEY(1, 2, KEY_LEFT),
  169. KEY(1, 3, KEY_UP),
  170. KEY(1, 4, KEY_RIGHT),
  171. KEY(1, 5, KEY_CAMERA),
  172. };
  173. static struct matrix_keymap_data crag6410_keymap_data = {
  174. .keymap = crag6410_keymap,
  175. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  176. };
  177. static struct samsung_keypad_platdata crag6410_keypad_data = {
  178. .keymap_data = &crag6410_keymap_data,
  179. .rows = 2,
  180. .cols = 6,
  181. };
  182. static struct gpio_keys_button crag6410_gpio_keys[] = {
  183. [0] = {
  184. .code = KEY_SUSPEND,
  185. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  186. .type = EV_KEY,
  187. .wakeup = 1,
  188. .active_low = 1,
  189. },
  190. [1] = {
  191. .code = SW_FRONT_PROXIMITY,
  192. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  193. .type = EV_SW,
  194. },
  195. };
  196. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  197. .buttons = crag6410_gpio_keys,
  198. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  199. };
  200. static struct platform_device crag6410_gpio_keydev = {
  201. .name = "gpio-keys",
  202. .id = 0,
  203. .dev.platform_data = &crag6410_gpio_keydata,
  204. };
  205. static struct resource crag6410_dm9k_resource[] = {
  206. [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
  207. [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
  208. [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
  209. | IORESOURCE_IRQ_HIGHLEVEL),
  210. };
  211. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  212. .flags = DM9000_PLATF_16BITONLY,
  213. };
  214. static struct platform_device crag6410_dm9k_device = {
  215. .name = "dm9000",
  216. .id = -1,
  217. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  218. .resource = crag6410_dm9k_resource,
  219. .dev.platform_data = &mini6410_dm9k_pdata,
  220. };
  221. static struct resource crag6410_mmgpio_resource[] = {
  222. [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
  223. };
  224. static struct platform_device crag6410_mmgpio = {
  225. .name = "basic-mmio-gpio",
  226. .id = -1,
  227. .resource = crag6410_mmgpio_resource,
  228. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  229. .dev.platform_data = &(struct bgpio_pdata) {
  230. .base = MMGPIO_GPIO_BASE,
  231. },
  232. };
  233. static struct platform_device speyside_device = {
  234. .name = "speyside",
  235. .id = -1,
  236. };
  237. static struct platform_device lowland_device = {
  238. .name = "lowland",
  239. .id = -1,
  240. };
  241. static struct platform_device tobermory_device = {
  242. .name = "tobermory",
  243. .id = -1,
  244. };
  245. static struct platform_device littlemill_device = {
  246. .name = "littlemill",
  247. .id = -1,
  248. };
  249. static struct platform_device bells_wm2200_device = {
  250. .name = "bells",
  251. .id = 0,
  252. };
  253. static struct platform_device bells_wm5102_device = {
  254. .name = "bells",
  255. .id = 1,
  256. };
  257. static struct platform_device bells_wm5110_device = {
  258. .name = "bells",
  259. .id = 2,
  260. };
  261. static struct regulator_consumer_supply wallvdd_consumers[] = {
  262. REGULATOR_SUPPLY("SPKVDD", "1-001a"),
  263. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  264. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  265. REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
  266. REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
  267. REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
  268. REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
  269. REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
  270. REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
  271. REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
  272. REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
  273. REGULATOR_SUPPLY("DC1VDD", "0-0034"),
  274. REGULATOR_SUPPLY("DC2VDD", "0-0034"),
  275. REGULATOR_SUPPLY("DC3VDD", "0-0034"),
  276. REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
  277. REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
  278. REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
  279. REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
  280. REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
  281. REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
  282. REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
  283. REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
  284. REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
  285. REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
  286. REGULATOR_SUPPLY("DC1VDD", "1-0034"),
  287. REGULATOR_SUPPLY("DC2VDD", "1-0034"),
  288. REGULATOR_SUPPLY("DC3VDD", "1-0034"),
  289. REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
  290. REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
  291. REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
  292. REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
  293. REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
  294. REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
  295. REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
  296. REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
  297. REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
  298. REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
  299. };
  300. static struct regulator_init_data wallvdd_data = {
  301. .constraints = {
  302. .always_on = 1,
  303. },
  304. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  305. .consumer_supplies = wallvdd_consumers,
  306. };
  307. static struct fixed_voltage_config wallvdd_pdata = {
  308. .supply_name = "WALLVDD",
  309. .microvolts = 5000000,
  310. .init_data = &wallvdd_data,
  311. .gpio = -EINVAL,
  312. };
  313. static struct platform_device wallvdd_device = {
  314. .name = "reg-fixed-voltage",
  315. .id = -1,
  316. .dev = {
  317. .platform_data = &wallvdd_pdata,
  318. },
  319. };
  320. static struct platform_device *crag6410_devices[] __initdata = {
  321. &s3c_device_hsmmc0,
  322. &s3c_device_hsmmc2,
  323. &s3c_device_i2c0,
  324. &s3c_device_i2c1,
  325. &s3c_device_fb,
  326. &s3c_device_ohci,
  327. &s3c_device_usb_hsotg,
  328. &s3c_device_timer[0],
  329. &s3c64xx_device_iis0,
  330. &s3c64xx_device_iis1,
  331. &samsung_device_keypad,
  332. &crag6410_gpio_keydev,
  333. &crag6410_dm9k_device,
  334. &s3c64xx_device_spi0,
  335. &crag6410_mmgpio,
  336. &crag6410_lcd_powerdev,
  337. &crag6410_backlight_device,
  338. &speyside_device,
  339. &tobermory_device,
  340. &littlemill_device,
  341. &lowland_device,
  342. &bells_wm2200_device,
  343. &bells_wm5102_device,
  344. &bells_wm5110_device,
  345. &wallvdd_device,
  346. };
  347. static struct pca953x_platform_data crag6410_pca_data = {
  348. .gpio_base = PCA935X_GPIO_BASE,
  349. .irq_base = -1,
  350. };
  351. /* VDDARM is controlled by DVS1 connected to GPK(0) */
  352. static struct wm831x_buckv_pdata vddarm_pdata = {
  353. .dvs_control_src = 1,
  354. .dvs_gpio = S3C64XX_GPK(0),
  355. };
  356. static struct regulator_consumer_supply vddarm_consumers[] = {
  357. REGULATOR_SUPPLY("vddarm", NULL),
  358. };
  359. static struct regulator_init_data vddarm = {
  360. .constraints = {
  361. .name = "VDDARM",
  362. .min_uV = 1000000,
  363. .max_uV = 1300000,
  364. .always_on = 1,
  365. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  366. },
  367. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  368. .consumer_supplies = vddarm_consumers,
  369. .supply_regulator = "WALLVDD",
  370. .driver_data = &vddarm_pdata,
  371. };
  372. static struct regulator_consumer_supply vddint_consumers[] = {
  373. REGULATOR_SUPPLY("vddint", NULL),
  374. };
  375. static struct regulator_init_data vddint = {
  376. .constraints = {
  377. .name = "VDDINT",
  378. .min_uV = 1000000,
  379. .max_uV = 1200000,
  380. .always_on = 1,
  381. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  382. },
  383. .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
  384. .consumer_supplies = vddint_consumers,
  385. .supply_regulator = "WALLVDD",
  386. };
  387. static struct regulator_init_data vddmem = {
  388. .constraints = {
  389. .name = "VDDMEM",
  390. .always_on = 1,
  391. },
  392. };
  393. static struct regulator_init_data vddsys = {
  394. .constraints = {
  395. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  396. .always_on = 1,
  397. },
  398. };
  399. static struct regulator_consumer_supply vddmmc_consumers[] = {
  400. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  401. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  402. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  403. };
  404. static struct regulator_init_data vddmmc = {
  405. .constraints = {
  406. .name = "VDDMMC,UH",
  407. .always_on = 1,
  408. },
  409. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  410. .consumer_supplies = vddmmc_consumers,
  411. .supply_regulator = "WALLVDD",
  412. };
  413. static struct regulator_init_data vddotgi = {
  414. .constraints = {
  415. .name = "VDDOTGi",
  416. .always_on = 1,
  417. },
  418. .supply_regulator = "WALLVDD",
  419. };
  420. static struct regulator_init_data vddotg = {
  421. .constraints = {
  422. .name = "VDDOTG",
  423. .always_on = 1,
  424. },
  425. .supply_regulator = "WALLVDD",
  426. };
  427. static struct regulator_init_data vddhi = {
  428. .constraints = {
  429. .name = "VDDHI",
  430. .always_on = 1,
  431. },
  432. .supply_regulator = "WALLVDD",
  433. };
  434. static struct regulator_init_data vddadc = {
  435. .constraints = {
  436. .name = "VDDADC,VDDDAC",
  437. .always_on = 1,
  438. },
  439. .supply_regulator = "WALLVDD",
  440. };
  441. static struct regulator_init_data vddmem0 = {
  442. .constraints = {
  443. .name = "VDDMEM0",
  444. .always_on = 1,
  445. },
  446. .supply_regulator = "WALLVDD",
  447. };
  448. static struct regulator_init_data vddpll = {
  449. .constraints = {
  450. .name = "VDDPLL",
  451. .always_on = 1,
  452. },
  453. .supply_regulator = "WALLVDD",
  454. };
  455. static struct regulator_init_data vddlcd = {
  456. .constraints = {
  457. .name = "VDDLCD",
  458. .always_on = 1,
  459. },
  460. .supply_regulator = "WALLVDD",
  461. };
  462. static struct regulator_init_data vddalive = {
  463. .constraints = {
  464. .name = "VDDALIVE",
  465. .always_on = 1,
  466. },
  467. .supply_regulator = "WALLVDD",
  468. };
  469. static struct wm831x_backup_pdata banff_backup_pdata = {
  470. .charger_enable = 1,
  471. .vlim = 2500, /* mV */
  472. .ilim = 200, /* uA */
  473. };
  474. static struct wm831x_status_pdata banff_red_led = {
  475. .name = "banff:red:",
  476. .default_src = WM831X_STATUS_MANUAL,
  477. };
  478. static struct wm831x_status_pdata banff_green_led = {
  479. .name = "banff:green:",
  480. .default_src = WM831X_STATUS_MANUAL,
  481. };
  482. static struct wm831x_touch_pdata touch_pdata = {
  483. .data_irq = S3C_EINT(26),
  484. .pd_irq = S3C_EINT(27),
  485. };
  486. static struct wm831x_pdata crag_pmic_pdata = {
  487. .wm831x_num = 1,
  488. .gpio_base = BANFF_PMIC_GPIO_BASE,
  489. .soft_shutdown = true,
  490. .backup = &banff_backup_pdata,
  491. .gpio_defaults = {
  492. /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
  493. [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
  494. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  495. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  496. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  497. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  498. },
  499. .dcdc = {
  500. &vddarm, /* DCDC1 */
  501. &vddint, /* DCDC2 */
  502. &vddmem, /* DCDC3 */
  503. },
  504. .ldo = {
  505. &vddsys, /* LDO1 */
  506. &vddmmc, /* LDO2 */
  507. NULL, /* LDO3 */
  508. &vddotgi, /* LDO4 */
  509. &vddotg, /* LDO5 */
  510. &vddhi, /* LDO6 */
  511. &vddadc, /* LDO7 */
  512. &vddmem0, /* LDO8 */
  513. &vddpll, /* LDO9 */
  514. &vddlcd, /* LDO10 */
  515. &vddalive, /* LDO11 */
  516. },
  517. .status = {
  518. &banff_green_led,
  519. &banff_red_led,
  520. },
  521. .touch = &touch_pdata,
  522. };
  523. static struct i2c_board_info i2c_devs0[] = {
  524. { I2C_BOARD_INFO("24c08", 0x50), },
  525. { I2C_BOARD_INFO("tca6408", 0x20),
  526. .platform_data = &crag6410_pca_data,
  527. },
  528. { I2C_BOARD_INFO("wm8312", 0x34),
  529. .platform_data = &crag_pmic_pdata,
  530. .irq = S3C_EINT(23),
  531. },
  532. };
  533. static struct s3c2410_platform_i2c i2c0_pdata = {
  534. .frequency = 400000,
  535. };
  536. static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
  537. REGULATOR_SUPPLY("DCVDD", "spi0.0"),
  538. REGULATOR_SUPPLY("AVDD", "spi0.0"),
  539. REGULATOR_SUPPLY("AVDD", "spi0.1"),
  540. };
  541. static struct regulator_init_data pvdd_1v2 = {
  542. .constraints = {
  543. .name = "PVDD_1V2",
  544. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  545. },
  546. .consumer_supplies = pvdd_1v2_consumers,
  547. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
  548. };
  549. static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
  550. REGULATOR_SUPPLY("LDOVDD", "1-001a"),
  551. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  552. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  553. REGULATOR_SUPPLY("DBVDD1", "1-001a"),
  554. REGULATOR_SUPPLY("DBVDD2", "1-001a"),
  555. REGULATOR_SUPPLY("DBVDD3", "1-001a"),
  556. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  557. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  558. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  559. REGULATOR_SUPPLY("AVDD", "1-001a"),
  560. REGULATOR_SUPPLY("DBVDD", "spi0.0"),
  561. REGULATOR_SUPPLY("DBVDD", "1-003a"),
  562. REGULATOR_SUPPLY("LDOVDD", "1-003a"),
  563. REGULATOR_SUPPLY("CPVDD", "1-003a"),
  564. REGULATOR_SUPPLY("AVDD", "1-003a"),
  565. REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
  566. REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
  567. REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
  568. REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
  569. REGULATOR_SUPPLY("CPVDD", "spi0.1"),
  570. REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
  571. REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
  572. REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
  573. REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
  574. REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
  575. REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
  576. };
  577. static struct regulator_init_data pvdd_1v8 = {
  578. .constraints = {
  579. .name = "PVDD_1V8",
  580. .always_on = 1,
  581. },
  582. .consumer_supplies = pvdd_1v8_consumers,
  583. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  584. };
  585. static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
  586. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  587. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  588. };
  589. static struct regulator_init_data pvdd_3v3 = {
  590. .constraints = {
  591. .name = "PVDD_3V3",
  592. .always_on = 1,
  593. },
  594. .consumer_supplies = pvdd_3v3_consumers,
  595. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  596. };
  597. static struct wm831x_pdata glenfarclas_pmic_pdata = {
  598. .wm831x_num = 2,
  599. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  600. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  601. .soft_shutdown = true,
  602. .gpio_defaults = {
  603. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  604. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  605. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  606. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  607. },
  608. .dcdc = {
  609. &pvdd_1v2, /* DCDC1 */
  610. &pvdd_1v8, /* DCDC2 */
  611. &pvdd_3v3, /* DCDC3 */
  612. },
  613. .disable_touch = true,
  614. };
  615. static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
  616. .gpios = {
  617. [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
  618. [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
  619. [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
  620. [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
  621. [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
  622. },
  623. };
  624. static struct i2c_board_info i2c_devs1[] = {
  625. { I2C_BOARD_INFO("wm8311", 0x34),
  626. .irq = S3C_EINT(0),
  627. .platform_data = &glenfarclas_pmic_pdata },
  628. { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
  629. { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
  630. { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
  631. { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
  632. { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
  633. { I2C_BOARD_INFO("wm1250-ev1", 0x27),
  634. .platform_data = &wm1250_ev1_pdata },
  635. };
  636. static struct s3c2410_platform_i2c i2c1_pdata = {
  637. .frequency = 400000,
  638. .bus_num = 1,
  639. };
  640. static void __init crag6410_map_io(void)
  641. {
  642. s3c64xx_init_io(NULL, 0);
  643. s3c24xx_init_clocks(12000000);
  644. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  645. /* LCD type and Bypass set by bootloader */
  646. }
  647. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  648. .max_width = 4,
  649. .cd_type = S3C_SDHCI_CD_PERMANENT,
  650. .host_caps = MMC_CAP_POWER_OFF_CARD,
  651. };
  652. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  653. {
  654. /* Set all the necessary GPG pins to special-function 2 */
  655. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  656. /* force card-detected for prototype 0 */
  657. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  658. }
  659. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  660. .max_width = 4,
  661. .cd_type = S3C_SDHCI_CD_INTERNAL,
  662. .cfg_gpio = crag6410_cfg_sdhci0,
  663. .host_caps = MMC_CAP_POWER_OFF_CARD,
  664. };
  665. static const struct gpio_led gpio_leds[] = {
  666. {
  667. .name = "d13:green:",
  668. .gpio = MMGPIO_GPIO_BASE + 0,
  669. .default_state = LEDS_GPIO_DEFSTATE_ON,
  670. },
  671. {
  672. .name = "d14:green:",
  673. .gpio = MMGPIO_GPIO_BASE + 1,
  674. .default_state = LEDS_GPIO_DEFSTATE_ON,
  675. },
  676. {
  677. .name = "d15:green:",
  678. .gpio = MMGPIO_GPIO_BASE + 2,
  679. .default_state = LEDS_GPIO_DEFSTATE_ON,
  680. },
  681. {
  682. .name = "d16:green:",
  683. .gpio = MMGPIO_GPIO_BASE + 3,
  684. .default_state = LEDS_GPIO_DEFSTATE_ON,
  685. },
  686. {
  687. .name = "d17:green:",
  688. .gpio = MMGPIO_GPIO_BASE + 4,
  689. .default_state = LEDS_GPIO_DEFSTATE_ON,
  690. },
  691. {
  692. .name = "d18:green:",
  693. .gpio = MMGPIO_GPIO_BASE + 5,
  694. .default_state = LEDS_GPIO_DEFSTATE_ON,
  695. },
  696. {
  697. .name = "d19:green:",
  698. .gpio = MMGPIO_GPIO_BASE + 6,
  699. .default_state = LEDS_GPIO_DEFSTATE_ON,
  700. },
  701. {
  702. .name = "d20:green:",
  703. .gpio = MMGPIO_GPIO_BASE + 7,
  704. .default_state = LEDS_GPIO_DEFSTATE_ON,
  705. },
  706. };
  707. static const struct gpio_led_platform_data gpio_leds_pdata = {
  708. .leds = gpio_leds,
  709. .num_leds = ARRAY_SIZE(gpio_leds),
  710. };
  711. static struct s3c_hsotg_plat crag6410_hsotg_pdata;
  712. static void __init crag6410_machine_init(void)
  713. {
  714. /* Open drain IRQs need pullups */
  715. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  716. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  717. gpio_request(S3C64XX_GPB(0), "LCD power");
  718. gpio_direction_output(S3C64XX_GPB(0), 0);
  719. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  720. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  721. gpio_request(S3C64XX_GPB(1), "SD power");
  722. gpio_direction_output(S3C64XX_GPB(1), 0);
  723. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  724. gpio_direction_output(S3C64XX_GPF(10), 1);
  725. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  726. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  727. s3c_i2c0_set_platdata(&i2c0_pdata);
  728. s3c_i2c1_set_platdata(&i2c1_pdata);
  729. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  730. s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
  731. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  732. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  733. samsung_keypad_set_platdata(&crag6410_keypad_data);
  734. s3c64xx_spi0_set_platdata(NULL, 0, 2);
  735. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  736. gpio_led_register_device(-1, &gpio_leds_pdata);
  737. regulator_has_full_constraints();
  738. s3c64xx_pm_init();
  739. }
  740. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  741. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  742. .atag_offset = 0x100,
  743. .init_irq = s3c6410_init_irq,
  744. .map_io = crag6410_map_io,
  745. .init_machine = crag6410_machine_init,
  746. .init_late = s3c64xx_init_late,
  747. .init_time = s3c24xx_timer_init,
  748. .restart = s3c64xx_restart,
  749. MACHINE_END