mach-vr1000.c 8.4 KB

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  1. /*
  2. * Copyright (c) 2003-2008 Simtec Electronics
  3. * Ben Dooks <ben@simtec.co.uk>
  4. *
  5. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  6. * Simtec Electronics, http://www.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/gpio.h>
  20. #include <linux/dm9000.h>
  21. #include <linux/i2c.h>
  22. #include <linux/serial.h>
  23. #include <linux/tty.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/serial_reg.h>
  26. #include <linux/io.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/irq.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach-types.h>
  32. #include <linux/platform_data/leds-s3c24xx.h>
  33. #include <linux/platform_data/i2c-s3c2410.h>
  34. #include <linux/platform_data/asoc-s3c24xx_simtec.h>
  35. #include <mach/hardware.h>
  36. #include <mach/regs-gpio.h>
  37. #include <plat/clock.h>
  38. #include <plat/cpu.h>
  39. #include <plat/devs.h>
  40. #include <plat/regs-serial.h>
  41. #include "bast.h"
  42. #include "common.h"
  43. #include "simtec.h"
  44. #include "vr1000.h"
  45. /* macros for virtual address mods for the io space entries */
  46. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  47. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  48. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  49. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  50. /* macros to modify the physical addresses for io space */
  51. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  52. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  53. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  54. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  55. static struct map_desc vr1000_iodesc[] __initdata = {
  56. /* ISA IO areas */
  57. {
  58. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  59. .pfn = PA_CS2(BAST_PA_ISAIO),
  60. .length = SZ_16M,
  61. .type = MT_DEVICE,
  62. }, {
  63. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  64. .pfn = PA_CS3(BAST_PA_ISAIO),
  65. .length = SZ_16M,
  66. .type = MT_DEVICE,
  67. },
  68. /* CPLD control registers, and external interrupt controls */
  69. {
  70. .virtual = (u32)VR1000_VA_CTRL1,
  71. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  72. .length = SZ_1M,
  73. .type = MT_DEVICE,
  74. }, {
  75. .virtual = (u32)VR1000_VA_CTRL2,
  76. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  77. .length = SZ_1M,
  78. .type = MT_DEVICE,
  79. }, {
  80. .virtual = (u32)VR1000_VA_CTRL3,
  81. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  82. .length = SZ_1M,
  83. .type = MT_DEVICE,
  84. }, {
  85. .virtual = (u32)VR1000_VA_CTRL4,
  86. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  87. .length = SZ_1M,
  88. .type = MT_DEVICE,
  89. },
  90. };
  91. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  92. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  93. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  94. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  95. [0] = {
  96. .hwport = 0,
  97. .flags = 0,
  98. .ucon = UCON,
  99. .ulcon = ULCON,
  100. .ufcon = UFCON,
  101. },
  102. [1] = {
  103. .hwport = 1,
  104. .flags = 0,
  105. .ucon = UCON,
  106. .ulcon = ULCON,
  107. .ufcon = UFCON,
  108. },
  109. /* port 2 is not actually used */
  110. [2] = {
  111. .hwport = 2,
  112. .flags = 0,
  113. .ucon = UCON,
  114. .ulcon = ULCON,
  115. .ufcon = UFCON,
  116. }
  117. };
  118. /* definitions for the vr1000 extra 16550 serial ports */
  119. #define VR1000_BAUDBASE (3692307)
  120. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  121. static struct plat_serial8250_port serial_platform_data[] = {
  122. [0] = {
  123. .mapbase = VR1000_SERIAL_MAPBASE(0),
  124. .irq = VR1000_IRQ_SERIAL + 0,
  125. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  126. .iotype = UPIO_MEM,
  127. .regshift = 0,
  128. .uartclk = VR1000_BAUDBASE,
  129. },
  130. [1] = {
  131. .mapbase = VR1000_SERIAL_MAPBASE(1),
  132. .irq = VR1000_IRQ_SERIAL + 1,
  133. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  134. .iotype = UPIO_MEM,
  135. .regshift = 0,
  136. .uartclk = VR1000_BAUDBASE,
  137. },
  138. [2] = {
  139. .mapbase = VR1000_SERIAL_MAPBASE(2),
  140. .irq = VR1000_IRQ_SERIAL + 2,
  141. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  142. .iotype = UPIO_MEM,
  143. .regshift = 0,
  144. .uartclk = VR1000_BAUDBASE,
  145. },
  146. [3] = {
  147. .mapbase = VR1000_SERIAL_MAPBASE(3),
  148. .irq = VR1000_IRQ_SERIAL + 3,
  149. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  150. .iotype = UPIO_MEM,
  151. .regshift = 0,
  152. .uartclk = VR1000_BAUDBASE,
  153. },
  154. { },
  155. };
  156. static struct platform_device serial_device = {
  157. .name = "serial8250",
  158. .id = PLAT8250_DEV_PLATFORM,
  159. .dev = {
  160. .platform_data = serial_platform_data,
  161. },
  162. };
  163. /* DM9000 ethernet devices */
  164. static struct resource vr1000_dm9k0_resource[] = {
  165. [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
  166. [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
  167. [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
  168. | IORESOURCE_IRQ_HIGHLEVEL),
  169. };
  170. static struct resource vr1000_dm9k1_resource[] = {
  171. [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
  172. [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
  173. [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
  174. | IORESOURCE_IRQ_HIGHLEVEL),
  175. };
  176. /* for the moment we limit ourselves to 16bit IO until some
  177. * better IO routines can be written and tested
  178. */
  179. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  180. .flags = DM9000_PLATF_16BITONLY,
  181. };
  182. static struct platform_device vr1000_dm9k0 = {
  183. .name = "dm9000",
  184. .id = 0,
  185. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  186. .resource = vr1000_dm9k0_resource,
  187. .dev = {
  188. .platform_data = &vr1000_dm9k_platdata,
  189. }
  190. };
  191. static struct platform_device vr1000_dm9k1 = {
  192. .name = "dm9000",
  193. .id = 1,
  194. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  195. .resource = vr1000_dm9k1_resource,
  196. .dev = {
  197. .platform_data = &vr1000_dm9k_platdata,
  198. }
  199. };
  200. /* LEDS */
  201. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  202. .name = "led1",
  203. .gpio = S3C2410_GPB(0),
  204. .def_trigger = "",
  205. };
  206. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  207. .name = "led2",
  208. .gpio = S3C2410_GPB(1),
  209. .def_trigger = "",
  210. };
  211. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  212. .name = "led3",
  213. .gpio = S3C2410_GPB(2),
  214. .def_trigger = "",
  215. };
  216. static struct platform_device vr1000_led1 = {
  217. .name = "s3c24xx_led",
  218. .id = 1,
  219. .dev = {
  220. .platform_data = &vr1000_led1_pdata,
  221. },
  222. };
  223. static struct platform_device vr1000_led2 = {
  224. .name = "s3c24xx_led",
  225. .id = 2,
  226. .dev = {
  227. .platform_data = &vr1000_led2_pdata,
  228. },
  229. };
  230. static struct platform_device vr1000_led3 = {
  231. .name = "s3c24xx_led",
  232. .id = 3,
  233. .dev = {
  234. .platform_data = &vr1000_led3_pdata,
  235. },
  236. };
  237. /* I2C devices. */
  238. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  239. {
  240. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  241. }, {
  242. I2C_BOARD_INFO("tmp101", 0x48),
  243. }, {
  244. I2C_BOARD_INFO("m41st87", 0x68),
  245. },
  246. };
  247. /* devices for this board */
  248. static struct platform_device *vr1000_devices[] __initdata = {
  249. &s3c_device_ohci,
  250. &s3c_device_lcd,
  251. &s3c_device_wdt,
  252. &s3c_device_i2c0,
  253. &s3c_device_adc,
  254. &serial_device,
  255. &vr1000_dm9k0,
  256. &vr1000_dm9k1,
  257. &vr1000_led1,
  258. &vr1000_led2,
  259. &vr1000_led3,
  260. };
  261. static struct clk *vr1000_clocks[] __initdata = {
  262. &s3c24xx_dclk0,
  263. &s3c24xx_dclk1,
  264. &s3c24xx_clkout0,
  265. &s3c24xx_clkout1,
  266. &s3c24xx_uclk,
  267. };
  268. static void vr1000_power_off(void)
  269. {
  270. gpio_direction_output(S3C2410_GPB(9), 1);
  271. }
  272. static void __init vr1000_map_io(void)
  273. {
  274. /* initialise clock sources */
  275. s3c24xx_dclk0.parent = &clk_upll;
  276. s3c24xx_dclk0.rate = 12*1000*1000;
  277. s3c24xx_dclk1.parent = NULL;
  278. s3c24xx_dclk1.rate = 3692307;
  279. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  280. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  281. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  282. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  283. pm_power_off = vr1000_power_off;
  284. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  285. s3c24xx_init_clocks(0);
  286. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  287. }
  288. static void __init vr1000_init(void)
  289. {
  290. s3c_i2c0_set_platdata(NULL);
  291. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  292. i2c_register_board_info(0, vr1000_i2c_devs,
  293. ARRAY_SIZE(vr1000_i2c_devs));
  294. nor_simtec_init();
  295. simtec_audio_add(NULL, true, NULL);
  296. WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
  297. }
  298. MACHINE_START(VR1000, "Thorcom-VR1000")
  299. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  300. .atag_offset = 0x100,
  301. .map_io = vr1000_map_io,
  302. .init_machine = vr1000_init,
  303. .init_irq = s3c24xx_init_irq,
  304. .init_time = s3c24xx_timer_init,
  305. .restart = s3c2410_restart,
  306. MACHINE_END