mach-jive.c 17 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-jive.c
  2. *
  3. * Copyright 2007 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/gpio.h>
  19. #include <linux/syscore_ops.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/i2c.h>
  23. #include <video/ili9320.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/spi_gpio.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/mach/irq.h>
  29. #include <plat/regs-serial.h>
  30. #include <linux/platform_data/mtd-nand-s3c2410.h>
  31. #include <linux/platform_data/i2c-s3c2410.h>
  32. #include <mach/regs-gpio.h>
  33. #include <mach/regs-lcd.h>
  34. #include <mach/fb.h>
  35. #include <asm/mach-types.h>
  36. #include <linux/mtd/mtd.h>
  37. #include <linux/mtd/nand.h>
  38. #include <linux/mtd/nand_ecc.h>
  39. #include <linux/mtd/partitions.h>
  40. #include <plat/s3c2412.h>
  41. #include <plat/gpio-cfg.h>
  42. #include <plat/clock.h>
  43. #include <plat/devs.h>
  44. #include <plat/cpu.h>
  45. #include <plat/pm.h>
  46. #include <linux/platform_data/usb-s3c2410_udc.h>
  47. #include "s3c2412-power.h"
  48. static struct map_desc jive_iodesc[] __initdata = {
  49. };
  50. #define UCON S3C2410_UCON_DEFAULT
  51. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
  52. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  53. static struct s3c2410_uartcfg jive_uartcfgs[] = {
  54. [0] = {
  55. .hwport = 0,
  56. .flags = 0,
  57. .ucon = UCON,
  58. .ulcon = ULCON,
  59. .ufcon = UFCON,
  60. },
  61. [1] = {
  62. .hwport = 1,
  63. .flags = 0,
  64. .ucon = UCON,
  65. .ulcon = ULCON,
  66. .ufcon = UFCON,
  67. },
  68. [2] = {
  69. .hwport = 2,
  70. .flags = 0,
  71. .ucon = UCON,
  72. .ulcon = ULCON,
  73. .ufcon = UFCON,
  74. }
  75. };
  76. /* Jive flash assignment
  77. *
  78. * 0x00000000-0x00028000 : uboot
  79. * 0x00028000-0x0002c000 : uboot env
  80. * 0x0002c000-0x00030000 : spare
  81. * 0x00030000-0x00200000 : zimage A
  82. * 0x00200000-0x01600000 : cramfs A
  83. * 0x01600000-0x017d0000 : zimage B
  84. * 0x017d0000-0x02bd0000 : cramfs B
  85. * 0x02bd0000-0x03fd0000 : yaffs
  86. */
  87. static struct mtd_partition __initdata jive_imageA_nand_part[] = {
  88. #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
  89. /* Don't allow access to the bootloader from linux */
  90. {
  91. .name = "uboot",
  92. .offset = 0,
  93. .size = (160 * SZ_1K),
  94. .mask_flags = MTD_WRITEABLE, /* force read-only */
  95. },
  96. /* spare */
  97. {
  98. .name = "spare",
  99. .offset = (176 * SZ_1K),
  100. .size = (16 * SZ_1K),
  101. },
  102. #endif
  103. /* booted images */
  104. {
  105. .name = "kernel (ro)",
  106. .offset = (192 * SZ_1K),
  107. .size = (SZ_2M) - (192 * SZ_1K),
  108. .mask_flags = MTD_WRITEABLE, /* force read-only */
  109. }, {
  110. .name = "root (ro)",
  111. .offset = (SZ_2M),
  112. .size = (20 * SZ_1M),
  113. .mask_flags = MTD_WRITEABLE, /* force read-only */
  114. },
  115. /* yaffs */
  116. {
  117. .name = "yaffs",
  118. .offset = (44 * SZ_1M),
  119. .size = (20 * SZ_1M),
  120. },
  121. /* bootloader environment */
  122. {
  123. .name = "env",
  124. .offset = (160 * SZ_1K),
  125. .size = (16 * SZ_1K),
  126. },
  127. /* upgrade images */
  128. {
  129. .name = "zimage",
  130. .offset = (22 * SZ_1M),
  131. .size = (2 * SZ_1M) - (192 * SZ_1K),
  132. }, {
  133. .name = "cramfs",
  134. .offset = (24 * SZ_1M) - (192*SZ_1K),
  135. .size = (20 * SZ_1M),
  136. },
  137. };
  138. static struct mtd_partition __initdata jive_imageB_nand_part[] = {
  139. #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
  140. /* Don't allow access to the bootloader from linux */
  141. {
  142. .name = "uboot",
  143. .offset = 0,
  144. .size = (160 * SZ_1K),
  145. .mask_flags = MTD_WRITEABLE, /* force read-only */
  146. },
  147. /* spare */
  148. {
  149. .name = "spare",
  150. .offset = (176 * SZ_1K),
  151. .size = (16 * SZ_1K),
  152. },
  153. #endif
  154. /* booted images */
  155. {
  156. .name = "kernel (ro)",
  157. .offset = (22 * SZ_1M),
  158. .size = (2 * SZ_1M) - (192 * SZ_1K),
  159. .mask_flags = MTD_WRITEABLE, /* force read-only */
  160. },
  161. {
  162. .name = "root (ro)",
  163. .offset = (24 * SZ_1M) - (192 * SZ_1K),
  164. .size = (20 * SZ_1M),
  165. .mask_flags = MTD_WRITEABLE, /* force read-only */
  166. },
  167. /* yaffs */
  168. {
  169. .name = "yaffs",
  170. .offset = (44 * SZ_1M),
  171. .size = (20 * SZ_1M),
  172. },
  173. /* bootloader environment */
  174. {
  175. .name = "env",
  176. .offset = (160 * SZ_1K),
  177. .size = (16 * SZ_1K),
  178. },
  179. /* upgrade images */
  180. {
  181. .name = "zimage",
  182. .offset = (192 * SZ_1K),
  183. .size = (2 * SZ_1M) - (192 * SZ_1K),
  184. }, {
  185. .name = "cramfs",
  186. .offset = (2 * SZ_1M),
  187. .size = (20 * SZ_1M),
  188. },
  189. };
  190. static struct s3c2410_nand_set __initdata jive_nand_sets[] = {
  191. [0] = {
  192. .name = "flash",
  193. .nr_chips = 1,
  194. .nr_partitions = ARRAY_SIZE(jive_imageA_nand_part),
  195. .partitions = jive_imageA_nand_part,
  196. },
  197. };
  198. static struct s3c2410_platform_nand __initdata jive_nand_info = {
  199. /* set taken from osiris nand timings, possibly still conservative */
  200. .tacls = 30,
  201. .twrph0 = 55,
  202. .twrph1 = 40,
  203. .sets = jive_nand_sets,
  204. .nr_sets = ARRAY_SIZE(jive_nand_sets),
  205. };
  206. static int __init jive_mtdset(char *options)
  207. {
  208. struct s3c2410_nand_set *nand = &jive_nand_sets[0];
  209. unsigned long set;
  210. if (options == NULL || options[0] == '\0')
  211. return 0;
  212. if (strict_strtoul(options, 10, &set)) {
  213. printk(KERN_ERR "failed to parse mtdset=%s\n", options);
  214. return 0;
  215. }
  216. switch (set) {
  217. case 1:
  218. nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part);
  219. nand->partitions = jive_imageB_nand_part;
  220. case 0:
  221. /* this is already setup in the nand info */
  222. break;
  223. default:
  224. printk(KERN_ERR "Unknown mtd set %ld specified,"
  225. "using default.", set);
  226. }
  227. return 0;
  228. }
  229. /* parse the mtdset= option given to the kernel command line */
  230. __setup("mtdset=", jive_mtdset);
  231. /* LCD timing and setup */
  232. #define LCD_XRES (240)
  233. #define LCD_YRES (320)
  234. #define LCD_LEFT_MARGIN (12)
  235. #define LCD_RIGHT_MARGIN (12)
  236. #define LCD_LOWER_MARGIN (12)
  237. #define LCD_UPPER_MARGIN (12)
  238. #define LCD_VSYNC (2)
  239. #define LCD_HSYNC (2)
  240. #define LCD_REFRESH (60)
  241. #define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
  242. #define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
  243. static struct s3c2410fb_display jive_vgg2432a4_display[] = {
  244. [0] = {
  245. .width = LCD_XRES,
  246. .height = LCD_YRES,
  247. .xres = LCD_XRES,
  248. .yres = LCD_YRES,
  249. .left_margin = LCD_LEFT_MARGIN,
  250. .right_margin = LCD_RIGHT_MARGIN,
  251. .upper_margin = LCD_UPPER_MARGIN,
  252. .lower_margin = LCD_LOWER_MARGIN,
  253. .hsync_len = LCD_HSYNC,
  254. .vsync_len = LCD_VSYNC,
  255. .pixclock = (1000000000000LL /
  256. (LCD_REFRESH * LCD_HTOT * LCD_VTOT)),
  257. .bpp = 16,
  258. .type = (S3C2410_LCDCON1_TFT16BPP |
  259. S3C2410_LCDCON1_TFT),
  260. .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
  261. S3C2410_LCDCON5_INVVLINE |
  262. S3C2410_LCDCON5_INVVFRAME |
  263. S3C2410_LCDCON5_INVVDEN |
  264. S3C2410_LCDCON5_PWREN),
  265. },
  266. };
  267. /* todo - put into gpio header */
  268. #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
  269. #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
  270. static struct s3c2410fb_mach_info jive_lcd_config = {
  271. .displays = jive_vgg2432a4_display,
  272. .num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
  273. .default_display = 0,
  274. /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
  275. * and disable the pull down resistors on pins we are using for LCD
  276. * data. */
  277. .gpcup = (0xf << 1) | (0x3f << 10),
  278. .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE |
  279. S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
  280. S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 |
  281. S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 |
  282. S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7),
  283. .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) |
  284. S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) |
  285. S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
  286. S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
  287. S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
  288. .gpdup = (0x3f << 2) | (0x3f << 10),
  289. .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 |
  290. S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 |
  291. S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 |
  292. S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
  293. S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
  294. S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
  295. .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) |
  296. S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) |
  297. S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) |
  298. S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
  299. S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
  300. S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
  301. };
  302. /* ILI9320 support. */
  303. static void jive_lcm_reset(unsigned int set)
  304. {
  305. printk(KERN_DEBUG "%s(%d)\n", __func__, set);
  306. gpio_set_value(S3C2410_GPG(13), set);
  307. }
  308. #undef LCD_UPPER_MARGIN
  309. #define LCD_UPPER_MARGIN 2
  310. static struct ili9320_platdata jive_lcm_config = {
  311. .hsize = LCD_XRES,
  312. .vsize = LCD_YRES,
  313. .reset = jive_lcm_reset,
  314. .suspend = ILI9320_SUSPEND_DEEP,
  315. .entry_mode = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR,
  316. .display2 = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) |
  317. ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)),
  318. .display3 = 0x0,
  319. .display4 = 0x0,
  320. .rgb_if1 = (ILI9320_RGBIF1_RIM_RGB18 |
  321. ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF),
  322. .rgb_if2 = ILI9320_RGBIF2_DPL,
  323. .interface2 = 0x0,
  324. .interface3 = 0x3,
  325. .interface4 = (ILI9320_INTERFACE4_RTNE(16) |
  326. ILI9320_INTERFACE4_DIVE(1)),
  327. .interface5 = 0x0,
  328. .interface6 = 0x0,
  329. };
  330. /* LCD SPI support */
  331. static struct spi_gpio_platform_data jive_lcd_spi = {
  332. .sck = S3C2410_GPG(8),
  333. .mosi = S3C2410_GPB(8),
  334. .miso = SPI_GPIO_NO_MISO,
  335. };
  336. static struct platform_device jive_device_lcdspi = {
  337. .name = "spi-gpio",
  338. .id = 1,
  339. .dev.platform_data = &jive_lcd_spi,
  340. };
  341. /* WM8750 audio code SPI definition */
  342. static struct spi_gpio_platform_data jive_wm8750_spi = {
  343. .sck = S3C2410_GPB(4),
  344. .mosi = S3C2410_GPB(9),
  345. .miso = SPI_GPIO_NO_MISO,
  346. };
  347. static struct platform_device jive_device_wm8750 = {
  348. .name = "spi-gpio",
  349. .id = 2,
  350. .dev.platform_data = &jive_wm8750_spi,
  351. };
  352. /* JIVE SPI devices. */
  353. static struct spi_board_info __initdata jive_spi_devs[] = {
  354. [0] = {
  355. .modalias = "VGG2432A4",
  356. .bus_num = 1,
  357. .chip_select = 0,
  358. .mode = SPI_MODE_3, /* CPOL=1, CPHA=1 */
  359. .max_speed_hz = 100000,
  360. .platform_data = &jive_lcm_config,
  361. .controller_data = (void *)S3C2410_GPB(7),
  362. }, {
  363. .modalias = "WM8750",
  364. .bus_num = 2,
  365. .chip_select = 0,
  366. .mode = SPI_MODE_0, /* CPOL=0, CPHA=0 */
  367. .max_speed_hz = 100000,
  368. .controller_data = (void *)S3C2410_GPH(10),
  369. },
  370. };
  371. /* I2C bus and device configuration. */
  372. static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
  373. .frequency = 80 * 1000,
  374. .flags = S3C_IICFLG_FILTER,
  375. .sda_delay = 2,
  376. };
  377. static struct i2c_board_info jive_i2c_devs[] __initdata = {
  378. [0] = {
  379. I2C_BOARD_INFO("lis302dl", 0x1c),
  380. .irq = IRQ_EINT14,
  381. },
  382. };
  383. /* The platform devices being used. */
  384. static struct platform_device *jive_devices[] __initdata = {
  385. &s3c_device_ohci,
  386. &s3c_device_rtc,
  387. &s3c_device_wdt,
  388. &s3c_device_i2c0,
  389. &s3c_device_lcd,
  390. &jive_device_lcdspi,
  391. &jive_device_wm8750,
  392. &s3c_device_nand,
  393. &s3c_device_usbgadget,
  394. };
  395. static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
  396. .vbus_pin = S3C2410_GPG(1), /* detect is on GPG1 */
  397. };
  398. /* Jive power management device */
  399. #ifdef CONFIG_PM
  400. static int jive_pm_suspend(void)
  401. {
  402. /* Write the magic value u-boot uses to check for resume into
  403. * the INFORM0 register, and ensure INFORM1 is set to the
  404. * correct address to resume from. */
  405. __raw_writel(0x2BED, S3C2412_INFORM0);
  406. __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
  407. return 0;
  408. }
  409. static void jive_pm_resume(void)
  410. {
  411. __raw_writel(0x0, S3C2412_INFORM0);
  412. }
  413. #else
  414. #define jive_pm_suspend NULL
  415. #define jive_pm_resume NULL
  416. #endif
  417. static struct syscore_ops jive_pm_syscore_ops = {
  418. .suspend = jive_pm_suspend,
  419. .resume = jive_pm_resume,
  420. };
  421. static void __init jive_map_io(void)
  422. {
  423. s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
  424. s3c24xx_init_clocks(12000000);
  425. s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
  426. }
  427. static void jive_power_off(void)
  428. {
  429. printk(KERN_INFO "powering system down...\n");
  430. gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL);
  431. gpio_free(S3C2410_GPC(5));
  432. }
  433. static void __init jive_machine_init(void)
  434. {
  435. /* register system core operations for managing low level suspend */
  436. register_syscore_ops(&jive_pm_syscore_ops);
  437. /* write our sleep configurations for the IO. Pull down all unused
  438. * IO, ensure that we have turned off all peripherals we do not
  439. * need, and configure the ones we do need. */
  440. /* Port B sleep */
  441. __raw_writel(S3C2412_SLPCON_IN(0) |
  442. S3C2412_SLPCON_PULL(1) |
  443. S3C2412_SLPCON_HIGH(2) |
  444. S3C2412_SLPCON_PULL(3) |
  445. S3C2412_SLPCON_PULL(4) |
  446. S3C2412_SLPCON_PULL(5) |
  447. S3C2412_SLPCON_PULL(6) |
  448. S3C2412_SLPCON_HIGH(7) |
  449. S3C2412_SLPCON_PULL(8) |
  450. S3C2412_SLPCON_PULL(9) |
  451. S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON);
  452. /* Port C sleep */
  453. __raw_writel(S3C2412_SLPCON_PULL(0) |
  454. S3C2412_SLPCON_PULL(1) |
  455. S3C2412_SLPCON_PULL(2) |
  456. S3C2412_SLPCON_PULL(3) |
  457. S3C2412_SLPCON_PULL(4) |
  458. S3C2412_SLPCON_PULL(5) |
  459. S3C2412_SLPCON_LOW(6) |
  460. S3C2412_SLPCON_PULL(6) |
  461. S3C2412_SLPCON_PULL(7) |
  462. S3C2412_SLPCON_PULL(8) |
  463. S3C2412_SLPCON_PULL(9) |
  464. S3C2412_SLPCON_PULL(10) |
  465. S3C2412_SLPCON_PULL(11) |
  466. S3C2412_SLPCON_PULL(12) |
  467. S3C2412_SLPCON_PULL(13) |
  468. S3C2412_SLPCON_PULL(14) |
  469. S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON);
  470. /* Port D sleep */
  471. __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON);
  472. /* Port F sleep */
  473. __raw_writel(S3C2412_SLPCON_LOW(0) |
  474. S3C2412_SLPCON_LOW(1) |
  475. S3C2412_SLPCON_LOW(2) |
  476. S3C2412_SLPCON_EINT(3) |
  477. S3C2412_SLPCON_EINT(4) |
  478. S3C2412_SLPCON_EINT(5) |
  479. S3C2412_SLPCON_EINT(6) |
  480. S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON);
  481. /* Port G sleep */
  482. __raw_writel(S3C2412_SLPCON_IN(0) |
  483. S3C2412_SLPCON_IN(1) |
  484. S3C2412_SLPCON_IN(2) |
  485. S3C2412_SLPCON_IN(3) |
  486. S3C2412_SLPCON_IN(4) |
  487. S3C2412_SLPCON_IN(5) |
  488. S3C2412_SLPCON_IN(6) |
  489. S3C2412_SLPCON_IN(7) |
  490. S3C2412_SLPCON_PULL(8) |
  491. S3C2412_SLPCON_PULL(9) |
  492. S3C2412_SLPCON_IN(10) |
  493. S3C2412_SLPCON_PULL(11) |
  494. S3C2412_SLPCON_PULL(12) |
  495. S3C2412_SLPCON_PULL(13) |
  496. S3C2412_SLPCON_IN(14) |
  497. S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON);
  498. /* Port H sleep */
  499. __raw_writel(S3C2412_SLPCON_PULL(0) |
  500. S3C2412_SLPCON_PULL(1) |
  501. S3C2412_SLPCON_PULL(2) |
  502. S3C2412_SLPCON_PULL(3) |
  503. S3C2412_SLPCON_PULL(4) |
  504. S3C2412_SLPCON_PULL(5) |
  505. S3C2412_SLPCON_PULL(6) |
  506. S3C2412_SLPCON_IN(7) |
  507. S3C2412_SLPCON_IN(8) |
  508. S3C2412_SLPCON_PULL(9) |
  509. S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON);
  510. /* initialise the power management now we've setup everything. */
  511. s3c_pm_init();
  512. /** TODO - check that this is after the cmdline option! */
  513. s3c_nand_set_platdata(&jive_nand_info);
  514. /* initialise the spi */
  515. gpio_request(S3C2410_GPG(13), "lcm reset");
  516. gpio_direction_output(S3C2410_GPG(13), 0);
  517. gpio_request(S3C2410_GPB(7), "jive spi");
  518. gpio_direction_output(S3C2410_GPB(7), 1);
  519. gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL);
  520. gpio_free(S3C2410_GPB(6));
  521. gpio_request_one(S3C2410_GPG(8), GPIOF_OUT_INIT_HIGH, NULL);
  522. gpio_free(S3C2410_GPG(8));
  523. /* initialise the WM8750 spi */
  524. gpio_request(S3C2410_GPH(10), "jive wm8750 spi");
  525. gpio_direction_output(S3C2410_GPH(10), 1);
  526. /* Turn off suspend on both USB ports, and switch the
  527. * selectable USB port to USB device mode. */
  528. s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
  529. S3C2410_MISCCR_USBSUSPND0 |
  530. S3C2410_MISCCR_USBSUSPND1, 0x0);
  531. s3c24xx_udc_set_platdata(&jive_udc_cfg);
  532. s3c24xx_fb_set_platdata(&jive_lcd_config);
  533. spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs));
  534. s3c_i2c0_set_platdata(&jive_i2c_cfg);
  535. i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs));
  536. pm_power_off = jive_power_off;
  537. platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
  538. }
  539. MACHINE_START(JIVE, "JIVE")
  540. /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
  541. .atag_offset = 0x100,
  542. .init_irq = s3c24xx_init_irq,
  543. .map_io = jive_map_io,
  544. .init_machine = jive_machine_init,
  545. .init_time = s3c24xx_timer_init,
  546. .restart = s3c2412_restart,
  547. MACHINE_END