dma-s3c2410.c 4.5 KB

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  1. /* linux/arch/arm/mach-s3c2410/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <plat/cpu.h>
  21. #include <plat/dma-s3c24xx.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <plat/regs-dma.h>
  26. #include <mach/regs-lcd.h>
  27. #include <mach/regs-sdi.h>
  28. #include <plat/regs-iis.h>
  29. #include <plat/regs-spi.h>
  30. static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
  31. [DMACH_XD0] = {
  32. .name = "xdreq0",
  33. .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  34. },
  35. [DMACH_XD1] = {
  36. .name = "xdreq1",
  37. .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  38. },
  39. [DMACH_SDI] = {
  40. .name = "sdi",
  41. .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  42. .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  43. .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  44. },
  45. [DMACH_SPI0] = {
  46. .name = "spi0",
  47. .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  48. },
  49. [DMACH_SPI1] = {
  50. .name = "spi1",
  51. .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  52. },
  53. [DMACH_UART0] = {
  54. .name = "uart0",
  55. .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  56. },
  57. [DMACH_UART1] = {
  58. .name = "uart1",
  59. .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  60. },
  61. [DMACH_UART2] = {
  62. .name = "uart2",
  63. .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  64. },
  65. [DMACH_TIMER] = {
  66. .name = "timer",
  67. .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  68. .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  69. .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  70. },
  71. [DMACH_I2S_IN] = {
  72. .name = "i2s-sdi",
  73. .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  74. .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  75. },
  76. [DMACH_I2S_OUT] = {
  77. .name = "i2s-sdo",
  78. .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  79. },
  80. [DMACH_USB_EP1] = {
  81. .name = "usb-ep1",
  82. .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  83. },
  84. [DMACH_USB_EP2] = {
  85. .name = "usb-ep2",
  86. .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  87. },
  88. [DMACH_USB_EP3] = {
  89. .name = "usb-ep3",
  90. .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  91. },
  92. [DMACH_USB_EP4] = {
  93. .name = "usb-ep4",
  94. .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
  95. },
  96. };
  97. static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
  98. struct s3c24xx_dma_map *map)
  99. {
  100. chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
  101. }
  102. static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
  103. .select = s3c2410_dma_select,
  104. .dcon_mask = 7 << 24,
  105. .map = s3c2410_dma_mappings,
  106. .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
  107. };
  108. static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
  109. .channels = {
  110. [DMACH_SDI] = {
  111. .list = {
  112. [0] = 3 | DMA_CH_VALID,
  113. [1] = 2 | DMA_CH_VALID,
  114. [2] = 0 | DMA_CH_VALID,
  115. },
  116. },
  117. [DMACH_I2S_IN] = {
  118. .list = {
  119. [0] = 1 | DMA_CH_VALID,
  120. [1] = 2 | DMA_CH_VALID,
  121. },
  122. },
  123. },
  124. };
  125. static int __init s3c2410_dma_add(struct device *dev,
  126. struct subsys_interface *sif)
  127. {
  128. s3c2410_dma_init();
  129. s3c24xx_dma_order_set(&s3c2410_dma_order);
  130. return s3c24xx_dma_init_map(&s3c2410_dma_sel);
  131. }
  132. #if defined(CONFIG_CPU_S3C2410)
  133. static struct subsys_interface s3c2410_dma_interface = {
  134. .name = "s3c2410_dma",
  135. .subsys = &s3c2410_subsys,
  136. .add_dev = s3c2410_dma_add,
  137. };
  138. static int __init s3c2410_dma_drvinit(void)
  139. {
  140. return subsys_interface_register(&s3c2410_dma_interface);
  141. }
  142. arch_initcall(s3c2410_dma_drvinit);
  143. static struct subsys_interface s3c2410a_dma_interface = {
  144. .name = "s3c2410a_dma",
  145. .subsys = &s3c2410a_subsys,
  146. .add_dev = s3c2410_dma_add,
  147. };
  148. static int __init s3c2410a_dma_drvinit(void)
  149. {
  150. return subsys_interface_register(&s3c2410a_dma_interface);
  151. }
  152. arch_initcall(s3c2410a_dma_drvinit);
  153. #endif
  154. #if defined(CONFIG_CPU_S3C2442)
  155. /* S3C2442 DMA contains the same selection table as the S3C2410 */
  156. static struct subsys_interface s3c2442_dma_interface = {
  157. .name = "s3c2442_dma",
  158. .subsys = &s3c2442_subsys,
  159. .add_dev = s3c2410_dma_add,
  160. };
  161. static int __init s3c2442_dma_drvinit(void)
  162. {
  163. return subsys_interface_register(&s3c2442_dma_interface);
  164. }
  165. arch_initcall(s3c2442_dma_drvinit);
  166. #endif