realview_eb.c 13 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_eb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/device.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/amba/pl022.h>
  28. #include <linux/io.h>
  29. #include <linux/irqchip/arm-gic.h>
  30. #include <linux/platform_data/clk-realview.h>
  31. #include <mach/hardware.h>
  32. #include <asm/irq.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/hardware/cache-l2x0.h>
  36. #include <asm/smp_twd.h>
  37. #include <asm/mach/arch.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/mach/time.h>
  40. #include <mach/board-eb.h>
  41. #include <mach/irqs.h>
  42. #include "core.h"
  43. static struct map_desc realview_eb_io_desc[] __initdata = {
  44. {
  45. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  46. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  47. .length = SZ_4K,
  48. .type = MT_DEVICE,
  49. }, {
  50. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
  51. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
  52. .length = SZ_4K,
  53. .type = MT_DEVICE,
  54. }, {
  55. .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
  56. .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
  57. .length = SZ_4K,
  58. .type = MT_DEVICE,
  59. }, {
  60. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  61. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  62. .length = SZ_4K,
  63. .type = MT_DEVICE,
  64. }, {
  65. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
  66. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
  67. .length = SZ_4K,
  68. .type = MT_DEVICE,
  69. }, {
  70. .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
  71. .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
  72. .length = SZ_4K,
  73. .type = MT_DEVICE,
  74. },
  75. #ifdef CONFIG_DEBUG_LL
  76. {
  77. .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
  78. .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
  79. .length = SZ_4K,
  80. .type = MT_DEVICE,
  81. }
  82. #endif
  83. };
  84. static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  85. {
  86. .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
  87. .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
  88. .length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
  89. .type = MT_DEVICE,
  90. }, {
  91. .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
  92. .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
  93. .length = SZ_8K,
  94. .type = MT_DEVICE,
  95. }
  96. };
  97. static void __init realview_eb_map_io(void)
  98. {
  99. iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
  100. if (core_tile_eb11mp() || core_tile_a9mp())
  101. iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
  102. }
  103. static struct pl061_platform_data gpio0_plat_data = {
  104. .gpio_base = 0,
  105. };
  106. static struct pl061_platform_data gpio1_plat_data = {
  107. .gpio_base = 8,
  108. };
  109. static struct pl061_platform_data gpio2_plat_data = {
  110. .gpio_base = 16,
  111. };
  112. static struct pl022_ssp_controller ssp0_plat_data = {
  113. .bus_id = 0,
  114. .enable_dma = 0,
  115. .num_chipselect = 1,
  116. };
  117. /*
  118. * RealView EB AMBA devices
  119. */
  120. /*
  121. * These devices are connected via the core APB bridge
  122. */
  123. #define GPIO2_IRQ { IRQ_EB_GPIO2 }
  124. #define GPIO3_IRQ { IRQ_EB_GPIO3 }
  125. #define AACI_IRQ { IRQ_EB_AACI }
  126. #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
  127. #define KMI0_IRQ { IRQ_EB_KMI0 }
  128. #define KMI1_IRQ { IRQ_EB_KMI1 }
  129. /*
  130. * These devices are connected directly to the multi-layer AHB switch
  131. */
  132. #define EB_SMC_IRQ { }
  133. #define MPMC_IRQ { }
  134. #define EB_CLCD_IRQ { IRQ_EB_CLCD }
  135. #define DMAC_IRQ { IRQ_EB_DMA }
  136. /*
  137. * These devices are connected via the core APB bridge
  138. */
  139. #define SCTL_IRQ { }
  140. #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
  141. #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
  142. #define GPIO1_IRQ { IRQ_EB_GPIO1 }
  143. #define EB_RTC_IRQ { IRQ_EB_RTC }
  144. /*
  145. * These devices are connected via the DMA APB bridge
  146. */
  147. #define SCI_IRQ { IRQ_EB_SCI }
  148. #define EB_UART0_IRQ { IRQ_EB_UART0 }
  149. #define EB_UART1_IRQ { IRQ_EB_UART1 }
  150. #define EB_UART2_IRQ { IRQ_EB_UART2 }
  151. #define EB_UART3_IRQ { IRQ_EB_UART3 }
  152. #define EB_SSP_IRQ { IRQ_EB_SSP }
  153. /* FPGA Primecells */
  154. APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  155. APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  156. APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  157. APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  158. APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
  159. /* DevChip Primecells */
  160. AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
  161. AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
  162. AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
  163. AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  164. APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
  165. APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
  166. APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  167. APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  168. APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
  169. APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
  170. APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
  171. APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
  172. APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
  173. APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
  174. static struct amba_device *amba_devs[] __initdata = {
  175. &dmac_device,
  176. &uart0_device,
  177. &uart1_device,
  178. &uart2_device,
  179. &uart3_device,
  180. &smc_device,
  181. &clcd_device,
  182. &sctl_device,
  183. &wdog_device,
  184. &gpio0_device,
  185. &gpio1_device,
  186. &gpio2_device,
  187. &rtc_device,
  188. &sci0_device,
  189. &ssp0_device,
  190. &aaci_device,
  191. &mmc0_device,
  192. &kmi0_device,
  193. &kmi1_device,
  194. };
  195. /*
  196. * RealView EB platform devices
  197. */
  198. static struct resource realview_eb_flash_resource = {
  199. .start = REALVIEW_EB_FLASH_BASE,
  200. .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
  201. .flags = IORESOURCE_MEM,
  202. };
  203. static struct resource realview_eb_eth_resources[] = {
  204. [0] = {
  205. .start = REALVIEW_EB_ETH_BASE,
  206. .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
  207. .flags = IORESOURCE_MEM,
  208. },
  209. [1] = {
  210. .start = IRQ_EB_ETH,
  211. .end = IRQ_EB_ETH,
  212. .flags = IORESOURCE_IRQ,
  213. },
  214. };
  215. /*
  216. * Detect and register the correct Ethernet device. RealView/EB rev D
  217. * platforms use the newer SMSC LAN9118 Ethernet chip
  218. */
  219. static int eth_device_register(void)
  220. {
  221. void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
  222. const char *name = NULL;
  223. u32 idrev;
  224. if (!eth_addr)
  225. return -ENOMEM;
  226. idrev = readl(eth_addr + 0x50);
  227. if ((idrev & 0xFFFF0000) != 0x01180000)
  228. /* SMSC LAN9118 not present, use LAN91C111 instead */
  229. name = "smc91x";
  230. iounmap(eth_addr);
  231. return realview_eth_register(name, realview_eb_eth_resources);
  232. }
  233. static struct resource realview_eb_isp1761_resources[] = {
  234. [0] = {
  235. .start = REALVIEW_EB_USB_BASE,
  236. .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = IRQ_EB_USB,
  241. .end = IRQ_EB_USB,
  242. .flags = IORESOURCE_IRQ,
  243. },
  244. };
  245. static struct resource pmu_resources[] = {
  246. [0] = {
  247. .start = IRQ_EB11MP_PMU_CPU0,
  248. .end = IRQ_EB11MP_PMU_CPU0,
  249. .flags = IORESOURCE_IRQ,
  250. },
  251. [1] = {
  252. .start = IRQ_EB11MP_PMU_CPU1,
  253. .end = IRQ_EB11MP_PMU_CPU1,
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. [2] = {
  257. .start = IRQ_EB11MP_PMU_CPU2,
  258. .end = IRQ_EB11MP_PMU_CPU2,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. [3] = {
  262. .start = IRQ_EB11MP_PMU_CPU3,
  263. .end = IRQ_EB11MP_PMU_CPU3,
  264. .flags = IORESOURCE_IRQ,
  265. },
  266. };
  267. static struct platform_device pmu_device = {
  268. .name = "arm-pmu",
  269. .id = -1,
  270. .num_resources = ARRAY_SIZE(pmu_resources),
  271. .resource = pmu_resources,
  272. };
  273. static struct resource char_lcd_resources[] = {
  274. {
  275. .start = REALVIEW_CHAR_LCD_BASE,
  276. .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
  277. .flags = IORESOURCE_MEM,
  278. },
  279. {
  280. .start = IRQ_EB_CHARLCD,
  281. .end = IRQ_EB_CHARLCD,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. };
  285. static struct platform_device char_lcd_device = {
  286. .name = "arm-charlcd",
  287. .id = -1,
  288. .num_resources = ARRAY_SIZE(char_lcd_resources),
  289. .resource = char_lcd_resources,
  290. };
  291. static void __init gic_init_irq(void)
  292. {
  293. if (core_tile_eb11mp() || core_tile_a9mp()) {
  294. unsigned int pldctrl;
  295. /* new irq mode */
  296. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  297. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  298. pldctrl |= 0x00800000;
  299. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  300. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  301. /* core tile GIC, primary */
  302. gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
  303. __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
  304. #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
  305. /* board GIC, secondary */
  306. gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  307. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  308. gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
  309. #endif
  310. } else {
  311. /* board GIC, primary */
  312. gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  313. __io_address(REALVIEW_EB_GIC_CPU_BASE));
  314. }
  315. }
  316. /*
  317. * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
  318. */
  319. static void realview_eb11mp_fixup(void)
  320. {
  321. /* AMBA devices */
  322. dmac_device.irq[0] = IRQ_EB11MP_DMA;
  323. uart0_device.irq[0] = IRQ_EB11MP_UART0;
  324. uart1_device.irq[0] = IRQ_EB11MP_UART1;
  325. uart2_device.irq[0] = IRQ_EB11MP_UART2;
  326. uart3_device.irq[0] = IRQ_EB11MP_UART3;
  327. clcd_device.irq[0] = IRQ_EB11MP_CLCD;
  328. wdog_device.irq[0] = IRQ_EB11MP_WDOG;
  329. gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
  330. gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
  331. gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
  332. rtc_device.irq[0] = IRQ_EB11MP_RTC;
  333. sci0_device.irq[0] = IRQ_EB11MP_SCI;
  334. ssp0_device.irq[0] = IRQ_EB11MP_SSP;
  335. aaci_device.irq[0] = IRQ_EB11MP_AACI;
  336. mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
  337. mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
  338. kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
  339. kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
  340. /* platform devices */
  341. realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
  342. realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
  343. realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
  344. realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
  345. }
  346. #ifdef CONFIG_HAVE_ARM_TWD
  347. static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
  348. REALVIEW_EB11MP_TWD_BASE,
  349. IRQ_LOCALTIMER);
  350. static void __init realview_eb_twd_init(void)
  351. {
  352. if (core_tile_eb11mp() || core_tile_a9mp()) {
  353. int err = twd_local_timer_register(&twd_local_timer);
  354. if (err)
  355. pr_err("twd_local_timer_register failed %d\n", err);
  356. }
  357. }
  358. #else
  359. #define realview_eb_twd_init() do { } while(0)
  360. #endif
  361. static void __init realview_eb_timer_init(void)
  362. {
  363. unsigned int timer_irq;
  364. timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
  365. timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
  366. timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
  367. timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
  368. if (core_tile_eb11mp() || core_tile_a9mp())
  369. timer_irq = IRQ_EB11MP_TIMER0_1;
  370. else
  371. timer_irq = IRQ_EB_TIMER0_1;
  372. realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
  373. realview_timer_init(timer_irq);
  374. realview_eb_twd_init();
  375. }
  376. static void realview_eb_restart(char mode, const char *cmd)
  377. {
  378. void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
  379. void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
  380. /*
  381. * To reset, we hit the on-board reset register
  382. * in the system FPGA
  383. */
  384. __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
  385. if (core_tile_eb11mp())
  386. __raw_writel(0x0008, reset_ctrl);
  387. dsb();
  388. }
  389. static void __init realview_eb_init(void)
  390. {
  391. int i;
  392. if (core_tile_eb11mp() || core_tile_a9mp()) {
  393. realview_eb11mp_fixup();
  394. #ifdef CONFIG_CACHE_L2X0
  395. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  396. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  397. l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
  398. #endif
  399. platform_device_register(&pmu_device);
  400. }
  401. realview_flash_register(&realview_eb_flash_resource, 1);
  402. platform_device_register(&realview_i2c_device);
  403. platform_device_register(&char_lcd_device);
  404. eth_device_register();
  405. realview_usb_register(realview_eb_isp1761_resources);
  406. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  407. struct amba_device *d = amba_devs[i];
  408. amba_device_register(d, &iomem_resource);
  409. }
  410. }
  411. MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
  412. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  413. .atag_offset = 0x100,
  414. .smp = smp_ops(realview_smp_ops),
  415. .fixup = realview_fixup,
  416. .map_io = realview_eb_map_io,
  417. .init_early = realview_init_early,
  418. .init_irq = gic_init_irq,
  419. .init_time = realview_eb_timer_init,
  420. .init_machine = realview_eb_init,
  421. #ifdef CONFIG_ZONE_DMA
  422. .dma_zone_size = SZ_256M,
  423. #endif
  424. .restart = realview_eb_restart,
  425. MACHINE_END