devices.c 11 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/devices.c
  3. *
  4. * OMAP1 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/dma-mapping.h>
  12. #include <linux/gpio.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/platform_data/omap-wd-timer.h>
  19. #include <asm/mach/map.h>
  20. #include <mach/tc.h>
  21. #include <mach/mux.h>
  22. #include <mach/omap7xx.h>
  23. #include <mach/camera.h>
  24. #include <mach/hardware.h>
  25. #include "common.h"
  26. #include "clock.h"
  27. #include "dma.h"
  28. #include "mmc.h"
  29. #include "sram.h"
  30. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  31. static struct platform_device omap_pcm = {
  32. .name = "omap-pcm-audio",
  33. .id = -1,
  34. };
  35. static void omap_init_audio(void)
  36. {
  37. platform_device_register(&omap_pcm);
  38. }
  39. #else
  40. static inline void omap_init_audio(void) {}
  41. #endif
  42. /*-------------------------------------------------------------------------*/
  43. #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
  44. #define OMAP_RTC_BASE 0xfffb4800
  45. static struct resource rtc_resources[] = {
  46. {
  47. .start = OMAP_RTC_BASE,
  48. .end = OMAP_RTC_BASE + 0x5f,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. {
  52. .start = INT_RTC_TIMER,
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. {
  56. .start = INT_RTC_ALARM,
  57. .flags = IORESOURCE_IRQ,
  58. },
  59. };
  60. static struct platform_device omap_rtc_device = {
  61. .name = "omap_rtc",
  62. .id = -1,
  63. .num_resources = ARRAY_SIZE(rtc_resources),
  64. .resource = rtc_resources,
  65. };
  66. static void omap_init_rtc(void)
  67. {
  68. (void) platform_device_register(&omap_rtc_device);
  69. }
  70. #else
  71. static inline void omap_init_rtc(void) {}
  72. #endif
  73. static inline void omap_init_mbox(void) { }
  74. /*-------------------------------------------------------------------------*/
  75. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  76. static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
  77. int controller_nr)
  78. {
  79. if (controller_nr == 0) {
  80. if (cpu_is_omap7xx()) {
  81. omap_cfg_reg(MMC_7XX_CMD);
  82. omap_cfg_reg(MMC_7XX_CLK);
  83. omap_cfg_reg(MMC_7XX_DAT0);
  84. } else {
  85. omap_cfg_reg(MMC_CMD);
  86. omap_cfg_reg(MMC_CLK);
  87. omap_cfg_reg(MMC_DAT0);
  88. }
  89. if (cpu_is_omap1710()) {
  90. omap_cfg_reg(M15_1710_MMC_CLKI);
  91. omap_cfg_reg(P19_1710_MMC_CMDDIR);
  92. omap_cfg_reg(P20_1710_MMC_DATDIR0);
  93. }
  94. if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
  95. omap_cfg_reg(MMC_DAT1);
  96. /* NOTE: DAT2 can be on W10 (here) or M15 */
  97. if (!mmc_controller->slots[0].nomux)
  98. omap_cfg_reg(MMC_DAT2);
  99. omap_cfg_reg(MMC_DAT3);
  100. }
  101. }
  102. /* Block 2 is on newer chips, and has many pinout options */
  103. if (cpu_is_omap16xx() && controller_nr == 1) {
  104. if (!mmc_controller->slots[1].nomux) {
  105. omap_cfg_reg(Y8_1610_MMC2_CMD);
  106. omap_cfg_reg(Y10_1610_MMC2_CLK);
  107. omap_cfg_reg(R18_1610_MMC2_CLKIN);
  108. omap_cfg_reg(W8_1610_MMC2_DAT0);
  109. if (mmc_controller->slots[1].wires == 4) {
  110. omap_cfg_reg(V8_1610_MMC2_DAT1);
  111. omap_cfg_reg(W15_1610_MMC2_DAT2);
  112. omap_cfg_reg(R10_1610_MMC2_DAT3);
  113. }
  114. /* These are needed for the level shifter */
  115. omap_cfg_reg(V9_1610_MMC2_CMDDIR);
  116. omap_cfg_reg(V5_1610_MMC2_DATDIR0);
  117. omap_cfg_reg(W19_1610_MMC2_DATDIR1);
  118. }
  119. /* Feedback clock must be set on OMAP-1710 MMC2 */
  120. if (cpu_is_omap1710())
  121. omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
  122. MOD_CONF_CTRL_1);
  123. }
  124. }
  125. #define OMAP_MMC_NR_RES 4
  126. /*
  127. * Register MMC devices.
  128. */
  129. static int __init omap_mmc_add(const char *name, int id, unsigned long base,
  130. unsigned long size, unsigned int irq,
  131. unsigned rx_req, unsigned tx_req,
  132. struct omap_mmc_platform_data *data)
  133. {
  134. struct platform_device *pdev;
  135. struct resource res[OMAP_MMC_NR_RES];
  136. int ret;
  137. pdev = platform_device_alloc(name, id);
  138. if (!pdev)
  139. return -ENOMEM;
  140. memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
  141. res[0].start = base;
  142. res[0].end = base + size - 1;
  143. res[0].flags = IORESOURCE_MEM;
  144. res[1].start = res[1].end = irq;
  145. res[1].flags = IORESOURCE_IRQ;
  146. res[2].start = rx_req;
  147. res[2].name = "rx";
  148. res[2].flags = IORESOURCE_DMA;
  149. res[3].start = tx_req;
  150. res[3].name = "tx";
  151. res[3].flags = IORESOURCE_DMA;
  152. if (cpu_is_omap7xx())
  153. data->slots[0].features = MMC_OMAP7XX;
  154. if (cpu_is_omap15xx())
  155. data->slots[0].features = MMC_OMAP15XX;
  156. if (cpu_is_omap16xx())
  157. data->slots[0].features = MMC_OMAP16XX;
  158. ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
  159. if (ret == 0)
  160. ret = platform_device_add_data(pdev, data, sizeof(*data));
  161. if (ret)
  162. goto fail;
  163. ret = platform_device_add(pdev);
  164. if (ret)
  165. goto fail;
  166. /* return device handle to board setup code */
  167. data->dev = &pdev->dev;
  168. return 0;
  169. fail:
  170. platform_device_put(pdev);
  171. return ret;
  172. }
  173. void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
  174. int nr_controllers)
  175. {
  176. int i;
  177. for (i = 0; i < nr_controllers; i++) {
  178. unsigned long base, size;
  179. unsigned rx_req, tx_req;
  180. unsigned int irq = 0;
  181. if (!mmc_data[i])
  182. continue;
  183. omap1_mmc_mux(mmc_data[i], i);
  184. switch (i) {
  185. case 0:
  186. base = OMAP1_MMC1_BASE;
  187. irq = INT_MMC;
  188. rx_req = OMAP_DMA_MMC_RX;
  189. tx_req = OMAP_DMA_MMC_TX;
  190. break;
  191. case 1:
  192. if (!cpu_is_omap16xx())
  193. return;
  194. base = OMAP1_MMC2_BASE;
  195. irq = INT_1610_MMC2;
  196. rx_req = OMAP_DMA_MMC2_RX;
  197. tx_req = OMAP_DMA_MMC2_TX;
  198. break;
  199. default:
  200. continue;
  201. }
  202. size = OMAP1_MMC_SIZE;
  203. omap_mmc_add("mmci-omap", i, base, size, irq,
  204. rx_req, tx_req, mmc_data[i]);
  205. }
  206. }
  207. #endif
  208. /*-------------------------------------------------------------------------*/
  209. /* OMAP7xx SPI support */
  210. #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
  211. struct platform_device omap_spi1 = {
  212. .name = "omap1_spi100k",
  213. .id = 1,
  214. };
  215. struct platform_device omap_spi2 = {
  216. .name = "omap1_spi100k",
  217. .id = 2,
  218. };
  219. static void omap_init_spi100k(void)
  220. {
  221. omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
  222. if (omap_spi1.dev.platform_data)
  223. platform_device_register(&omap_spi1);
  224. omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
  225. if (omap_spi2.dev.platform_data)
  226. platform_device_register(&omap_spi2);
  227. }
  228. #else
  229. static inline void omap_init_spi100k(void)
  230. {
  231. }
  232. #endif
  233. #define OMAP1_CAMERA_BASE 0xfffb6800
  234. #define OMAP1_CAMERA_IOSIZE 0x1c
  235. static struct resource omap1_camera_resources[] = {
  236. [0] = {
  237. .start = OMAP1_CAMERA_BASE,
  238. .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [1] = {
  242. .start = INT_CAMERA,
  243. .flags = IORESOURCE_IRQ,
  244. },
  245. };
  246. static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
  247. static struct platform_device omap1_camera_device = {
  248. .name = "omap1-camera",
  249. .id = 0, /* This is used to put cameras on this interface */
  250. .dev = {
  251. .dma_mask = &omap1_camera_dma_mask,
  252. .coherent_dma_mask = DMA_BIT_MASK(32),
  253. },
  254. .num_resources = ARRAY_SIZE(omap1_camera_resources),
  255. .resource = omap1_camera_resources,
  256. };
  257. void __init omap1_camera_init(void *info)
  258. {
  259. struct platform_device *dev = &omap1_camera_device;
  260. int ret;
  261. dev->dev.platform_data = info;
  262. ret = platform_device_register(dev);
  263. if (ret)
  264. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  265. }
  266. /*-------------------------------------------------------------------------*/
  267. static inline void omap_init_sti(void) {}
  268. /* Numbering for the SPI-capable controllers when used for SPI:
  269. * spi = 1
  270. * uwire = 2
  271. * mmc1..2 = 3..4
  272. * mcbsp1..3 = 5..7
  273. */
  274. #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
  275. #define OMAP_UWIRE_BASE 0xfffb3000
  276. static struct resource uwire_resources[] = {
  277. {
  278. .start = OMAP_UWIRE_BASE,
  279. .end = OMAP_UWIRE_BASE + 0x20,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. };
  283. static struct platform_device omap_uwire_device = {
  284. .name = "omap_uwire",
  285. .id = -1,
  286. .num_resources = ARRAY_SIZE(uwire_resources),
  287. .resource = uwire_resources,
  288. };
  289. static void omap_init_uwire(void)
  290. {
  291. /* FIXME define and use a boot tag; not all boards will be hooking
  292. * up devices to the microwire controller, and multi-board configs
  293. * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
  294. */
  295. /* board-specific code must configure chipselects (only a few
  296. * are normally used) and SCLK/SDI/SDO (each has two choices).
  297. */
  298. (void) platform_device_register(&omap_uwire_device);
  299. }
  300. #else
  301. static inline void omap_init_uwire(void) {}
  302. #endif
  303. #define OMAP1_RNG_BASE 0xfffe5000
  304. static struct resource omap1_rng_resources[] = {
  305. {
  306. .start = OMAP1_RNG_BASE,
  307. .end = OMAP1_RNG_BASE + 0x4f,
  308. .flags = IORESOURCE_MEM,
  309. },
  310. };
  311. static struct platform_device omap1_rng_device = {
  312. .name = "omap_rng",
  313. .id = -1,
  314. .num_resources = ARRAY_SIZE(omap1_rng_resources),
  315. .resource = omap1_rng_resources,
  316. };
  317. static void omap1_init_rng(void)
  318. {
  319. if (!cpu_is_omap16xx())
  320. return;
  321. (void) platform_device_register(&omap1_rng_device);
  322. }
  323. /*-------------------------------------------------------------------------*/
  324. /*
  325. * This gets called after board-specific INIT_MACHINE, and initializes most
  326. * on-chip peripherals accessible on this board (except for few like USB):
  327. *
  328. * (a) Does any "standard config" pin muxing needed. Board-specific
  329. * code will have muxed GPIO pins and done "nonstandard" setup;
  330. * that code could live in the boot loader.
  331. * (b) Populating board-specific platform_data with the data drivers
  332. * rely on to handle wiring variations.
  333. * (c) Creating platform devices as meaningful on this board and
  334. * with this kernel configuration.
  335. *
  336. * Claiming GPIOs, and setting their direction and initial values, is the
  337. * responsibility of the device drivers. So is responding to probe().
  338. *
  339. * Board-specific knowledge like creating devices or pin setup is to be
  340. * kept out of drivers as much as possible. In particular, pin setup
  341. * may be handled by the boot loader, and drivers should expect it will
  342. * normally have been done by the time they're probed.
  343. */
  344. static int __init omap1_init_devices(void)
  345. {
  346. if (!cpu_class_is_omap1())
  347. return -ENODEV;
  348. omap_sram_init();
  349. omap1_clk_late_init();
  350. /* please keep these calls, and their implementations above,
  351. * in alphabetical order so they're easier to sort through.
  352. */
  353. omap_init_audio();
  354. omap_init_mbox();
  355. omap_init_rtc();
  356. omap_init_spi100k();
  357. omap_init_sti();
  358. omap_init_uwire();
  359. omap1_init_rng();
  360. return 0;
  361. }
  362. arch_initcall(omap1_init_devices);
  363. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  364. static struct resource wdt_resources[] = {
  365. {
  366. .start = 0xfffeb000,
  367. .end = 0xfffeb07F,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. };
  371. static struct platform_device omap_wdt_device = {
  372. .name = "omap_wdt",
  373. .id = -1,
  374. .num_resources = ARRAY_SIZE(wdt_resources),
  375. .resource = wdt_resources,
  376. };
  377. static int __init omap_init_wdt(void)
  378. {
  379. struct omap_wd_timer_platform_data pdata;
  380. int ret;
  381. if (!cpu_is_omap16xx())
  382. return -ENODEV;
  383. pdata.read_reset_sources = omap1_get_reset_sources;
  384. ret = platform_device_register(&omap_wdt_device);
  385. if (!ret) {
  386. ret = platform_device_add_data(&omap_wdt_device, &pdata,
  387. sizeof(pdata));
  388. if (ret)
  389. platform_device_del(&omap_wdt_device);
  390. }
  391. return ret;
  392. }
  393. subsys_initcall(omap_init_wdt);
  394. #endif