dev-audio.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254
  1. /* linux/arch/arm/mach-exynos4/dev-audio.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Copyright (c) 2010 Samsung Electronics Co. Ltd
  7. * Jaswinder Singh <jassi.brar@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/platform_device.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/gpio.h>
  16. #include <linux/platform_data/asoc-s3c.h>
  17. #include <plat/gpio-cfg.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <mach/irqs.h>
  21. #define EXYNOS4_AUDSS_INT_MEM (0x03000000)
  22. static int exynos4_cfg_i2s(struct platform_device *pdev)
  23. {
  24. /* configure GPIO for i2s port */
  25. switch (pdev->id) {
  26. case 0:
  27. s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2));
  28. break;
  29. case 1:
  30. s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2));
  31. break;
  32. case 2:
  33. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4));
  34. break;
  35. default:
  36. printk(KERN_ERR "Invalid Device %d\n", pdev->id);
  37. return -EINVAL;
  38. }
  39. return 0;
  40. }
  41. static struct s3c_audio_pdata i2sv5_pdata = {
  42. .cfg_gpio = exynos4_cfg_i2s,
  43. .type = {
  44. .i2s = {
  45. .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
  46. | QUIRK_NEED_RSTCLR,
  47. .idma_addr = EXYNOS4_AUDSS_INT_MEM,
  48. },
  49. },
  50. };
  51. static struct resource exynos4_i2s0_resource[] = {
  52. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
  53. [1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
  54. [2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
  55. [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
  56. };
  57. struct platform_device exynos4_device_i2s0 = {
  58. .name = "samsung-i2s",
  59. .id = 0,
  60. .num_resources = ARRAY_SIZE(exynos4_i2s0_resource),
  61. .resource = exynos4_i2s0_resource,
  62. .dev = {
  63. .platform_data = &i2sv5_pdata,
  64. },
  65. };
  66. static struct s3c_audio_pdata i2sv3_pdata = {
  67. .cfg_gpio = exynos4_cfg_i2s,
  68. .type = {
  69. .i2s = {
  70. .quirks = QUIRK_NO_MUXPSR,
  71. },
  72. },
  73. };
  74. static struct resource exynos4_i2s1_resource[] = {
  75. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),
  76. [1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
  77. [2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
  78. };
  79. struct platform_device exynos4_device_i2s1 = {
  80. .name = "samsung-i2s",
  81. .id = 1,
  82. .num_resources = ARRAY_SIZE(exynos4_i2s1_resource),
  83. .resource = exynos4_i2s1_resource,
  84. .dev = {
  85. .platform_data = &i2sv3_pdata,
  86. },
  87. };
  88. static struct resource exynos4_i2s2_resource[] = {
  89. [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),
  90. [1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
  91. [2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
  92. };
  93. struct platform_device exynos4_device_i2s2 = {
  94. .name = "samsung-i2s",
  95. .id = 2,
  96. .num_resources = ARRAY_SIZE(exynos4_i2s2_resource),
  97. .resource = exynos4_i2s2_resource,
  98. .dev = {
  99. .platform_data = &i2sv3_pdata,
  100. },
  101. };
  102. /* PCM Controller platform_devices */
  103. static int exynos4_pcm_cfg_gpio(struct platform_device *pdev)
  104. {
  105. switch (pdev->id) {
  106. case 0:
  107. s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 5, S3C_GPIO_SFN(3));
  108. break;
  109. case 1:
  110. s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(3));
  111. break;
  112. case 2:
  113. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(3));
  114. break;
  115. default:
  116. printk(KERN_DEBUG "Invalid PCM Controller number!");
  117. return -EINVAL;
  118. }
  119. return 0;
  120. }
  121. static struct s3c_audio_pdata s3c_pcm_pdata = {
  122. .cfg_gpio = exynos4_pcm_cfg_gpio,
  123. };
  124. static struct resource exynos4_pcm0_resource[] = {
  125. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),
  126. [1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
  127. [2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
  128. };
  129. struct platform_device exynos4_device_pcm0 = {
  130. .name = "samsung-pcm",
  131. .id = 0,
  132. .num_resources = ARRAY_SIZE(exynos4_pcm0_resource),
  133. .resource = exynos4_pcm0_resource,
  134. .dev = {
  135. .platform_data = &s3c_pcm_pdata,
  136. },
  137. };
  138. static struct resource exynos4_pcm1_resource[] = {
  139. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),
  140. [1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
  141. [2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
  142. };
  143. struct platform_device exynos4_device_pcm1 = {
  144. .name = "samsung-pcm",
  145. .id = 1,
  146. .num_resources = ARRAY_SIZE(exynos4_pcm1_resource),
  147. .resource = exynos4_pcm1_resource,
  148. .dev = {
  149. .platform_data = &s3c_pcm_pdata,
  150. },
  151. };
  152. static struct resource exynos4_pcm2_resource[] = {
  153. [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),
  154. [1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
  155. [2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
  156. };
  157. struct platform_device exynos4_device_pcm2 = {
  158. .name = "samsung-pcm",
  159. .id = 2,
  160. .num_resources = ARRAY_SIZE(exynos4_pcm2_resource),
  161. .resource = exynos4_pcm2_resource,
  162. .dev = {
  163. .platform_data = &s3c_pcm_pdata,
  164. },
  165. };
  166. /* AC97 Controller platform devices */
  167. static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
  168. {
  169. return s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(4));
  170. }
  171. static struct resource exynos4_ac97_resource[] = {
  172. [0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),
  173. [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
  174. [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
  175. [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
  176. [4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),
  177. };
  178. static struct s3c_audio_pdata s3c_ac97_pdata = {
  179. .cfg_gpio = exynos4_ac97_cfg_gpio,
  180. };
  181. static u64 exynos4_ac97_dmamask = DMA_BIT_MASK(32);
  182. struct platform_device exynos4_device_ac97 = {
  183. .name = "samsung-ac97",
  184. .id = -1,
  185. .num_resources = ARRAY_SIZE(exynos4_ac97_resource),
  186. .resource = exynos4_ac97_resource,
  187. .dev = {
  188. .platform_data = &s3c_ac97_pdata,
  189. .dma_mask = &exynos4_ac97_dmamask,
  190. .coherent_dma_mask = DMA_BIT_MASK(32),
  191. },
  192. };
  193. /* S/PDIF Controller platform_device */
  194. static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
  195. {
  196. s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
  197. return 0;
  198. }
  199. static struct resource exynos4_spdif_resource[] = {
  200. [0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),
  201. [1] = DEFINE_RES_DMA(DMACH_SPDIF),
  202. };
  203. static struct s3c_audio_pdata samsung_spdif_pdata = {
  204. .cfg_gpio = exynos4_spdif_cfg_gpio,
  205. };
  206. static u64 exynos4_spdif_dmamask = DMA_BIT_MASK(32);
  207. struct platform_device exynos4_device_spdif = {
  208. .name = "samsung-spdif",
  209. .id = -1,
  210. .num_resources = ARRAY_SIZE(exynos4_spdif_resource),
  211. .resource = exynos4_spdif_resource,
  212. .dev = {
  213. .platform_data = &samsung_spdif_pdata,
  214. .dma_mask = &exynos4_spdif_dmamask,
  215. .coherent_dma_mask = DMA_BIT_MASK(32),
  216. },
  217. };