board-dt.c 2.2 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192
  1. /*
  2. * arch/arm/mach-dove/board-dt.c
  3. *
  4. * Marvell Dove 88AP510 System On Chip FDT Board
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/clk-provider.h>
  12. #include <linux/clk/mvebu.h>
  13. #include <linux/of.h>
  14. #include <linux/of_platform.h>
  15. #include <linux/platform_data/usb-ehci-orion.h>
  16. #include <asm/hardware/cache-tauros2.h>
  17. #include <asm/mach/arch.h>
  18. #include <mach/pm.h>
  19. #include <plat/common.h>
  20. #include <plat/irq.h>
  21. #include "common.h"
  22. /*
  23. * There are still devices that doesn't even know about DT,
  24. * get clock gates here and add a clock lookup.
  25. */
  26. static void __init dove_legacy_clk_init(void)
  27. {
  28. struct device_node *np = of_find_compatible_node(NULL, NULL,
  29. "marvell,dove-gating-clock");
  30. struct of_phandle_args clkspec;
  31. clkspec.np = np;
  32. clkspec.args_count = 1;
  33. clkspec.args[0] = CLOCK_GATING_BIT_GBE;
  34. orion_clkdev_add(NULL, "mv643xx_eth_port.0",
  35. of_clk_get_from_provider(&clkspec));
  36. clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
  37. orion_clkdev_add("0", "pcie",
  38. of_clk_get_from_provider(&clkspec));
  39. clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
  40. orion_clkdev_add("1", "pcie",
  41. of_clk_get_from_provider(&clkspec));
  42. }
  43. static void __init dove_of_clk_init(void)
  44. {
  45. mvebu_clocks_init();
  46. dove_legacy_clk_init();
  47. }
  48. static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
  49. .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
  50. };
  51. static void __init dove_dt_init(void)
  52. {
  53. pr_info("Dove 88AP510 SoC\n");
  54. #ifdef CONFIG_CACHE_TAUROS2
  55. tauros2_init(0);
  56. #endif
  57. dove_setup_cpu_mbus();
  58. /* Setup root of clk tree */
  59. dove_of_clk_init();
  60. /* Internal devices not ported to DT yet */
  61. dove_ge00_init(&dove_dt_ge00_data);
  62. dove_pcie_init(1, 1);
  63. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  64. }
  65. static const char * const dove_dt_board_compat[] = {
  66. "marvell,dove",
  67. NULL
  68. };
  69. DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
  70. .map_io = dove_map_io,
  71. .init_early = dove_init_early,
  72. .init_irq = orion_dt_init_irq,
  73. .init_time = dove_timer_init,
  74. .init_machine = dove_dt_init,
  75. .restart = dove_restart,
  76. .dt_compat = dove_dt_board_compat,
  77. MACHINE_END