cpuidle.c 2.9 KB

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  1. /*
  2. * CPU idle for DaVinci SoCs
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
  5. *
  6. * Derived from Marvell Kirkwood CPU idle code
  7. * (arch/arm/mach-kirkwood/cpuidle.c)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/cpuidle.h>
  17. #include <linux/io.h>
  18. #include <linux/export.h>
  19. #include <asm/proc-fns.h>
  20. #include <asm/cpuidle.h>
  21. #include <mach/cpuidle.h>
  22. #include <mach/ddr2.h>
  23. #define DAVINCI_CPUIDLE_MAX_STATES 2
  24. static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
  25. static void __iomem *ddr2_reg_base;
  26. static bool ddr2_pdown;
  27. static void davinci_save_ddr_power(int enter, bool pdown)
  28. {
  29. u32 val;
  30. val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
  31. if (enter) {
  32. if (pdown)
  33. val |= DDR2_SRPD_BIT;
  34. else
  35. val &= ~DDR2_SRPD_BIT;
  36. val |= DDR2_LPMODEN_BIT;
  37. } else {
  38. val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
  39. }
  40. __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
  41. }
  42. /* Actual code that puts the SoC in different idle states */
  43. static int davinci_enter_idle(struct cpuidle_device *dev,
  44. struct cpuidle_driver *drv,
  45. int index)
  46. {
  47. davinci_save_ddr_power(1, ddr2_pdown);
  48. index = cpuidle_wrap_enter(dev, drv, index,
  49. arm_cpuidle_simple_enter);
  50. davinci_save_ddr_power(0, ddr2_pdown);
  51. return index;
  52. }
  53. static struct cpuidle_driver davinci_idle_driver = {
  54. .name = "cpuidle-davinci",
  55. .owner = THIS_MODULE,
  56. .en_core_tk_irqen = 1,
  57. .states[0] = ARM_CPUIDLE_WFI_STATE,
  58. .states[1] = {
  59. .enter = davinci_enter_idle,
  60. .exit_latency = 10,
  61. .target_residency = 100000,
  62. .flags = CPUIDLE_FLAG_TIME_VALID,
  63. .name = "DDR SR",
  64. .desc = "WFI and DDR Self Refresh",
  65. },
  66. .state_count = DAVINCI_CPUIDLE_MAX_STATES,
  67. };
  68. static int __init davinci_cpuidle_probe(struct platform_device *pdev)
  69. {
  70. int ret;
  71. struct cpuidle_device *device;
  72. struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
  73. device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
  74. if (!pdata) {
  75. dev_err(&pdev->dev, "cannot get platform data\n");
  76. return -ENOENT;
  77. }
  78. ddr2_reg_base = pdata->ddr2_ctlr_base;
  79. ddr2_pdown = pdata->ddr2_pdown;
  80. ret = cpuidle_register_driver(&davinci_idle_driver);
  81. if (ret) {
  82. dev_err(&pdev->dev, "failed to register driver\n");
  83. return ret;
  84. }
  85. ret = cpuidle_register_device(device);
  86. if (ret) {
  87. dev_err(&pdev->dev, "failed to register device\n");
  88. cpuidle_unregister_driver(&davinci_idle_driver);
  89. return ret;
  90. }
  91. return 0;
  92. }
  93. static struct platform_driver davinci_cpuidle_driver = {
  94. .driver = {
  95. .name = "cpuidle-davinci",
  96. .owner = THIS_MODULE,
  97. },
  98. };
  99. static int __init davinci_cpuidle_init(void)
  100. {
  101. return platform_driver_probe(&davinci_cpuidle_driver,
  102. davinci_cpuidle_probe);
  103. }
  104. device_initcall(davinci_cpuidle_init);