tegra20-whistler.dts 12 KB

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  1. /dts-v1/;
  2. /include/ "tegra20.dtsi"
  3. / {
  4. model = "NVIDIA Tegra20 Whistler evaluation board";
  5. compatible = "nvidia,whistler", "nvidia,tegra20";
  6. memory {
  7. reg = <0x00000000 0x20000000>;
  8. };
  9. host1x {
  10. hdmi {
  11. status = "okay";
  12. vdd-supply = <&hdmi_vdd_reg>;
  13. pll-supply = <&hdmi_pll_reg>;
  14. nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  15. nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
  16. };
  17. };
  18. pinmux {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&state_default>;
  21. state_default: pinmux {
  22. ata {
  23. nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
  24. "gmc", "gmd", "gpu";
  25. nvidia,function = "gmi";
  26. };
  27. atc {
  28. nvidia,pins = "atc", "atd";
  29. nvidia,function = "sdio4";
  30. };
  31. cdev1 {
  32. nvidia,pins = "cdev1";
  33. nvidia,function = "plla_out";
  34. };
  35. cdev2 {
  36. nvidia,pins = "cdev2";
  37. nvidia,function = "osc";
  38. };
  39. crtp {
  40. nvidia,pins = "crtp";
  41. nvidia,function = "crt";
  42. };
  43. csus {
  44. nvidia,pins = "csus";
  45. nvidia,function = "vi_sensor_clk";
  46. };
  47. dap1 {
  48. nvidia,pins = "dap1";
  49. nvidia,function = "dap1";
  50. };
  51. dap2 {
  52. nvidia,pins = "dap2";
  53. nvidia,function = "dap2";
  54. };
  55. dap3 {
  56. nvidia,pins = "dap3";
  57. nvidia,function = "dap3";
  58. };
  59. dap4 {
  60. nvidia,pins = "dap4";
  61. nvidia,function = "dap4";
  62. };
  63. ddc {
  64. nvidia,pins = "ddc";
  65. nvidia,function = "i2c2";
  66. };
  67. dta {
  68. nvidia,pins = "dta", "dtb", "dtc", "dtd";
  69. nvidia,function = "vi";
  70. };
  71. dte {
  72. nvidia,pins = "dte";
  73. nvidia,function = "rsvd1";
  74. };
  75. dtf {
  76. nvidia,pins = "dtf";
  77. nvidia,function = "i2c3";
  78. };
  79. gme {
  80. nvidia,pins = "gme";
  81. nvidia,function = "dap5";
  82. };
  83. gpu7 {
  84. nvidia,pins = "gpu7";
  85. nvidia,function = "rtck";
  86. };
  87. gpv {
  88. nvidia,pins = "gpv";
  89. nvidia,function = "pcie";
  90. };
  91. hdint {
  92. nvidia,pins = "hdint", "pta";
  93. nvidia,function = "hdmi";
  94. };
  95. i2cp {
  96. nvidia,pins = "i2cp";
  97. nvidia,function = "i2cp";
  98. };
  99. irrx {
  100. nvidia,pins = "irrx", "irtx";
  101. nvidia,function = "uartb";
  102. };
  103. kbca {
  104. nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
  105. nvidia,function = "kbc";
  106. };
  107. kbcb {
  108. nvidia,pins = "kbcb", "kbcd";
  109. nvidia,function = "sdio2";
  110. };
  111. lcsn {
  112. nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
  113. "spia", "spib", "spic";
  114. nvidia,function = "spi3";
  115. };
  116. ld0 {
  117. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  118. "ld5", "ld6", "ld7", "ld8", "ld9",
  119. "ld10", "ld11", "ld12", "ld13", "ld14",
  120. "ld15", "ld16", "ld17", "ldc", "ldi",
  121. "lhp0", "lhp1", "lhp2", "lhs", "lm0",
  122. "lm1", "lpp", "lpw0", "lpw1", "lpw2",
  123. "lsc0", "lsc1", "lspi", "lvp0", "lvp1",
  124. "lvs";
  125. nvidia,function = "displaya";
  126. };
  127. owc {
  128. nvidia,pins = "owc", "uac";
  129. nvidia,function = "owr";
  130. };
  131. pmc {
  132. nvidia,pins = "pmc";
  133. nvidia,function = "pwr_on";
  134. };
  135. rm {
  136. nvidia,pins = "rm";
  137. nvidia,function = "i2c1";
  138. };
  139. sdb {
  140. nvidia,pins = "sdb", "sdc", "sdd", "slxa",
  141. "slxc", "slxd", "slxk";
  142. nvidia,function = "sdio3";
  143. };
  144. sdio1 {
  145. nvidia,pins = "sdio1";
  146. nvidia,function = "sdio1";
  147. };
  148. spdi {
  149. nvidia,pins = "spdi", "spdo";
  150. nvidia,function = "rsvd2";
  151. };
  152. spid {
  153. nvidia,pins = "spid", "spie", "spig", "spih";
  154. nvidia,function = "spi2_alt";
  155. };
  156. spif {
  157. nvidia,pins = "spif";
  158. nvidia,function = "spi2";
  159. };
  160. uaa {
  161. nvidia,pins = "uaa", "uab";
  162. nvidia,function = "uarta";
  163. };
  164. uad {
  165. nvidia,pins = "uad";
  166. nvidia,function = "irda";
  167. };
  168. uca {
  169. nvidia,pins = "uca", "ucb";
  170. nvidia,function = "uartc";
  171. };
  172. uda {
  173. nvidia,pins = "uda";
  174. nvidia,function = "spi1";
  175. };
  176. conf_ata {
  177. nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
  178. "gmb", "gmc", "gmd", "irrx", "irtx",
  179. "kbca", "kbcb", "kbcc", "kbcd", "kbce",
  180. "kbcf", "sdc", "sdd", "spie", "spig",
  181. "spih", "uaa", "uab", "uad", "uca",
  182. "ucb";
  183. nvidia,pull = <2>;
  184. nvidia,tristate = <0>;
  185. };
  186. conf_atd {
  187. nvidia,pins = "atd", "ate", "cdev1", "csus",
  188. "dap1", "dap2", "dap3", "dap4", "dte",
  189. "dtf", "gpu", "gpu7", "gpv", "i2cp",
  190. "rm", "sdio1", "slxa", "slxc", "slxd",
  191. "slxk", "spdi", "spdo", "uac", "uda";
  192. nvidia,pull = <0>;
  193. nvidia,tristate = <0>;
  194. };
  195. conf_cdev2 {
  196. nvidia,pins = "cdev2", "spia", "spib";
  197. nvidia,pull = <1>;
  198. nvidia,tristate = <1>;
  199. };
  200. conf_ck32 {
  201. nvidia,pins = "ck32", "ddrc", "lc", "pmca",
  202. "pmcb", "pmcc", "pmcd", "xm2c",
  203. "xm2d";
  204. nvidia,pull = <0>;
  205. };
  206. conf_crtp {
  207. nvidia,pins = "crtp";
  208. nvidia,pull = <0>;
  209. nvidia,tristate = <1>;
  210. };
  211. conf_dta {
  212. nvidia,pins = "dta", "dtb", "dtc", "dtd",
  213. "spid", "spif";
  214. nvidia,pull = <1>;
  215. nvidia,tristate = <0>;
  216. };
  217. conf_gme {
  218. nvidia,pins = "gme", "owc", "pta", "spic";
  219. nvidia,pull = <2>;
  220. nvidia,tristate = <1>;
  221. };
  222. conf_ld17_0 {
  223. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  224. "ld23_22";
  225. nvidia,pull = <1>;
  226. };
  227. conf_ls {
  228. nvidia,pins = "ls", "pmce";
  229. nvidia,pull = <2>;
  230. };
  231. drive_dap1 {
  232. nvidia,pins = "drive_dap1";
  233. nvidia,high-speed-mode = <0>;
  234. nvidia,schmitt = <1>;
  235. nvidia,low-power-mode = <0>;
  236. nvidia,pull-down-strength = <0>;
  237. nvidia,pull-up-strength = <0>;
  238. nvidia,slew-rate-rising = <0>;
  239. nvidia,slew-rate-falling = <0>;
  240. };
  241. };
  242. };
  243. i2s@70002800 {
  244. status = "okay";
  245. };
  246. serial@70006000 {
  247. status = "okay";
  248. };
  249. hdmi_ddc: i2c@7000c400 {
  250. status = "okay";
  251. clock-frequency = <100000>;
  252. };
  253. i2c@7000d000 {
  254. status = "okay";
  255. clock-frequency = <100000>;
  256. codec: codec@1a {
  257. compatible = "wlf,wm8753";
  258. reg = <0x1a>;
  259. };
  260. tca6416: gpio@20 {
  261. compatible = "ti,tca6416";
  262. reg = <0x20>;
  263. gpio-controller;
  264. #gpio-cells = <2>;
  265. };
  266. max8907@3c {
  267. compatible = "maxim,max8907";
  268. reg = <0x3c>;
  269. interrupts = <0 86 0x4>;
  270. maxim,system-power-controller;
  271. mbatt-supply = <&usb0_vbus_reg>;
  272. in-v1-supply = <&mbatt_reg>;
  273. in-v2-supply = <&mbatt_reg>;
  274. in-v3-supply = <&mbatt_reg>;
  275. in1-supply = <&mbatt_reg>;
  276. in2-supply = <&nvvdd_sv3_reg>;
  277. in3-supply = <&mbatt_reg>;
  278. in4-supply = <&mbatt_reg>;
  279. in5-supply = <&mbatt_reg>;
  280. in6-supply = <&mbatt_reg>;
  281. in7-supply = <&mbatt_reg>;
  282. in8-supply = <&mbatt_reg>;
  283. in9-supply = <&mbatt_reg>;
  284. in10-supply = <&mbatt_reg>;
  285. in11-supply = <&mbatt_reg>;
  286. in12-supply = <&mbatt_reg>;
  287. in13-supply = <&mbatt_reg>;
  288. in14-supply = <&mbatt_reg>;
  289. in15-supply = <&mbatt_reg>;
  290. in16-supply = <&mbatt_reg>;
  291. in17-supply = <&nvvdd_sv3_reg>;
  292. in18-supply = <&nvvdd_sv3_reg>;
  293. in19-supply = <&mbatt_reg>;
  294. in20-supply = <&mbatt_reg>;
  295. regulators {
  296. mbatt_reg: mbatt {
  297. regulator-name = "vbat_pmu";
  298. regulator-always-on;
  299. };
  300. sd1 {
  301. regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
  302. regulator-min-microvolt = <1000000>;
  303. regulator-max-microvolt = <1000000>;
  304. regulator-always-on;
  305. };
  306. sd2 {
  307. regulator-name = "nvvdd_sv2,vdd_core";
  308. regulator-min-microvolt = <1200000>;
  309. regulator-max-microvolt = <1200000>;
  310. regulator-always-on;
  311. };
  312. nvvdd_sv3_reg: sd3 {
  313. regulator-name = "nvvdd_sv3";
  314. regulator-min-microvolt = <1800000>;
  315. regulator-max-microvolt = <1800000>;
  316. regulator-always-on;
  317. };
  318. ldo1 {
  319. regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
  320. regulator-min-microvolt = <3300000>;
  321. regulator-max-microvolt = <3300000>;
  322. regulator-always-on;
  323. };
  324. ldo2 {
  325. regulator-name = "nvvdd_ldo2,avdd_pll*";
  326. regulator-min-microvolt = <1100000>;
  327. regulator-max-microvolt = <1100000>;
  328. regulator-always-on;
  329. };
  330. ldo3 {
  331. regulator-name = "nvvdd_ldo3,vcom_1v8b";
  332. regulator-min-microvolt = <1800000>;
  333. regulator-max-microvolt = <1800000>;
  334. regulator-always-on;
  335. };
  336. ldo4 {
  337. regulator-name = "nvvdd_ldo4,avdd_usb*";
  338. regulator-min-microvolt = <3300000>;
  339. regulator-max-microvolt = <3300000>;
  340. regulator-always-on;
  341. };
  342. ldo5 {
  343. regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
  344. regulator-min-microvolt = <2800000>;
  345. regulator-max-microvolt = <2800000>;
  346. regulator-always-on;
  347. };
  348. hdmi_pll_reg: ldo6 {
  349. regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
  350. regulator-min-microvolt = <1800000>;
  351. regulator-max-microvolt = <1800000>;
  352. };
  353. ldo7 {
  354. regulator-name = "nvvdd_ldo7,avddio_audio";
  355. regulator-min-microvolt = <2800000>;
  356. regulator-max-microvolt = <2800000>;
  357. regulator-always-on;
  358. };
  359. ldo8 {
  360. regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
  361. regulator-min-microvolt = <3000000>;
  362. regulator-max-microvolt = <3000000>;
  363. };
  364. ldo9 {
  365. regulator-name = "nvvdd_ldo9,avdd_cam*";
  366. regulator-min-microvolt = <2800000>;
  367. regulator-max-microvolt = <2800000>;
  368. };
  369. ldo10 {
  370. regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
  371. regulator-min-microvolt = <3000000>;
  372. regulator-max-microvolt = <3000000>;
  373. regulator-always-on;
  374. };
  375. hdmi_vdd_reg: ldo11 {
  376. regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
  377. regulator-min-microvolt = <3300000>;
  378. regulator-max-microvolt = <3300000>;
  379. };
  380. ldo12 {
  381. regulator-name = "nvvdd_ldo12,vddio_sdio";
  382. regulator-min-microvolt = <2800000>;
  383. regulator-max-microvolt = <2800000>;
  384. regulator-always-on;
  385. };
  386. ldo13 {
  387. regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
  388. regulator-min-microvolt = <2800000>;
  389. regulator-max-microvolt = <2800000>;
  390. };
  391. ldo14 {
  392. regulator-name = "nvvdd_ldo14,avdd_vdac";
  393. regulator-min-microvolt = <2800000>;
  394. regulator-max-microvolt = <2800000>;
  395. };
  396. ldo15 {
  397. regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
  398. regulator-min-microvolt = <3300000>;
  399. regulator-max-microvolt = <3300000>;
  400. };
  401. ldo16 {
  402. regulator-name = "nvvdd_ldo16,vdd_dbrtr";
  403. regulator-min-microvolt = <1300000>;
  404. regulator-max-microvolt = <1300000>;
  405. };
  406. ldo17 {
  407. regulator-name = "nvvdd_ldo17,vddio_mipi";
  408. regulator-min-microvolt = <1200000>;
  409. regulator-max-microvolt = <1200000>;
  410. };
  411. ldo18 {
  412. regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
  413. regulator-min-microvolt = <1800000>;
  414. regulator-max-microvolt = <1800000>;
  415. };
  416. ldo19 {
  417. regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
  418. regulator-min-microvolt = <2800000>;
  419. regulator-max-microvolt = <2800000>;
  420. };
  421. ldo20 {
  422. regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
  423. regulator-min-microvolt = <1200000>;
  424. regulator-max-microvolt = <1200000>;
  425. regulator-always-on;
  426. };
  427. out5v {
  428. regulator-name = "usb0_vbus_reg";
  429. };
  430. out33v {
  431. regulator-name = "pmu_out3v3";
  432. };
  433. bbat {
  434. regulator-name = "pmu_bbat";
  435. regulator-min-microvolt = <2400000>;
  436. regulator-max-microvolt = <2400000>;
  437. regulator-always-on;
  438. };
  439. sdby {
  440. regulator-name = "vdd_aon";
  441. regulator-always-on;
  442. };
  443. vrtc {
  444. regulator-name = "vrtc,pmu_vccadc";
  445. regulator-always-on;
  446. };
  447. };
  448. };
  449. };
  450. pmc {
  451. nvidia,invert-interrupt;
  452. };
  453. usb@c5000000 {
  454. status = "okay";
  455. nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
  456. };
  457. usb@c5008000 {
  458. status = "okay";
  459. nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
  460. };
  461. sdhci@c8000400 {
  462. status = "okay";
  463. wp-gpios = <&gpio 173 0>; /* gpio PV5 */
  464. bus-width = <8>;
  465. };
  466. sdhci@c8000600 {
  467. status = "okay";
  468. bus-width = <8>;
  469. };
  470. kbc {
  471. status = "okay";
  472. nvidia,debounce-delay-ms = <20>;
  473. nvidia,repeat-delay-ms = <160>;
  474. nvidia,kbc-row-pins = <0 1 2>;
  475. nvidia,kbc-col-pins = <16 17>;
  476. linux,keymap = <0x00000074 /* KEY_POWER */
  477. 0x01000066 /* KEY_HOME */
  478. 0x0101009E /* KEY_BACK */
  479. 0x0201008B>; /* KEY_MENU */
  480. };
  481. regulators {
  482. compatible = "simple-bus";
  483. #address-cells = <1>;
  484. #size-cells = <0>;
  485. usb0_vbus_reg: regulator {
  486. compatible = "regulator-fixed";
  487. reg = <0>;
  488. regulator-name = "usb0_vbus";
  489. regulator-min-microvolt = <5000000>;
  490. regulator-max-microvolt = <5000000>;
  491. regulator-always-on;
  492. };
  493. };
  494. sound {
  495. compatible = "nvidia,tegra-audio-wm8753-whistler",
  496. "nvidia,tegra-audio-wm8753";
  497. nvidia,model = "NVIDIA Tegra Whistler";
  498. nvidia,audio-routing =
  499. "Headphone Jack", "LOUT1",
  500. "Headphone Jack", "ROUT1",
  501. "MIC2", "Mic Jack",
  502. "MIC2N", "Mic Jack";
  503. nvidia,i2s-controller = <&tegra_i2s1>;
  504. nvidia,audio-codec = <&codec>;
  505. };
  506. };