socfpga_vt.dts 1.4 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. /*
  2. * Copyright (C) 2013 Altera Corporation <www.altera.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /dts-v1/;
  18. /include/ "socfpga.dtsi"
  19. / {
  20. model = "Altera SOCFPGA VT";
  21. compatible = "altr,socfpga-vt", "altr,socfpga";
  22. chosen {
  23. bootargs = "console=ttyS0,57600";
  24. };
  25. memory {
  26. name = "memory";
  27. device_type = "memory";
  28. reg = <0x0 0x40000000>; /* 1 GB */
  29. };
  30. soc {
  31. timer0@ffc08000 {
  32. clock-frequency = <7000000>;
  33. };
  34. timer1@ffc09000 {
  35. clock-frequency = <7000000>;
  36. };
  37. timer2@ffd00000 {
  38. clock-frequency = <7000000>;
  39. };
  40. timer3@ffd01000 {
  41. clock-frequency = <7000000>;
  42. };
  43. serial0@ffc02000 {
  44. clock-frequency = <7372800>;
  45. };
  46. serial1@ffc03000 {
  47. clock-frequency = <7372800>;
  48. };
  49. sysmgr@ffd08000 {
  50. cpu1-start-addr = <0xffd08010>;
  51. };
  52. };
  53. };