pm9g45.dts 2.6 KB

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  1. /*
  2. * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  3. *
  4. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5. *
  6. * Licensed under GPLv2.
  7. */
  8. /dts-v1/;
  9. /include/ "at91sam9g45.dtsi"
  10. / {
  11. model = "Ronetix pm9g45";
  12. compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
  13. chosen {
  14. bootargs = "console=ttyS0,115200";
  15. };
  16. memory {
  17. reg = <0x70000000 0x8000000>;
  18. };
  19. clocks {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. ranges;
  23. main_clock: clock@0 {
  24. compatible = "atmel,osc", "fixed-clock";
  25. clock-frequency = <12000000>;
  26. };
  27. };
  28. ahb {
  29. apb {
  30. dbgu: serial@ffffee00 {
  31. status = "okay";
  32. };
  33. pinctrl@fffff200 {
  34. board {
  35. pinctrl_board_nand: nand0-board {
  36. atmel,pins =
  37. <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
  38. 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
  39. };
  40. };
  41. mmc {
  42. pinctrl_board_mmc: mmc0-board {
  43. atmel,pins =
  44. <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
  45. };
  46. };
  47. };
  48. mmc0: mmc@fff80000 {
  49. pinctrl-0 = <
  50. &pinctrl_board_mmc
  51. &pinctrl_mmc0_slot0_clk_cmd_dat0
  52. &pinctrl_mmc0_slot0_dat1_3>;
  53. status = "okay";
  54. slot@0 {
  55. reg = <0>;
  56. bus-width = <4>;
  57. cd-gpios = <&pioD 6 0>;
  58. };
  59. };
  60. macb0: ethernet@fffbc000 {
  61. phy-mode = "rmii";
  62. status = "okay";
  63. };
  64. };
  65. nand0: nand@40000000 {
  66. nand-bus-width = <8>;
  67. nand-ecc-mode = "soft";
  68. nand-on-flash-bbt;
  69. pinctrl-0 = <&pinctrl_board_nand>;
  70. gpios = <&pioD 3 0
  71. &pioC 14 0
  72. 0
  73. >;
  74. status = "okay";
  75. at91bootstrap@0 {
  76. label = "at91bootstrap";
  77. reg = <0x0 0x20000>;
  78. };
  79. barebox@20000 {
  80. label = "barebox";
  81. reg = <0x20000 0x40000>;
  82. };
  83. bareboxenv@60000 {
  84. label = "bareboxenv";
  85. reg = <0x60000 0x1A0000>;
  86. };
  87. kernel@200000 {
  88. label = "bareboxenv2";
  89. reg = <0x200000 0x300000>;
  90. };
  91. kernel@500000 {
  92. label = "root";
  93. reg = <0x500000 0x400000>;
  94. };
  95. data@900000 {
  96. label = "data";
  97. reg = <0x900000 0x8340000>;
  98. };
  99. };
  100. usb0: ohci@00700000 {
  101. status = "okay";
  102. num-ports = <2>;
  103. };
  104. usb1: ehci@00800000 {
  105. status = "okay";
  106. };
  107. };
  108. leds {
  109. compatible = "gpio-leds";
  110. led0 {
  111. label = "led0";
  112. gpios = <&pioD 0 1>;
  113. linux,default-trigger = "nand-disk";
  114. };
  115. led1 {
  116. label = "led1";
  117. gpios = <&pioD 31 0>;
  118. linux,default-trigger = "heartbeat";
  119. };
  120. };
  121. gpio_keys {
  122. compatible = "gpio-keys";
  123. #address-cells = <1>;
  124. #size-cells = <0>;
  125. right {
  126. label = "SW4";
  127. gpios = <&pioE 7 1>;
  128. linux,code = <106>;
  129. };
  130. up {
  131. label = "SW3";
  132. gpios = <&pioE 8 1>;
  133. linux,code = <103>;
  134. };
  135. };
  136. };