imx51-babbage.dts 6.0 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. /include/ "imx51.dtsi"
  14. / {
  15. model = "Freescale i.MX51 Babbage Board";
  16. compatible = "fsl,imx51-babbage", "fsl,imx51";
  17. memory {
  18. reg = <0x90000000 0x20000000>;
  19. };
  20. display@di0 {
  21. compatible = "fsl,imx-parallel-display";
  22. crtcs = <&ipu 0>;
  23. interface-pix-fmt = "rgb24";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  26. };
  27. display@di1 {
  28. compatible = "fsl,imx-parallel-display";
  29. crtcs = <&ipu 1>;
  30. interface-pix-fmt = "rgb565";
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&pinctrl_ipu_disp2_1>;
  33. };
  34. gpio-keys {
  35. compatible = "gpio-keys";
  36. power {
  37. label = "Power Button";
  38. gpios = <&gpio2 21 0>;
  39. linux,code = <116>; /* KEY_POWER */
  40. gpio-key,wakeup;
  41. };
  42. };
  43. sound {
  44. compatible = "fsl,imx51-babbage-sgtl5000",
  45. "fsl,imx-audio-sgtl5000";
  46. model = "imx51-babbage-sgtl5000";
  47. ssi-controller = <&ssi2>;
  48. audio-codec = <&sgtl5000>;
  49. audio-routing =
  50. "MIC_IN", "Mic Jack",
  51. "Mic Jack", "Mic Bias",
  52. "Headphone Jack", "HP_OUT";
  53. mux-int-port = <2>;
  54. mux-ext-port = <3>;
  55. };
  56. };
  57. &esdhc1 {
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pinctrl_esdhc1_1>;
  60. fsl,cd-controller;
  61. fsl,wp-controller;
  62. status = "okay";
  63. };
  64. &esdhc2 {
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&pinctrl_esdhc2_1>;
  67. cd-gpios = <&gpio1 6 0>;
  68. wp-gpios = <&gpio1 5 0>;
  69. status = "okay";
  70. };
  71. &uart3 {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&pinctrl_uart3_1>;
  74. fsl,uart-has-rtscts;
  75. status = "okay";
  76. };
  77. &ecspi1 {
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&pinctrl_ecspi1_1>;
  80. fsl,spi-num-chipselects = <2>;
  81. cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  82. status = "okay";
  83. pmic: mc13892@0 {
  84. #address-cells = <1>;
  85. #size-cells = <0>;
  86. compatible = "fsl,mc13892";
  87. spi-max-frequency = <6000000>;
  88. reg = <0>;
  89. interrupt-parent = <&gpio1>;
  90. interrupts = <8 0x4>;
  91. regulators {
  92. sw1_reg: sw1 {
  93. regulator-min-microvolt = <600000>;
  94. regulator-max-microvolt = <1375000>;
  95. regulator-boot-on;
  96. regulator-always-on;
  97. };
  98. sw2_reg: sw2 {
  99. regulator-min-microvolt = <900000>;
  100. regulator-max-microvolt = <1850000>;
  101. regulator-boot-on;
  102. regulator-always-on;
  103. };
  104. sw3_reg: sw3 {
  105. regulator-min-microvolt = <1100000>;
  106. regulator-max-microvolt = <1850000>;
  107. regulator-boot-on;
  108. regulator-always-on;
  109. };
  110. sw4_reg: sw4 {
  111. regulator-min-microvolt = <1100000>;
  112. regulator-max-microvolt = <1850000>;
  113. regulator-boot-on;
  114. regulator-always-on;
  115. };
  116. vpll_reg: vpll {
  117. regulator-min-microvolt = <1050000>;
  118. regulator-max-microvolt = <1800000>;
  119. regulator-boot-on;
  120. regulator-always-on;
  121. };
  122. vdig_reg: vdig {
  123. regulator-min-microvolt = <1650000>;
  124. regulator-max-microvolt = <1650000>;
  125. regulator-boot-on;
  126. };
  127. vsd_reg: vsd {
  128. regulator-min-microvolt = <1800000>;
  129. regulator-max-microvolt = <3150000>;
  130. };
  131. vusb2_reg: vusb2 {
  132. regulator-min-microvolt = <2400000>;
  133. regulator-max-microvolt = <2775000>;
  134. regulator-boot-on;
  135. regulator-always-on;
  136. };
  137. vvideo_reg: vvideo {
  138. regulator-min-microvolt = <2775000>;
  139. regulator-max-microvolt = <2775000>;
  140. };
  141. vaudio_reg: vaudio {
  142. regulator-min-microvolt = <2300000>;
  143. regulator-max-microvolt = <3000000>;
  144. };
  145. vcam_reg: vcam {
  146. regulator-min-microvolt = <2500000>;
  147. regulator-max-microvolt = <3000000>;
  148. };
  149. vgen1_reg: vgen1 {
  150. regulator-min-microvolt = <1200000>;
  151. regulator-max-microvolt = <1200000>;
  152. };
  153. vgen2_reg: vgen2 {
  154. regulator-min-microvolt = <1200000>;
  155. regulator-max-microvolt = <3150000>;
  156. regulator-always-on;
  157. };
  158. vgen3_reg: vgen3 {
  159. regulator-min-microvolt = <1800000>;
  160. regulator-max-microvolt = <2900000>;
  161. regulator-always-on;
  162. };
  163. };
  164. };
  165. flash: at45db321d@1 {
  166. #address-cells = <1>;
  167. #size-cells = <1>;
  168. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  169. spi-max-frequency = <25000000>;
  170. reg = <1>;
  171. partition@0 {
  172. label = "U-Boot";
  173. reg = <0x0 0x40000>;
  174. read-only;
  175. };
  176. partition@40000 {
  177. label = "Kernel";
  178. reg = <0x40000 0x3c0000>;
  179. };
  180. };
  181. };
  182. &ssi2 {
  183. fsl,mode = "i2s-slave";
  184. status = "okay";
  185. };
  186. &iomuxc {
  187. pinctrl-names = "default";
  188. pinctrl-0 = <&pinctrl_hog>;
  189. hog {
  190. pinctrl_hog: hoggrp {
  191. fsl,pins = <
  192. 694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
  193. 697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
  194. 737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
  195. 740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
  196. 121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
  197. 402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
  198. 405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
  199. >;
  200. };
  201. };
  202. };
  203. &uart1 {
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_uart1_1>;
  206. fsl,uart-has-rtscts;
  207. status = "okay";
  208. };
  209. &uart2 {
  210. pinctrl-names = "default";
  211. pinctrl-0 = <&pinctrl_uart2_1>;
  212. status = "okay";
  213. };
  214. &i2c2 {
  215. pinctrl-names = "default";
  216. pinctrl-0 = <&pinctrl_i2c2_1>;
  217. status = "okay";
  218. sgtl5000: codec@0a {
  219. compatible = "fsl,sgtl5000";
  220. reg = <0x0a>;
  221. clock-frequency = <26000000>;
  222. VDDA-supply = <&vdig_reg>;
  223. VDDIO-supply = <&vvideo_reg>;
  224. };
  225. };
  226. &audmux {
  227. pinctrl-names = "default";
  228. pinctrl-0 = <&pinctrl_audmux_1>;
  229. status = "okay";
  230. };
  231. &fec {
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&pinctrl_fec_1>;
  234. phy-mode = "mii";
  235. status = "okay";
  236. };
  237. &kpp {
  238. pinctrl-names = "default";
  239. pinctrl-0 = <&pinctrl_kpp_1>;
  240. linux,keymap = <0x00000067 /* KEY_UP */
  241. 0x0001006c /* KEY_DOWN */
  242. 0x00020072 /* KEY_VOLUMEDOWN */
  243. 0x00030066 /* KEY_HOME */
  244. 0x0100006a /* KEY_RIGHT */
  245. 0x01010069 /* KEY_LEFT */
  246. 0x0102001c /* KEY_ENTER */
  247. 0x01030073 /* KEY_VOLUMEUP */
  248. 0x02000040 /* KEY_F6 */
  249. 0x02010042 /* KEY_F8 */
  250. 0x02020043 /* KEY_F9 */
  251. 0x02030044 /* KEY_F10 */
  252. 0x0300003b /* KEY_F1 */
  253. 0x0301003c /* KEY_F2 */
  254. 0x0302003d /* KEY_F3 */
  255. 0x03030074>; /* KEY_POWER */
  256. status = "okay";
  257. };