imx25.dtsi 12 KB

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  1. /*
  2. * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. aliases {
  14. serial0 = &uart1;
  15. serial1 = &uart2;
  16. serial2 = &uart3;
  17. serial3 = &uart4;
  18. serial4 = &uart5;
  19. gpio0 = &gpio1;
  20. gpio1 = &gpio2;
  21. gpio2 = &gpio3;
  22. gpio3 = &gpio4;
  23. usb0 = &usbotg;
  24. usb1 = &usbhost1;
  25. };
  26. asic: asic-interrupt-controller@68000000 {
  27. compatible = "fsl,imx25-asic", "fsl,avic";
  28. interrupt-controller;
  29. #interrupt-cells = <1>;
  30. reg = <0x68000000 0x8000000>;
  31. };
  32. clocks {
  33. #address-cells = <1>;
  34. #size-cells = <0>;
  35. osc {
  36. compatible = "fsl,imx-osc", "fixed-clock";
  37. clock-frequency = <24000000>;
  38. };
  39. };
  40. soc {
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. compatible = "simple-bus";
  44. interrupt-parent = <&asic>;
  45. ranges;
  46. aips@43f00000 { /* AIPS1 */
  47. compatible = "fsl,aips-bus", "simple-bus";
  48. #address-cells = <1>;
  49. #size-cells = <1>;
  50. reg = <0x43f00000 0x100000>;
  51. ranges;
  52. i2c1: i2c@43f80000 {
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  56. reg = <0x43f80000 0x4000>;
  57. clocks = <&clks 48>;
  58. clock-names = "";
  59. interrupts = <3>;
  60. status = "disabled";
  61. };
  62. i2c3: i2c@43f84000 {
  63. #address-cells = <1>;
  64. #size-cells = <0>;
  65. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  66. reg = <0x43f84000 0x4000>;
  67. clocks = <&clks 48>;
  68. clock-names = "";
  69. interrupts = <10>;
  70. status = "disabled";
  71. };
  72. can1: can@43f88000 {
  73. compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
  74. reg = <0x43f88000 0x4000>;
  75. interrupts = <43>;
  76. clocks = <&clks 75>, <&clks 75>;
  77. clock-names = "ipg", "per";
  78. status = "disabled";
  79. };
  80. can2: can@43f8c000 {
  81. compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
  82. reg = <0x43f8c000 0x4000>;
  83. interrupts = <44>;
  84. clocks = <&clks 76>, <&clks 76>;
  85. clock-names = "ipg", "per";
  86. status = "disabled";
  87. };
  88. uart1: serial@43f90000 {
  89. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  90. reg = <0x43f90000 0x4000>;
  91. interrupts = <45>;
  92. clocks = <&clks 120>, <&clks 57>;
  93. clock-names = "ipg", "per";
  94. status = "disabled";
  95. };
  96. uart2: serial@43f94000 {
  97. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  98. reg = <0x43f94000 0x4000>;
  99. interrupts = <32>;
  100. clocks = <&clks 121>, <&clks 57>;
  101. clock-names = "ipg", "per";
  102. status = "disabled";
  103. };
  104. i2c2: i2c@43f98000 {
  105. #address-cells = <1>;
  106. #size-cells = <0>;
  107. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  108. reg = <0x43f98000 0x4000>;
  109. clocks = <&clks 48>;
  110. clock-names = "";
  111. interrupts = <4>;
  112. status = "disabled";
  113. };
  114. owire@43f9c000 {
  115. #address-cells = <1>;
  116. #size-cells = <0>;
  117. reg = <0x43f9c000 0x4000>;
  118. clocks = <&clks 51>;
  119. clock-names = "";
  120. interrupts = <2>;
  121. status = "disabled";
  122. };
  123. spi1: cspi@43fa4000 {
  124. #address-cells = <1>;
  125. #size-cells = <0>;
  126. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  127. reg = <0x43fa4000 0x4000>;
  128. clocks = <&clks 62>;
  129. clock-names = "ipg";
  130. interrupts = <14>;
  131. status = "disabled";
  132. };
  133. kpp@43fa8000 {
  134. #address-cells = <1>;
  135. #size-cells = <0>;
  136. reg = <0x43fa8000 0x4000>;
  137. clocks = <&clks 102>;
  138. clock-names = "";
  139. interrupts = <24>;
  140. status = "disabled";
  141. };
  142. iomuxc@43fac000{
  143. compatible = "fsl,imx25-iomuxc";
  144. reg = <0x43fac000 0x4000>;
  145. };
  146. audmux@43fb0000 {
  147. compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
  148. reg = <0x43fb0000 0x4000>;
  149. status = "disabled";
  150. };
  151. };
  152. spba@50000000 {
  153. compatible = "fsl,spba-bus", "simple-bus";
  154. #address-cells = <1>;
  155. #size-cells = <1>;
  156. reg = <0x50000000 0x40000>;
  157. ranges;
  158. spi3: cspi@50004000 {
  159. #address-cells = <1>;
  160. #size-cells = <0>;
  161. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  162. reg = <0x50004000 0x4000>;
  163. interrupts = <0>;
  164. clocks = <&clks 80>;
  165. clock-names = "ipg";
  166. status = "disabled";
  167. };
  168. uart4: serial@50008000 {
  169. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  170. reg = <0x50008000 0x4000>;
  171. interrupts = <5>;
  172. clocks = <&clks 123>, <&clks 57>;
  173. clock-names = "ipg", "per";
  174. status = "disabled";
  175. };
  176. uart3: serial@5000c000 {
  177. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  178. reg = <0x5000c000 0x4000>;
  179. interrupts = <18>;
  180. clocks = <&clks 122>, <&clks 57>;
  181. clock-names = "ipg", "per";
  182. status = "disabled";
  183. };
  184. spi2: cspi@50010000 {
  185. #address-cells = <1>;
  186. #size-cells = <0>;
  187. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  188. reg = <0x50010000 0x4000>;
  189. clocks = <&clks 79>;
  190. clock-names = "ipg";
  191. interrupts = <13>;
  192. status = "disabled";
  193. };
  194. ssi2: ssi@50014000 {
  195. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  196. reg = <0x50014000 0x4000>;
  197. interrupts = <11>;
  198. status = "disabled";
  199. };
  200. esai@50018000 {
  201. reg = <0x50018000 0x4000>;
  202. interrupts = <7>;
  203. };
  204. uart5: serial@5002c000 {
  205. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  206. reg = <0x5002c000 0x4000>;
  207. interrupts = <40>;
  208. clocks = <&clks 124>, <&clks 57>;
  209. clock-names = "ipg", "per";
  210. status = "disabled";
  211. };
  212. tsc: tsc@50030000 {
  213. compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
  214. reg = <0x50030000 0x4000>;
  215. interrupts = <46>;
  216. clocks = <&clks 119>;
  217. clock-names = "ipg";
  218. status = "disabled";
  219. };
  220. ssi1: ssi@50034000 {
  221. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  222. reg = <0x50034000 0x4000>;
  223. interrupts = <12>;
  224. status = "disabled";
  225. };
  226. fec: ethernet@50038000 {
  227. compatible = "fsl,imx25-fec";
  228. reg = <0x50038000 0x4000>;
  229. interrupts = <57>;
  230. clocks = <&clks 88>, <&clks 65>;
  231. clock-names = "ipg", "ahb";
  232. status = "disabled";
  233. };
  234. };
  235. aips@53f00000 { /* AIPS2 */
  236. compatible = "fsl,aips-bus", "simple-bus";
  237. #address-cells = <1>;
  238. #size-cells = <1>;
  239. reg = <0x53f00000 0x100000>;
  240. ranges;
  241. clks: ccm@53f80000 {
  242. compatible = "fsl,imx25-ccm";
  243. reg = <0x53f80000 0x4000>;
  244. interrupts = <31>;
  245. #clock-cells = <1>;
  246. };
  247. gpt4: timer@53f84000 {
  248. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  249. reg = <0x53f84000 0x4000>;
  250. clocks = <&clks 9>, <&clks 45>;
  251. clock-names = "ipg", "per";
  252. interrupts = <1>;
  253. };
  254. gpt3: timer@53f88000 {
  255. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  256. reg = <0x53f88000 0x4000>;
  257. clocks = <&clks 9>, <&clks 47>;
  258. clock-names = "ipg", "per";
  259. interrupts = <29>;
  260. };
  261. gpt2: timer@53f8c000 {
  262. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  263. reg = <0x53f8c000 0x4000>;
  264. clocks = <&clks 9>, <&clks 47>;
  265. clock-names = "ipg", "per";
  266. interrupts = <53>;
  267. };
  268. gpt1: timer@53f90000 {
  269. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  270. reg = <0x53f90000 0x4000>;
  271. clocks = <&clks 9>, <&clks 47>;
  272. clock-names = "ipg", "per";
  273. interrupts = <54>;
  274. };
  275. epit1: timer@53f94000 {
  276. compatible = "fsl,imx25-epit";
  277. reg = <0x53f94000 0x4000>;
  278. interrupts = <28>;
  279. };
  280. epit2: timer@53f98000 {
  281. compatible = "fsl,imx25-epit";
  282. reg = <0x53f98000 0x4000>;
  283. interrupts = <27>;
  284. };
  285. gpio4: gpio@53f9c000 {
  286. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  287. reg = <0x53f9c000 0x4000>;
  288. interrupts = <23>;
  289. gpio-controller;
  290. #gpio-cells = <2>;
  291. interrupt-controller;
  292. #interrupt-cells = <2>;
  293. };
  294. pwm2: pwm@53fa0000 {
  295. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  296. #pwm-cells = <2>;
  297. reg = <0x53fa0000 0x4000>;
  298. clocks = <&clks 106>, <&clks 36>;
  299. clock-names = "ipg", "per";
  300. interrupts = <36>;
  301. };
  302. gpio3: gpio@53fa4000 {
  303. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  304. reg = <0x53fa4000 0x4000>;
  305. interrupts = <16>;
  306. gpio-controller;
  307. #gpio-cells = <2>;
  308. interrupt-controller;
  309. #interrupt-cells = <2>;
  310. };
  311. pwm3: pwm@53fa8000 {
  312. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  313. #pwm-cells = <2>;
  314. reg = <0x53fa8000 0x4000>;
  315. clocks = <&clks 107>, <&clks 36>;
  316. clock-names = "ipg", "per";
  317. interrupts = <41>;
  318. };
  319. esdhc1: esdhc@53fb4000 {
  320. compatible = "fsl,imx25-esdhc";
  321. reg = <0x53fb4000 0x4000>;
  322. interrupts = <9>;
  323. clocks = <&clks 86>, <&clks 63>, <&clks 45>;
  324. clock-names = "ipg", "ahb", "per";
  325. status = "disabled";
  326. };
  327. esdhc2: esdhc@53fb8000 {
  328. compatible = "fsl,imx25-esdhc";
  329. reg = <0x53fb8000 0x4000>;
  330. interrupts = <8>;
  331. clocks = <&clks 87>, <&clks 64>, <&clks 46>;
  332. clock-names = "ipg", "ahb", "per";
  333. status = "disabled";
  334. };
  335. lcdc@53fbc000 {
  336. reg = <0x53fbc000 0x4000>;
  337. interrupts = <39>;
  338. clocks = <&clks 103>, <&clks 66>, <&clks 49>;
  339. clock-names = "ipg", "ahb", "per";
  340. status = "disabled";
  341. };
  342. slcdc@53fc0000 {
  343. reg = <0x53fc0000 0x4000>;
  344. interrupts = <38>;
  345. status = "disabled";
  346. };
  347. pwm4: pwm@53fc8000 {
  348. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  349. reg = <0x53fc8000 0x4000>;
  350. clocks = <&clks 108>, <&clks 36>;
  351. clock-names = "ipg", "per";
  352. interrupts = <42>;
  353. };
  354. gpio1: gpio@53fcc000 {
  355. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  356. reg = <0x53fcc000 0x4000>;
  357. interrupts = <52>;
  358. gpio-controller;
  359. #gpio-cells = <2>;
  360. interrupt-controller;
  361. #interrupt-cells = <2>;
  362. };
  363. gpio2: gpio@53fd0000 {
  364. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  365. reg = <0x53fd0000 0x4000>;
  366. interrupts = <51>;
  367. gpio-controller;
  368. #gpio-cells = <2>;
  369. interrupt-controller;
  370. #interrupt-cells = <2>;
  371. };
  372. sdma@53fd4000 {
  373. compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
  374. reg = <0x53fd4000 0x4000>;
  375. clocks = <&clks 112>, <&clks 68>;
  376. clock-names = "ipg", "ahb";
  377. interrupts = <34>;
  378. };
  379. wdog@53fdc000 {
  380. compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
  381. reg = <0x53fdc000 0x4000>;
  382. clocks = <&clks 126>;
  383. clock-names = "";
  384. interrupts = <55>;
  385. };
  386. pwm1: pwm@53fe0000 {
  387. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  388. #pwm-cells = <2>;
  389. reg = <0x53fe0000 0x4000>;
  390. clocks = <&clks 105>, <&clks 36>;
  391. clock-names = "ipg", "per";
  392. interrupts = <26>;
  393. };
  394. usbphy1: usbphy@1 {
  395. compatible = "nop-usbphy";
  396. status = "disabled";
  397. };
  398. usbphy2: usbphy@2 {
  399. compatible = "nop-usbphy";
  400. status = "disabled";
  401. };
  402. usbotg: usb@53ff4000 {
  403. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  404. reg = <0x53ff4000 0x0200>;
  405. interrupts = <37>;
  406. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  407. clock-names = "ipg", "ahb", "per";
  408. fsl,usbmisc = <&usbmisc 0>;
  409. status = "disabled";
  410. };
  411. usbhost1: usb@53ff4400 {
  412. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  413. reg = <0x53ff4400 0x0200>;
  414. interrupts = <35>;
  415. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  416. clock-names = "ipg", "ahb", "per";
  417. fsl,usbmisc = <&usbmisc 1>;
  418. status = "disabled";
  419. };
  420. usbmisc: usbmisc@53ff4600 {
  421. #index-cells = <1>;
  422. compatible = "fsl,imx25-usbmisc";
  423. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  424. clock-names = "ipg", "ahb", "per";
  425. reg = <0x53ff4600 0x00f>;
  426. status = "disabled";
  427. };
  428. dryice@53ffc000 {
  429. compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
  430. reg = <0x53ffc000 0x4000>;
  431. clocks = <&clks 81>;
  432. clock-names = "ipg";
  433. interrupts = <25>;
  434. };
  435. };
  436. emi@80000000 {
  437. compatible = "fsl,emi-bus", "simple-bus";
  438. #address-cells = <1>;
  439. #size-cells = <1>;
  440. reg = <0x80000000 0x3b002000>;
  441. ranges;
  442. nfc: nand@bb000000 {
  443. #address-cells = <1>;
  444. #size-cells = <1>;
  445. compatible = "fsl,imx25-nand";
  446. reg = <0xbb000000 0x2000>;
  447. clocks = <&clks 50>;
  448. clock-names = "";
  449. interrupts = <33>;
  450. status = "disabled";
  451. };
  452. };
  453. };
  454. };