emev2.dtsi 1.3 KB

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  1. /*
  2. * Device Tree Source for the EMEV2 SoC
  3. *
  4. * Copyright (C) 2012 Renesas Solutions Corp.
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. compatible = "renesas,emev2";
  13. interrupt-parent = <&gic>;
  14. cpus {
  15. #address-cells = <1>;
  16. #size-cells = <0>;
  17. cpu@0 {
  18. device_type = "cpu";
  19. compatible = "arm,cortex-a9";
  20. reg = <0>;
  21. };
  22. cpu@1 {
  23. device_type = "cpu";
  24. compatible = "arm,cortex-a9";
  25. reg = <1>;
  26. };
  27. };
  28. gic: interrupt-controller@e0020000 {
  29. compatible = "arm,cortex-a9-gic";
  30. interrupt-controller;
  31. #interrupt-cells = <3>;
  32. reg = <0xe0028000 0x1000>,
  33. <0xe0020000 0x0100>;
  34. };
  35. sti@e0180000 {
  36. compatible = "renesas,em-sti";
  37. reg = <0xe0180000 0x54>;
  38. interrupts = <0 125 0>;
  39. };
  40. uart@e1020000 {
  41. compatible = "renesas,em-uart";
  42. reg = <0xe1020000 0x38>;
  43. interrupts = <0 8 0>;
  44. };
  45. uart@e1030000 {
  46. compatible = "renesas,em-uart";
  47. reg = <0xe1030000 0x38>;
  48. interrupts = <0 9 0>;
  49. };
  50. uart@e1040000 {
  51. compatible = "renesas,em-uart";
  52. reg = <0xe1040000 0x38>;
  53. interrupts = <0 10 0>;
  54. };
  55. uart@e1050000 {
  56. compatible = "renesas,em-uart";
  57. reg = <0xe1050000 0x38>;
  58. interrupts = <0 11 0>;
  59. };
  60. };