dove.dtsi 5.3 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "marvell,dove";
  4. model = "Marvell Armada 88AP510 SoC";
  5. aliases {
  6. gpio0 = &gpio0;
  7. gpio1 = &gpio1;
  8. gpio2 = &gpio2;
  9. };
  10. soc@f1000000 {
  11. compatible = "simple-bus";
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. interrupt-parent = <&intc>;
  15. ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
  16. 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
  17. 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
  18. 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
  19. 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
  20. 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
  21. 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
  22. 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
  23. l2: l2-cache {
  24. compatible = "marvell,tauros2-cache";
  25. marvell,tauros2-cache-features = <0>;
  26. };
  27. intc: interrupt-controller {
  28. compatible = "marvell,orion-intc";
  29. interrupt-controller;
  30. #interrupt-cells = <1>;
  31. reg = <0x20204 0x04>, <0x20214 0x04>;
  32. };
  33. core_clk: core-clocks@d0214 {
  34. compatible = "marvell,dove-core-clock";
  35. reg = <0xd0214 0x4>;
  36. #clock-cells = <1>;
  37. };
  38. gate_clk: clock-gating-control@d0038 {
  39. compatible = "marvell,dove-gating-clock";
  40. reg = <0xd0038 0x4>;
  41. clocks = <&core_clk 0>;
  42. #clock-cells = <1>;
  43. };
  44. uart0: serial@12000 {
  45. compatible = "ns16550a";
  46. reg = <0x12000 0x100>;
  47. reg-shift = <2>;
  48. interrupts = <7>;
  49. clocks = <&core_clk 0>;
  50. status = "disabled";
  51. };
  52. uart1: serial@12100 {
  53. compatible = "ns16550a";
  54. reg = <0x12100 0x100>;
  55. reg-shift = <2>;
  56. interrupts = <8>;
  57. clocks = <&core_clk 0>;
  58. status = "disabled";
  59. };
  60. uart2: serial@12200 {
  61. compatible = "ns16550a";
  62. reg = <0x12000 0x100>;
  63. reg-shift = <2>;
  64. interrupts = <9>;
  65. clocks = <&core_clk 0>;
  66. status = "disabled";
  67. };
  68. uart3: serial@12300 {
  69. compatible = "ns16550a";
  70. reg = <0x12100 0x100>;
  71. reg-shift = <2>;
  72. interrupts = <10>;
  73. clocks = <&core_clk 0>;
  74. status = "disabled";
  75. };
  76. gpio0: gpio@d0400 {
  77. compatible = "marvell,orion-gpio";
  78. #gpio-cells = <2>;
  79. gpio-controller;
  80. reg = <0xd0400 0x20>;
  81. ngpios = <32>;
  82. interrupt-controller;
  83. #interrupt-cells = <2>;
  84. interrupts = <12>, <13>, <14>, <60>;
  85. };
  86. gpio1: gpio@d0420 {
  87. compatible = "marvell,orion-gpio";
  88. #gpio-cells = <2>;
  89. gpio-controller;
  90. reg = <0xd0420 0x20>;
  91. ngpios = <32>;
  92. interrupt-controller;
  93. #interrupt-cells = <2>;
  94. interrupts = <61>;
  95. };
  96. gpio2: gpio@e8400 {
  97. compatible = "marvell,orion-gpio";
  98. #gpio-cells = <2>;
  99. gpio-controller;
  100. reg = <0xe8400 0x0c>;
  101. ngpios = <8>;
  102. };
  103. pinctrl: pinctrl@d0200 {
  104. compatible = "marvell,dove-pinctrl";
  105. reg = <0xd0200 0x10>;
  106. clocks = <&gate_clk 22>;
  107. };
  108. spi0: spi@10600 {
  109. compatible = "marvell,orion-spi";
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. cell-index = <0>;
  113. interrupts = <6>;
  114. reg = <0x10600 0x28>;
  115. clocks = <&core_clk 0>;
  116. status = "disabled";
  117. };
  118. spi1: spi@14600 {
  119. compatible = "marvell,orion-spi";
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. cell-index = <1>;
  123. interrupts = <5>;
  124. reg = <0x14600 0x28>;
  125. clocks = <&core_clk 0>;
  126. status = "disabled";
  127. };
  128. i2c0: i2c@11000 {
  129. compatible = "marvell,mv64xxx-i2c";
  130. reg = <0x11000 0x20>;
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. interrupts = <11>;
  134. clock-frequency = <400000>;
  135. timeout-ms = <1000>;
  136. clocks = <&core_clk 0>;
  137. status = "disabled";
  138. };
  139. ehci0: usb-host@50000 {
  140. compatible = "marvell,orion-ehci";
  141. reg = <0x50000 0x1000>;
  142. interrupts = <24>;
  143. clocks = <&gate_clk 0>;
  144. status = "okay";
  145. };
  146. ehci1: usb-host@51000 {
  147. compatible = "marvell,orion-ehci";
  148. reg = <0x51000 0x1000>;
  149. interrupts = <25>;
  150. clocks = <&gate_clk 1>;
  151. status = "okay";
  152. };
  153. sdio0: sdio@92000 {
  154. compatible = "marvell,dove-sdhci";
  155. reg = <0x92000 0x100>;
  156. interrupts = <35>, <37>;
  157. clocks = <&gate_clk 8>;
  158. status = "disabled";
  159. };
  160. sdio1: sdio@90000 {
  161. compatible = "marvell,dove-sdhci";
  162. reg = <0x90000 0x100>;
  163. interrupts = <36>, <38>;
  164. clocks = <&gate_clk 9>;
  165. status = "disabled";
  166. };
  167. sata0: sata@a0000 {
  168. compatible = "marvell,orion-sata";
  169. reg = <0xa0000 0x2400>;
  170. interrupts = <62>;
  171. clocks = <&gate_clk 3>;
  172. nr-ports = <1>;
  173. status = "disabled";
  174. };
  175. rtc@d8500 {
  176. compatible = "marvell,orion-rtc";
  177. reg = <0xd8500 0x20>;
  178. };
  179. crypto: crypto@30000 {
  180. compatible = "marvell,orion-crypto";
  181. reg = <0x30000 0x10000>,
  182. <0xc8000000 0x800>;
  183. reg-names = "regs", "sram";
  184. interrupts = <31>;
  185. clocks = <&gate_clk 15>;
  186. status = "okay";
  187. };
  188. xor0: dma-engine@60800 {
  189. compatible = "marvell,orion-xor";
  190. reg = <0x60800 0x100
  191. 0x60a00 0x100>;
  192. clocks = <&gate_clk 23>;
  193. status = "okay";
  194. channel0 {
  195. interrupts = <39>;
  196. dmacap,memcpy;
  197. dmacap,xor;
  198. };
  199. channel1 {
  200. interrupts = <40>;
  201. dmacap,memset;
  202. dmacap,memcpy;
  203. dmacap,xor;
  204. };
  205. };
  206. xor1: dma-engine@60900 {
  207. compatible = "marvell,orion-xor";
  208. reg = <0x60900 0x100
  209. 0x60b00 0x100>;
  210. clocks = <&gate_clk 24>;
  211. status = "okay";
  212. channel0 {
  213. interrupts = <42>;
  214. dmacap,memcpy;
  215. dmacap,xor;
  216. };
  217. channel1 {
  218. interrupts = <43>;
  219. dmacap,memset;
  220. dmacap,memcpy;
  221. dmacap,xor;
  222. };
  223. };
  224. };
  225. };