entry.h 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724
  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Vineetg: March 2009 (Supporting 2 levels of Interrupts)
  9. * Stack switching code can no longer reliably rely on the fact that
  10. * if we are NOT in user mode, stack is switched to kernel mode.
  11. * e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
  12. * it's prologue including stack switching from user mode
  13. *
  14. * Vineetg: Aug 28th 2008: Bug #94984
  15. * -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
  16. * Normally CPU does this automatically, however when doing FAKE rtie,
  17. * we also need to explicitly do this. The problem in macros
  18. * FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
  19. * was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context
  20. *
  21. * Vineetg: May 5th 2008
  22. * -Modified CALLEE_REG save/restore macros to handle the fact that
  23. * r25 contains the kernel current task ptr
  24. * - Defined Stack Switching Macro to be reused in all intr/excp hdlrs
  25. * - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the
  26. * address Write back load ld.ab instead of seperate ld/add instn
  27. *
  28. * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
  29. */
  30. #ifndef __ASM_ARC_ENTRY_H
  31. #define __ASM_ARC_ENTRY_H
  32. #ifdef __ASSEMBLY__
  33. #include <asm/unistd.h> /* For NR_syscalls defination */
  34. #include <asm/asm-offsets.h>
  35. #include <asm/arcregs.h>
  36. #include <asm/ptrace.h>
  37. #include <asm/processor.h> /* For VMALLOC_START */
  38. #include <asm/thread_info.h> /* For THREAD_SIZE */
  39. /* Note on the LD/ST addr modes with addr reg wback
  40. *
  41. * LD.a same as LD.aw
  42. *
  43. * LD.a reg1, [reg2, x] => Pre Incr
  44. * Eff Addr for load = [reg2 + x]
  45. *
  46. * LD.ab reg1, [reg2, x] => Post Incr
  47. * Eff Addr for load = [reg2]
  48. */
  49. /*--------------------------------------------------------------
  50. * Save caller saved registers (scratch registers) ( r0 - r12 )
  51. * Registers are pushed / popped in the order defined in struct ptregs
  52. * in asm/ptrace.h
  53. *-------------------------------------------------------------*/
  54. .macro SAVE_CALLER_SAVED
  55. st.a r0, [sp, -4]
  56. st.a r1, [sp, -4]
  57. st.a r2, [sp, -4]
  58. st.a r3, [sp, -4]
  59. st.a r4, [sp, -4]
  60. st.a r5, [sp, -4]
  61. st.a r6, [sp, -4]
  62. st.a r7, [sp, -4]
  63. st.a r8, [sp, -4]
  64. st.a r9, [sp, -4]
  65. st.a r10, [sp, -4]
  66. st.a r11, [sp, -4]
  67. st.a r12, [sp, -4]
  68. .endm
  69. /*--------------------------------------------------------------
  70. * Restore caller saved registers (scratch registers)
  71. *-------------------------------------------------------------*/
  72. .macro RESTORE_CALLER_SAVED
  73. ld.ab r12, [sp, 4]
  74. ld.ab r11, [sp, 4]
  75. ld.ab r10, [sp, 4]
  76. ld.ab r9, [sp, 4]
  77. ld.ab r8, [sp, 4]
  78. ld.ab r7, [sp, 4]
  79. ld.ab r6, [sp, 4]
  80. ld.ab r5, [sp, 4]
  81. ld.ab r4, [sp, 4]
  82. ld.ab r3, [sp, 4]
  83. ld.ab r2, [sp, 4]
  84. ld.ab r1, [sp, 4]
  85. ld.ab r0, [sp, 4]
  86. .endm
  87. /*--------------------------------------------------------------
  88. * Save callee saved registers (non scratch registers) ( r13 - r25 )
  89. * on kernel stack.
  90. * User mode callee regs need to be saved in case of
  91. * -fork and friends for replicating from parent to child
  92. * -before going into do_signal( ) for ptrace/core-dump
  93. * Special case handling is required for r25 in case it is used by kernel
  94. * for caching task ptr. Low level exception/ISR save user mode r25
  95. * into task->thread.user_r25. So it needs to be retrieved from there and
  96. * saved into kernel stack with rest of callee reg-file
  97. *-------------------------------------------------------------*/
  98. .macro SAVE_CALLEE_SAVED_USER
  99. st.a r13, [sp, -4]
  100. st.a r14, [sp, -4]
  101. st.a r15, [sp, -4]
  102. st.a r16, [sp, -4]
  103. st.a r17, [sp, -4]
  104. st.a r18, [sp, -4]
  105. st.a r19, [sp, -4]
  106. st.a r20, [sp, -4]
  107. st.a r21, [sp, -4]
  108. st.a r22, [sp, -4]
  109. st.a r23, [sp, -4]
  110. st.a r24, [sp, -4]
  111. #ifdef CONFIG_ARC_CURR_IN_REG
  112. ; Retrieve orig r25 and save it on stack
  113. ld r12, [r25, TASK_THREAD + THREAD_USER_R25]
  114. st.a r12, [sp, -4]
  115. #else
  116. st.a r25, [sp, -4]
  117. #endif
  118. /* move up by 1 word to "create" callee_regs->"stack_place_holder" */
  119. sub sp, sp, 4
  120. .endm
  121. /*--------------------------------------------------------------
  122. * Save callee saved registers (non scratch registers) ( r13 - r25 )
  123. * kernel mode callee regs needed to be saved in case of context switch
  124. * If r25 is used for caching task pointer then that need not be saved
  125. * as it can be re-created from current task global
  126. *-------------------------------------------------------------*/
  127. .macro SAVE_CALLEE_SAVED_KERNEL
  128. st.a r13, [sp, -4]
  129. st.a r14, [sp, -4]
  130. st.a r15, [sp, -4]
  131. st.a r16, [sp, -4]
  132. st.a r17, [sp, -4]
  133. st.a r18, [sp, -4]
  134. st.a r19, [sp, -4]
  135. st.a r20, [sp, -4]
  136. st.a r21, [sp, -4]
  137. st.a r22, [sp, -4]
  138. st.a r23, [sp, -4]
  139. st.a r24, [sp, -4]
  140. #ifdef CONFIG_ARC_CURR_IN_REG
  141. sub sp, sp, 8
  142. #else
  143. st.a r25, [sp, -4]
  144. sub sp, sp, 4
  145. #endif
  146. .endm
  147. /*--------------------------------------------------------------
  148. * RESTORE_CALLEE_SAVED_KERNEL:
  149. * Loads callee (non scratch) Reg File by popping from Kernel mode stack.
  150. * This is reverse of SAVE_CALLEE_SAVED,
  151. *
  152. * NOTE:
  153. * Ideally this shd only be called in switch_to for loading
  154. * switched-IN task's CALLEE Reg File.
  155. * For all other cases RESTORE_CALLEE_SAVED_FAST must be used
  156. * which simply pops the stack w/o touching regs.
  157. *-------------------------------------------------------------*/
  158. .macro RESTORE_CALLEE_SAVED_KERNEL
  159. #ifdef CONFIG_ARC_CURR_IN_REG
  160. add sp, sp, 8 /* skip callee_reg gutter and user r25 placeholder */
  161. #else
  162. add sp, sp, 4 /* skip "callee_regs->stack_place_holder" */
  163. ld.ab r25, [sp, 4]
  164. #endif
  165. ld.ab r24, [sp, 4]
  166. ld.ab r23, [sp, 4]
  167. ld.ab r22, [sp, 4]
  168. ld.ab r21, [sp, 4]
  169. ld.ab r20, [sp, 4]
  170. ld.ab r19, [sp, 4]
  171. ld.ab r18, [sp, 4]
  172. ld.ab r17, [sp, 4]
  173. ld.ab r16, [sp, 4]
  174. ld.ab r15, [sp, 4]
  175. ld.ab r14, [sp, 4]
  176. ld.ab r13, [sp, 4]
  177. .endm
  178. /*--------------------------------------------------------------
  179. * RESTORE_CALLEE_SAVED_USER:
  180. * This is called after do_signal where tracer might have changed callee regs
  181. * thus we need to restore the reg file.
  182. * Special case handling is required for r25 in case it is used by kernel
  183. * for caching task ptr. Ptrace would have modified on-kernel-stack value of
  184. * r25, which needs to be shoved back into task->thread.user_r25 where from
  185. * Low level exception/ISR return code will retrieve to populate with rest of
  186. * callee reg-file.
  187. *-------------------------------------------------------------*/
  188. .macro RESTORE_CALLEE_SAVED_USER
  189. add sp, sp, 4 /* skip "callee_regs->stack_place_holder" */
  190. #ifdef CONFIG_ARC_CURR_IN_REG
  191. ld.ab r12, [sp, 4]
  192. st r12, [r25, TASK_THREAD + THREAD_USER_R25]
  193. #else
  194. ld.ab r25, [sp, 4]
  195. #endif
  196. ld.ab r24, [sp, 4]
  197. ld.ab r23, [sp, 4]
  198. ld.ab r22, [sp, 4]
  199. ld.ab r21, [sp, 4]
  200. ld.ab r20, [sp, 4]
  201. ld.ab r19, [sp, 4]
  202. ld.ab r18, [sp, 4]
  203. ld.ab r17, [sp, 4]
  204. ld.ab r16, [sp, 4]
  205. ld.ab r15, [sp, 4]
  206. ld.ab r14, [sp, 4]
  207. ld.ab r13, [sp, 4]
  208. .endm
  209. /*--------------------------------------------------------------
  210. * Super FAST Restore callee saved regs by simply re-adjusting SP
  211. *-------------------------------------------------------------*/
  212. .macro DISCARD_CALLEE_SAVED_USER
  213. add sp, sp, 14 * 4
  214. .endm
  215. /*--------------------------------------------------------------
  216. * Restore User mode r25 saved in task_struct->thread.user_r25
  217. *-------------------------------------------------------------*/
  218. .macro RESTORE_USER_R25
  219. ld r25, [r25, TASK_THREAD + THREAD_USER_R25]
  220. .endm
  221. /*-------------------------------------------------------------
  222. * given a tsk struct, get to the base of it's kernel mode stack
  223. * tsk->thread_info is really a PAGE, whose bottom hoists stack
  224. * which grows upwards towards thread_info
  225. *------------------------------------------------------------*/
  226. .macro GET_TSK_STACK_BASE tsk, out
  227. /* Get task->thread_info (this is essentially start of a PAGE) */
  228. ld \out, [\tsk, TASK_THREAD_INFO]
  229. /* Go to end of page where stack begins (grows upwards) */
  230. add2 \out, \out, (THREAD_SIZE - 4)/4 /* one word GUTTER */
  231. .endm
  232. /*--------------------------------------------------------------
  233. * Switch to Kernel Mode stack if SP points to User Mode stack
  234. *
  235. * Entry : r9 contains pre-IRQ/exception/trap status32
  236. * Exit : SP is set to kernel mode stack pointer
  237. * If CURR_IN_REG, r25 set to "current" task pointer
  238. * Clobbers: r9
  239. *-------------------------------------------------------------*/
  240. .macro SWITCH_TO_KERNEL_STK
  241. /* User Mode when this happened ? Yes: Proceed to switch stack */
  242. bbit1 r9, STATUS_U_BIT, 88f
  243. /* OK we were already in kernel mode when this event happened, thus can
  244. * assume SP is kernel mode SP. _NO_ need to do any stack switching
  245. */
  246. #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
  247. /* However....
  248. * If Level 2 Interrupts enabled, we may end up with a corner case:
  249. * 1. User Task executing
  250. * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
  251. * 3. But before it could switch SP from USER to KERNEL stack
  252. * a L2 IRQ "Interrupts" L1
  253. * Thay way although L2 IRQ happened in Kernel mode, stack is still
  254. * not switched.
  255. * To handle this, we may need to switch stack even if in kernel mode
  256. * provided SP has values in range of USER mode stack ( < 0x7000_0000 )
  257. */
  258. brlo sp, VMALLOC_START, 88f
  259. /* TODO: vineetg:
  260. * We need to be a bit more cautious here. What if a kernel bug in
  261. * L1 ISR, caused SP to go whaco (some small value which looks like
  262. * USER stk) and then we take L2 ISR.
  263. * Above brlo alone would treat it as a valid L1-L2 sceanrio
  264. * instead of shouting alound
  265. * The only feasible way is to make sure this L2 happened in
  266. * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
  267. * L1 ISR before it switches stack
  268. */
  269. #endif
  270. /* Save Pre Intr/Exception KERNEL MODE SP on kernel stack
  271. * safe-keeping not really needed, but it keeps the epilogue code
  272. * (SP restore) simpler/uniform.
  273. */
  274. b.d 77f
  275. st.a sp, [sp, -12] ; Make room for orig_r0 and orig_r8
  276. 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
  277. GET_CURR_TASK_ON_CPU r9
  278. #ifdef CONFIG_ARC_CURR_IN_REG
  279. /* If current task pointer cached in r25, time to
  280. * -safekeep USER r25 in task->thread_struct->user_r25
  281. * -load r25 with current task ptr
  282. */
  283. st.as r25, [r9, (TASK_THREAD + THREAD_USER_R25)/4]
  284. mov r25, r9
  285. #endif
  286. /* With current tsk in r9, get it's kernel mode stack base */
  287. GET_TSK_STACK_BASE r9, r9
  288. #ifdef PT_REGS_CANARY
  289. st 0xabcdabcd, [r9, 0]
  290. #endif
  291. /* Save Pre Intr/Exception User SP on kernel stack */
  292. st.a sp, [r9, -12] ; Make room for orig_r0 and orig_r8
  293. /* CAUTION:
  294. * SP should be set at the very end when we are done with everything
  295. * In case of 2 levels of interrupt we depend on value of SP to assume
  296. * that everything else is done (loading r25 etc)
  297. */
  298. /* set SP to point to kernel mode stack */
  299. mov sp, r9
  300. 77: /* ----- Stack Switched to kernel Mode, Now save REG FILE ----- */
  301. .endm
  302. /*------------------------------------------------------------
  303. * "FAKE" a rtie to return from CPU Exception context
  304. * This is to re-enable Exceptions within exception
  305. * Look at EV_ProtV to see how this is actually used
  306. *-------------------------------------------------------------*/
  307. .macro FAKE_RET_FROM_EXCPN reg
  308. ld \reg, [sp, PT_status32]
  309. bic \reg, \reg, (STATUS_U_MASK|STATUS_DE_MASK)
  310. bset \reg, \reg, STATUS_L_BIT
  311. sr \reg, [erstatus]
  312. mov \reg, 55f
  313. sr \reg, [eret]
  314. rtie
  315. 55:
  316. .endm
  317. /*
  318. * @reg [OUT] &thread_info of "current"
  319. */
  320. .macro GET_CURR_THR_INFO_FROM_SP reg
  321. and \reg, sp, ~(THREAD_SIZE - 1)
  322. .endm
  323. /*
  324. * @reg [OUT] thread_info->flags of "current"
  325. */
  326. .macro GET_CURR_THR_INFO_FLAGS reg
  327. GET_CURR_THR_INFO_FROM_SP \reg
  328. ld \reg, [\reg, THREAD_INFO_FLAGS]
  329. .endm
  330. /*--------------------------------------------------------------
  331. * For early Exception Prologue, a core reg is temporarily needed to
  332. * code the rest of prolog (stack switching). This is done by stashing
  333. * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).
  334. *
  335. * Before saving the full regfile - this reg is restored back, only
  336. * to be saved again on kernel mode stack, as part of ptregs.
  337. *-------------------------------------------------------------*/
  338. .macro EXCPN_PROLOG_FREEUP_REG reg
  339. #ifdef CONFIG_SMP
  340. sr \reg, [ARC_REG_SCRATCH_DATA0]
  341. #else
  342. st \reg, [@ex_saved_reg1]
  343. #endif
  344. .endm
  345. .macro EXCPN_PROLOG_RESTORE_REG reg
  346. #ifdef CONFIG_SMP
  347. lr \reg, [ARC_REG_SCRATCH_DATA0]
  348. #else
  349. ld \reg, [@ex_saved_reg1]
  350. #endif
  351. .endm
  352. /*--------------------------------------------------------------
  353. * Save all registers used by Exceptions (TLB Miss, Prot-V, Mem err etc)
  354. * Requires SP to be already switched to kernel mode Stack
  355. * sp points to the next free element on the stack at exit of this macro.
  356. * Registers are pushed / popped in the order defined in struct ptregs
  357. * in asm/ptrace.h
  358. * Note that syscalls are implemented via TRAP which is also a exception
  359. * from CPU's point of view
  360. *-------------------------------------------------------------*/
  361. .macro SAVE_ALL_EXCEPTION marker
  362. st \marker, [sp, 8] /* orig_r8 */
  363. st r0, [sp, 4] /* orig_r0, needed only for sys calls */
  364. /* Restore r9 used to code the early prologue */
  365. EXCPN_PROLOG_RESTORE_REG r9
  366. SAVE_CALLER_SAVED
  367. st.a r26, [sp, -4] /* gp */
  368. st.a fp, [sp, -4]
  369. st.a blink, [sp, -4]
  370. lr r9, [eret]
  371. st.a r9, [sp, -4]
  372. lr r9, [erstatus]
  373. st.a r9, [sp, -4]
  374. st.a lp_count, [sp, -4]
  375. lr r9, [lp_end]
  376. st.a r9, [sp, -4]
  377. lr r9, [lp_start]
  378. st.a r9, [sp, -4]
  379. lr r9, [erbta]
  380. st.a r9, [sp, -4]
  381. #ifdef PT_REGS_CANARY
  382. mov r9, 0xdeadbeef
  383. st r9, [sp, -4]
  384. #endif
  385. /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
  386. sub sp, sp, 4
  387. .endm
  388. /*--------------------------------------------------------------
  389. * Save scratch regs for exceptions
  390. *-------------------------------------------------------------*/
  391. .macro SAVE_ALL_SYS
  392. SAVE_ALL_EXCEPTION orig_r8_IS_EXCPN
  393. .endm
  394. /*--------------------------------------------------------------
  395. * Save scratch regs for sys calls
  396. *-------------------------------------------------------------*/
  397. .macro SAVE_ALL_TRAP
  398. /*
  399. * Setup pt_regs->orig_r8.
  400. * Encode syscall number (r8) in upper short word of event type (r9)
  401. * N.B. #1: This is already endian safe (see ptrace.h)
  402. * #2: Only r9 can be used as scratch as it is already clobbered
  403. * and it's contents are no longer needed by the latter part
  404. * of exception prologue
  405. */
  406. lsl r9, r8, 16
  407. or r9, r9, orig_r8_IS_SCALL
  408. SAVE_ALL_EXCEPTION r9
  409. .endm
  410. /*--------------------------------------------------------------
  411. * Restore all registers used by system call or Exceptions
  412. * SP should always be pointing to the next free stack element
  413. * when entering this macro.
  414. *
  415. * NOTE:
  416. *
  417. * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
  418. * for memory load operations. If used in that way interrupts are deffered
  419. * by hardware and that is not good.
  420. *-------------------------------------------------------------*/
  421. .macro RESTORE_ALL_SYS
  422. add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */
  423. ld.ab r9, [sp, 4]
  424. sr r9, [erbta]
  425. ld.ab r9, [sp, 4]
  426. sr r9, [lp_start]
  427. ld.ab r9, [sp, 4]
  428. sr r9, [lp_end]
  429. ld.ab r9, [sp, 4]
  430. mov lp_count, r9
  431. ld.ab r9, [sp, 4]
  432. sr r9, [erstatus]
  433. ld.ab r9, [sp, 4]
  434. sr r9, [eret]
  435. ld.ab blink, [sp, 4]
  436. ld.ab fp, [sp, 4]
  437. ld.ab r26, [sp, 4] /* gp */
  438. RESTORE_CALLER_SAVED
  439. ld sp, [sp] /* restore original sp */
  440. /* orig_r0 and orig_r8 skipped automatically */
  441. .endm
  442. /*--------------------------------------------------------------
  443. * Save all registers used by interrupt handlers.
  444. *-------------------------------------------------------------*/
  445. .macro SAVE_ALL_INT1
  446. /* restore original r9 , saved in int1_saved_reg
  447. * It will be saved on stack in macro: SAVE_CALLER_SAVED
  448. */
  449. #ifdef CONFIG_SMP
  450. lr r9, [ARC_REG_SCRATCH_DATA0]
  451. #else
  452. ld r9, [@int1_saved_reg]
  453. #endif
  454. /* now we are ready to save the remaining context :) */
  455. st orig_r8_IS_IRQ1, [sp, 8] /* Event Type */
  456. st 0, [sp, 4] /* orig_r0 , N/A for IRQ */
  457. SAVE_CALLER_SAVED
  458. st.a r26, [sp, -4] /* gp */
  459. st.a fp, [sp, -4]
  460. st.a blink, [sp, -4]
  461. st.a ilink1, [sp, -4]
  462. lr r9, [status32_l1]
  463. st.a r9, [sp, -4]
  464. st.a lp_count, [sp, -4]
  465. lr r9, [lp_end]
  466. st.a r9, [sp, -4]
  467. lr r9, [lp_start]
  468. st.a r9, [sp, -4]
  469. lr r9, [bta_l1]
  470. st.a r9, [sp, -4]
  471. #ifdef PT_REGS_CANARY
  472. mov r9, 0xdeadbee1
  473. st r9, [sp, -4]
  474. #endif
  475. /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
  476. sub sp, sp, 4
  477. .endm
  478. .macro SAVE_ALL_INT2
  479. /* TODO-vineetg: SMP we can't use global nor can we use
  480. * SCRATCH0 as we do for int1 because while int1 is using
  481. * it, int2 can come
  482. */
  483. /* retsore original r9 , saved in sys_saved_r9 */
  484. ld r9, [@int2_saved_reg]
  485. /* now we are ready to save the remaining context :) */
  486. st orig_r8_IS_IRQ2, [sp, 8] /* Event Type */
  487. st 0, [sp, 4] /* orig_r0 , N/A for IRQ */
  488. SAVE_CALLER_SAVED
  489. st.a r26, [sp, -4] /* gp */
  490. st.a fp, [sp, -4]
  491. st.a blink, [sp, -4]
  492. st.a ilink2, [sp, -4]
  493. lr r9, [status32_l2]
  494. st.a r9, [sp, -4]
  495. st.a lp_count, [sp, -4]
  496. lr r9, [lp_end]
  497. st.a r9, [sp, -4]
  498. lr r9, [lp_start]
  499. st.a r9, [sp, -4]
  500. lr r9, [bta_l2]
  501. st.a r9, [sp, -4]
  502. #ifdef PT_REGS_CANARY
  503. mov r9, 0xdeadbee2
  504. st r9, [sp, -4]
  505. #endif
  506. /* move up by 1 word to "create" pt_regs->"stack_place_holder" */
  507. sub sp, sp, 4
  508. .endm
  509. /*--------------------------------------------------------------
  510. * Restore all registers used by interrupt handlers.
  511. *
  512. * NOTE:
  513. *
  514. * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
  515. * for memory load operations. If used in that way interrupts are deffered
  516. * by hardware and that is not good.
  517. *-------------------------------------------------------------*/
  518. .macro RESTORE_ALL_INT1
  519. add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */
  520. ld.ab r9, [sp, 4] /* Actual reg file */
  521. sr r9, [bta_l1]
  522. ld.ab r9, [sp, 4]
  523. sr r9, [lp_start]
  524. ld.ab r9, [sp, 4]
  525. sr r9, [lp_end]
  526. ld.ab r9, [sp, 4]
  527. mov lp_count, r9
  528. ld.ab r9, [sp, 4]
  529. sr r9, [status32_l1]
  530. ld.ab r9, [sp, 4]
  531. mov ilink1, r9
  532. ld.ab blink, [sp, 4]
  533. ld.ab fp, [sp, 4]
  534. ld.ab r26, [sp, 4] /* gp */
  535. RESTORE_CALLER_SAVED
  536. ld sp, [sp] /* restore original sp */
  537. /* orig_r0 and orig_r8 skipped automatically */
  538. .endm
  539. .macro RESTORE_ALL_INT2
  540. add sp, sp, 4 /* hop over unused "pt_regs->stack_place_holder" */
  541. ld.ab r9, [sp, 4]
  542. sr r9, [bta_l2]
  543. ld.ab r9, [sp, 4]
  544. sr r9, [lp_start]
  545. ld.ab r9, [sp, 4]
  546. sr r9, [lp_end]
  547. ld.ab r9, [sp, 4]
  548. mov lp_count, r9
  549. ld.ab r9, [sp, 4]
  550. sr r9, [status32_l2]
  551. ld.ab r9, [sp, 4]
  552. mov ilink2, r9
  553. ld.ab blink, [sp, 4]
  554. ld.ab fp, [sp, 4]
  555. ld.ab r26, [sp, 4] /* gp */
  556. RESTORE_CALLER_SAVED
  557. ld sp, [sp] /* restore original sp */
  558. /* orig_r0 and orig_r8 skipped automatically */
  559. .endm
  560. /* Get CPU-ID of this core */
  561. .macro GET_CPU_ID reg
  562. lr \reg, [identity]
  563. lsr \reg, \reg, 8
  564. bmsk \reg, \reg, 7
  565. .endm
  566. #ifdef CONFIG_SMP
  567. /*-------------------------------------------------
  568. * Retrieve the current running task on this CPU
  569. * 1. Determine curr CPU id.
  570. * 2. Use it to index into _current_task[ ]
  571. */
  572. .macro GET_CURR_TASK_ON_CPU reg
  573. GET_CPU_ID \reg
  574. ld.as \reg, [@_current_task, \reg]
  575. .endm
  576. /*-------------------------------------------------
  577. * Save a new task as the "current" task on this CPU
  578. * 1. Determine curr CPU id.
  579. * 2. Use it to index into _current_task[ ]
  580. *
  581. * Coded differently than GET_CURR_TASK_ON_CPU (which uses LD.AS)
  582. * because ST r0, [r1, offset] can ONLY have s9 @offset
  583. * while LD can take s9 (4 byte insn) or LIMM (8 byte insn)
  584. */
  585. .macro SET_CURR_TASK_ON_CPU tsk, tmp
  586. GET_CPU_ID \tmp
  587. add2 \tmp, @_current_task, \tmp
  588. st \tsk, [\tmp]
  589. #ifdef CONFIG_ARC_CURR_IN_REG
  590. mov r25, \tsk
  591. #endif
  592. .endm
  593. #else /* Uniprocessor implementation of macros */
  594. .macro GET_CURR_TASK_ON_CPU reg
  595. ld \reg, [@_current_task]
  596. .endm
  597. .macro SET_CURR_TASK_ON_CPU tsk, tmp
  598. st \tsk, [@_current_task]
  599. #ifdef CONFIG_ARC_CURR_IN_REG
  600. mov r25, \tsk
  601. #endif
  602. .endm
  603. #endif /* SMP / UNI */
  604. /* ------------------------------------------------------------------
  605. * Get the ptr to some field of Current Task at @off in task struct
  606. * -Uses r25 for Current task ptr if that is enabled
  607. */
  608. #ifdef CONFIG_ARC_CURR_IN_REG
  609. .macro GET_CURR_TASK_FIELD_PTR off, reg
  610. add \reg, r25, \off
  611. .endm
  612. #else
  613. .macro GET_CURR_TASK_FIELD_PTR off, reg
  614. GET_CURR_TASK_ON_CPU \reg
  615. add \reg, \reg, \off
  616. .endm
  617. #endif /* CONFIG_ARC_CURR_IN_REG */
  618. #endif /* __ASSEMBLY__ */
  619. #endif /* __ASM_ARC_ENTRY_H */