processor.h 6.4 KB

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  1. /*
  2. * include/asm-sh/processor.h
  3. *
  4. * Copyright (C) 1999, 2000 Niibe Yutaka
  5. * Copyright (C) 2002, 2003 Paul Mundt
  6. */
  7. #ifndef __ASM_SH_PROCESSOR_H
  8. #define __ASM_SH_PROCESSOR_H
  9. #ifdef __KERNEL__
  10. #include <linux/compiler.h>
  11. #include <asm/page.h>
  12. #include <asm/types.h>
  13. #include <asm/cache.h>
  14. #include <asm/ptrace.h>
  15. #include <asm/cpu-features.h>
  16. /*
  17. * Default implementation of macro that returns current
  18. * instruction pointer ("program counter").
  19. */
  20. #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
  21. /* Core Processor Version Register */
  22. #define CCN_PVR 0xff000030
  23. #define CCN_CVR 0xff000040
  24. #define CCN_PRR 0xff000044
  25. /*
  26. * CPU type and hardware bug flags. Kept separately for each CPU.
  27. *
  28. * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  29. * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  30. * for parsing the subtype in get_cpu_subtype().
  31. */
  32. enum cpu_type {
  33. /* SH-2 types */
  34. CPU_SH7604,
  35. /* SH-3 types */
  36. CPU_SH7705, CPU_SH7706, CPU_SH7707,
  37. CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  38. CPU_SH7709, CPU_SH7709A, CPU_SH7710,
  39. CPU_SH7729, CPU_SH7300,
  40. /* SH-4 types */
  41. CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  42. CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
  43. CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781,
  44. /* Unknown subtype */
  45. CPU_SH_NONE
  46. };
  47. struct sh_cpuinfo {
  48. unsigned int type;
  49. unsigned long loops_per_jiffy;
  50. struct cache_info icache; /* Primary I-cache */
  51. struct cache_info dcache; /* Primary D-cache */
  52. struct cache_info scache; /* Secondary cache */
  53. unsigned long flags;
  54. } __attribute__ ((aligned(SMP_CACHE_BYTES)));
  55. extern struct sh_cpuinfo boot_cpu_data;
  56. #ifdef CONFIG_SMP
  57. extern struct sh_cpuinfo cpu_data[];
  58. #define current_cpu_data cpu_data[smp_processor_id()]
  59. #else
  60. #define cpu_data (&boot_cpu_data)
  61. #define current_cpu_data boot_cpu_data
  62. #endif
  63. /*
  64. * User space process size: 2GB.
  65. *
  66. * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  67. */
  68. #define TASK_SIZE 0x7c000000UL
  69. /* This decides where the kernel will search for a free chunk of vm
  70. * space during mmap's.
  71. */
  72. #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
  73. /*
  74. * Bit of SR register
  75. *
  76. * FD-bit:
  77. * When it's set, it means the processor doesn't have right to use FPU,
  78. * and it results exception when the floating operation is executed.
  79. *
  80. * IMASK-bit:
  81. * Interrupt level mask
  82. */
  83. #define SR_FD 0x00008000
  84. #define SR_DSP 0x00001000
  85. #define SR_IMASK 0x000000f0
  86. /*
  87. * FPU structure and data
  88. */
  89. struct sh_fpu_hard_struct {
  90. unsigned long fp_regs[16];
  91. unsigned long xfp_regs[16];
  92. unsigned long fpscr;
  93. unsigned long fpul;
  94. long status; /* software status information */
  95. };
  96. /* Dummy fpu emulator */
  97. struct sh_fpu_soft_struct {
  98. unsigned long fp_regs[16];
  99. unsigned long xfp_regs[16];
  100. unsigned long fpscr;
  101. unsigned long fpul;
  102. unsigned char lookahead;
  103. unsigned long entry_pc;
  104. };
  105. union sh_fpu_union {
  106. struct sh_fpu_hard_struct hard;
  107. struct sh_fpu_soft_struct soft;
  108. };
  109. struct thread_struct {
  110. unsigned long sp;
  111. unsigned long pc;
  112. unsigned long trap_no, error_code;
  113. unsigned long address;
  114. /* Hardware debugging registers may come here */
  115. unsigned long ubc_pc;
  116. /* floating point info */
  117. union sh_fpu_union fpu;
  118. };
  119. typedef struct {
  120. unsigned long seg;
  121. } mm_segment_t;
  122. /* Count of active tasks with UBC settings */
  123. extern int ubc_usercnt;
  124. #define INIT_THREAD { \
  125. sizeof(init_stack) + (long) &init_stack, /* sp */ \
  126. 0, /* pc */ \
  127. 0, 0, \
  128. 0, \
  129. 0, \
  130. {{{0,}},} /* fpu state */ \
  131. }
  132. /*
  133. * Do necessary setup to start up a newly executed thread.
  134. */
  135. #define start_thread(regs, new_pc, new_sp) \
  136. set_fs(USER_DS); \
  137. regs->pr = 0; \
  138. regs->sr = SR_FD; /* User mode. */ \
  139. regs->pc = new_pc; \
  140. regs->regs[15] = new_sp
  141. /* Forward declaration, a strange C thing */
  142. struct task_struct;
  143. struct mm_struct;
  144. /* Free all resources held by a thread. */
  145. extern void release_thread(struct task_struct *);
  146. /* Prepare to copy thread state - unlazy all lazy status */
  147. #define prepare_to_copy(tsk) do { } while (0)
  148. /*
  149. * create a kernel thread without removing it from tasklists
  150. */
  151. extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
  152. /* Copy and release all segment info associated with a VM */
  153. #define copy_segments(p, mm) do { } while(0)
  154. #define release_segments(mm) do { } while(0)
  155. /*
  156. * FPU lazy state save handling.
  157. */
  158. static __inline__ void disable_fpu(void)
  159. {
  160. unsigned long __dummy;
  161. /* Set FD flag in SR */
  162. __asm__ __volatile__("stc sr, %0\n\t"
  163. "or %1, %0\n\t"
  164. "ldc %0, sr"
  165. : "=&r" (__dummy)
  166. : "r" (SR_FD));
  167. }
  168. static __inline__ void enable_fpu(void)
  169. {
  170. unsigned long __dummy;
  171. /* Clear out FD flag in SR */
  172. __asm__ __volatile__("stc sr, %0\n\t"
  173. "and %1, %0\n\t"
  174. "ldc %0, sr"
  175. : "=&r" (__dummy)
  176. : "r" (~SR_FD));
  177. }
  178. static __inline__ void release_fpu(struct pt_regs *regs)
  179. {
  180. regs->sr |= SR_FD;
  181. }
  182. static __inline__ void grab_fpu(struct pt_regs *regs)
  183. {
  184. regs->sr &= ~SR_FD;
  185. }
  186. #ifdef CONFIG_CPU_SH4
  187. extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
  188. #else
  189. #define save_fpu(tsk) do { } while (0)
  190. #endif
  191. #define unlazy_fpu(tsk, regs) do { \
  192. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  193. save_fpu(tsk, regs); \
  194. } \
  195. } while (0)
  196. #define clear_fpu(tsk, regs) do { \
  197. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  198. clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
  199. release_fpu(regs); \
  200. } \
  201. } while (0)
  202. /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
  203. #define FPSCR_INIT 0x00080000
  204. #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
  205. #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
  206. /*
  207. * Return saved PC of a blocked thread.
  208. */
  209. #define thread_saved_pc(tsk) (tsk->thread.pc)
  210. extern unsigned long get_wchan(struct task_struct *p);
  211. #define KSTK_EIP(tsk) ((tsk)->thread.pc)
  212. #define KSTK_ESP(tsk) ((tsk)->thread.sp)
  213. #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
  214. #define cpu_relax() barrier()
  215. #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
  216. defined(CONFIG_CPU_SH4)
  217. #define PREFETCH_STRIDE L1_CACHE_BYTES
  218. #define ARCH_HAS_PREFETCH
  219. #define ARCH_HAS_PREFETCHW
  220. static inline void prefetch(void *x)
  221. {
  222. __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
  223. }
  224. #define prefetchw(x) prefetch(x)
  225. #endif
  226. #ifdef CONFIG_VSYSCALL
  227. extern int vsyscall_init(void);
  228. #else
  229. #define vsyscall_init() do { } while (0)
  230. #endif
  231. #endif /* __KERNEL__ */
  232. #endif /* __ASM_SH_PROCESSOR_H */