rtlx.h 1.4 KB

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  1. /*
  2. * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
  3. *
  4. */
  5. #ifndef __ASM_RTLX_H
  6. #define __ASM_RTLX_H_
  7. #define LX_NODE_BASE 10
  8. #define MIPSCPU_INT_BASE 16
  9. #define MIPS_CPU_RTLX_IRQ 0
  10. #define RTLX_VERSION 2
  11. #define RTLX_xID 0x12345600
  12. #define RTLX_ID (RTLX_xID | RTLX_VERSION)
  13. #define RTLX_CHANNELS 8
  14. #define RTLX_CHANNEL_STDIO 0
  15. #define RTLX_CHANNEL_DBG 1
  16. #define RTLX_CHANNEL_SYSIO 2
  17. extern int rtlx_open(int index, int can_sleep);
  18. extern int rtlx_release(int index);
  19. extern ssize_t rtlx_read(int index, void *buff, size_t count, int user);
  20. extern ssize_t rtlx_write(int index, void *buffer, size_t count, int user);
  21. extern unsigned int rtlx_read_poll(int index, int can_sleep);
  22. extern unsigned int rtlx_write_poll(int index);
  23. enum rtlx_state {
  24. RTLX_STATE_UNUSED,
  25. RTLX_STATE_INITIALISED,
  26. RTLX_STATE_REMOTE_READY,
  27. RTLX_STATE_OPENED
  28. };
  29. #define RTLX_BUFFER_SIZE 1024
  30. /* each channel supports read and write.
  31. linux (vpe0) reads lx_buffer and writes rt_buffer
  32. SP (vpe1) reads rt_buffer and writes lx_buffer
  33. */
  34. struct rtlx_channel {
  35. enum rtlx_state rt_state;
  36. enum rtlx_state lx_state;
  37. int buffer_size;
  38. /* read and write indexes per buffer */
  39. int rt_write, rt_read;
  40. char *rt_buffer;
  41. int lx_write, lx_read;
  42. char *lx_buffer;
  43. };
  44. struct rtlx_info {
  45. unsigned long id;
  46. enum rtlx_state state;
  47. struct rtlx_channel channel[RTLX_CHANNELS];
  48. };
  49. #endif /* __ASM_RTLX_H_ */