addrspace.h 4.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1996, 99 Ralf Baechle
  7. * Copyright (C) 2000, 2002 Maciej W. Rozycki
  8. * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
  9. */
  10. #ifndef _ASM_ADDRSPACE_H
  11. #define _ASM_ADDRSPACE_H
  12. #include <spaces.h>
  13. /*
  14. * Configure language
  15. */
  16. #ifdef __ASSEMBLY__
  17. #define _ATYPE_
  18. #define _ATYPE32_
  19. #define _ATYPE64_
  20. #define _LLCONST_(x) x
  21. #else
  22. #define _ATYPE_ __PTRDIFF_TYPE__
  23. #define _ATYPE32_ int
  24. #define _ATYPE64_ long long
  25. #define _LLCONST_(x) x ## LL
  26. #endif
  27. /*
  28. * 32-bit MIPS address spaces
  29. */
  30. #ifdef __ASSEMBLY__
  31. #define _ACAST32_
  32. #define _ACAST64_
  33. #else
  34. #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
  35. #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
  36. #endif
  37. /*
  38. * Returns the kernel segment base of a given address
  39. */
  40. #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
  41. /*
  42. * Returns the physical address of a CKSEGx / XKPHYS address
  43. */
  44. #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
  45. #define XPHYSADDR(a) ((_ACAST64_(a)) & \
  46. _LLCONST_(0x000000ffffffffff))
  47. #ifdef CONFIG_64BIT
  48. /*
  49. * Memory segments (64bit kernel mode addresses)
  50. * The compatibility segments use the full 64-bit sign extended value. Note
  51. * the R8000 doesn't have them so don't reference these in generic MIPS code.
  52. */
  53. #define XKUSEG _LLCONST_(0x0000000000000000)
  54. #define XKSSEG _LLCONST_(0x4000000000000000)
  55. #define XKPHYS _LLCONST_(0x8000000000000000)
  56. #define XKSEG _LLCONST_(0xc000000000000000)
  57. #define CKSEG0 _LLCONST_(0xffffffff80000000)
  58. #define CKSEG1 _LLCONST_(0xffffffffa0000000)
  59. #define CKSSEG _LLCONST_(0xffffffffc0000000)
  60. #define CKSEG3 _LLCONST_(0xffffffffe0000000)
  61. #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
  62. #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
  63. #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
  64. #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
  65. #else
  66. #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
  67. #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
  68. #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
  69. #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
  70. /*
  71. * Map an address to a certain kernel segment
  72. */
  73. #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
  74. #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
  75. #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
  76. #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
  77. /*
  78. * Memory segments (32bit kernel mode addresses)
  79. * These are the traditional names used in the 32-bit universe.
  80. */
  81. #define KUSEG 0x00000000
  82. #define KSEG0 0x80000000
  83. #define KSEG1 0xa0000000
  84. #define KSEG2 0xc0000000
  85. #define KSEG3 0xe0000000
  86. #define CKUSEG 0x00000000
  87. #define CKSEG0 0x80000000
  88. #define CKSEG1 0xa0000000
  89. #define CKSEG2 0xc0000000
  90. #define CKSEG3 0xe0000000
  91. #endif
  92. /*
  93. * Cache modes for XKPHYS address conversion macros
  94. */
  95. #define K_CALG_COH_EXCL1_NOL2 0
  96. #define K_CALG_COH_SHRL1_NOL2 1
  97. #define K_CALG_UNCACHED 2
  98. #define K_CALG_NONCOHERENT 3
  99. #define K_CALG_COH_EXCL 4
  100. #define K_CALG_COH_SHAREABLE 5
  101. #define K_CALG_NOTUSED 6
  102. #define K_CALG_UNCACHED_ACCEL 7
  103. /*
  104. * 64-bit address conversions
  105. */
  106. #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
  107. #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
  108. #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
  109. #define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \
  110. ((cm)<<59) | (a))
  111. #if defined (CONFIG_CPU_R4300) \
  112. || defined (CONFIG_CPU_R4X00) \
  113. || defined (CONFIG_CPU_R5000) \
  114. || defined (CONFIG_CPU_RM7000) \
  115. || defined (CONFIG_CPU_NEVADA) \
  116. || defined (CONFIG_CPU_TX49XX) \
  117. || defined (CONFIG_CPU_MIPS64)
  118. #define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */
  119. #endif
  120. #if defined (CONFIG_CPU_R8000)
  121. /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
  122. #define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
  123. #endif
  124. #if defined (CONFIG_CPU_R10000)
  125. #define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
  126. #endif
  127. #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
  128. #define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */
  129. #endif
  130. #ifndef CONFIG_CPU_R8000
  131. /*
  132. * The R8000 doesn't have the 32-bit compat spaces so we don't define them
  133. * in order to catch bugs in the source code.
  134. */
  135. #define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000)
  136. #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
  137. #endif
  138. #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
  139. #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE)
  140. #endif /* _ASM_ADDRSPACE_H */