assembler.h 2.1 KB

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  1. /*
  2. * linux/include/asm-arm/assembler.h
  3. *
  4. * Copyright (C) 1996-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This file contains arm architecture specific defines
  11. * for the different processors.
  12. *
  13. * Do not include any C declarations in this file - it is included by
  14. * assembler source.
  15. */
  16. #ifndef __ASSEMBLY__
  17. #error "Only include this from assembly code"
  18. #endif
  19. #include <asm/ptrace.h>
  20. /*
  21. * Endian independent macros for shifting bytes within registers.
  22. */
  23. #ifndef __ARMEB__
  24. #define pull lsr
  25. #define push lsl
  26. #define get_byte_0 lsl #0
  27. #define get_byte_1 lsr #8
  28. #define get_byte_2 lsr #16
  29. #define get_byte_3 lsr #24
  30. #define put_byte_0 lsl #0
  31. #define put_byte_1 lsl #8
  32. #define put_byte_2 lsl #16
  33. #define put_byte_3 lsl #24
  34. #else
  35. #define pull lsl
  36. #define push lsr
  37. #define get_byte_0 lsr #24
  38. #define get_byte_1 lsr #16
  39. #define get_byte_2 lsr #8
  40. #define get_byte_3 lsl #0
  41. #define put_byte_0 lsl #24
  42. #define put_byte_1 lsl #16
  43. #define put_byte_2 lsl #8
  44. #define put_byte_3 lsl #0
  45. #endif
  46. /*
  47. * Data preload for architectures that support it
  48. */
  49. #if __LINUX_ARM_ARCH__ >= 5
  50. #define PLD(code...) code
  51. #else
  52. #define PLD(code...)
  53. #endif
  54. /*
  55. * Enable and disable interrupts
  56. */
  57. #if __LINUX_ARM_ARCH__ >= 6
  58. .macro disable_irq
  59. cpsid i
  60. .endm
  61. .macro enable_irq
  62. cpsie i
  63. .endm
  64. #else
  65. .macro disable_irq
  66. msr cpsr_c, #PSR_I_BIT | SVC_MODE
  67. .endm
  68. .macro enable_irq
  69. msr cpsr_c, #SVC_MODE
  70. .endm
  71. #endif
  72. /*
  73. * Save the current IRQ state and disable IRQs. Note that this macro
  74. * assumes FIQs are enabled, and that the processor is in SVC mode.
  75. */
  76. .macro save_and_disable_irqs, oldcpsr
  77. mrs \oldcpsr, cpsr
  78. disable_irq
  79. .endm
  80. /*
  81. * Restore interrupt state previously stored in a register. We don't
  82. * guarantee that this will preserve the flags.
  83. */
  84. .macro restore_irqs, oldcpsr
  85. msr cpsr_c, \oldcpsr
  86. .endm
  87. #define USER(x...) \
  88. 9999: x; \
  89. .section __ex_table,"a"; \
  90. .align 3; \
  91. .long 9999b,9001f; \
  92. .previous