system.h 1.9 KB

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  1. /* linux/include/asm-arm/arch-s3c2410/system.h
  2. *
  3. * (c) 2003 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 - System function defines and includes
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <asm/hardware.h>
  13. #include <asm/io.h>
  14. #include <asm/arch/map.h>
  15. #include <asm/arch/idle.h>
  16. #include <asm/arch/regs-watchdog.h>
  17. #include <asm/arch/regs-clock.h>
  18. void (*s3c24xx_idle)(void);
  19. void s3c24xx_default_idle(void)
  20. {
  21. void __iomem *reg = S3C2410_CLKCON;
  22. unsigned long tmp;
  23. int i;
  24. /* idle the system by using the idle mode which will wait for an
  25. * interrupt to happen before restarting the system.
  26. */
  27. /* Warning: going into idle state upsets jtag scanning */
  28. __raw_writel(__raw_readl(reg) | (1<<2), reg);
  29. /* the samsung port seems to do a loop and then unset idle.. */
  30. for (i = 0; i < 50; i++) {
  31. tmp += __raw_readl(reg); /* ensure loop not optimised out */
  32. }
  33. /* this bit is not cleared on re-start... */
  34. __raw_writel(__raw_readl(reg) & ~(1<<2), reg);
  35. }
  36. static void arch_idle(void)
  37. {
  38. if (s3c24xx_idle != NULL)
  39. (s3c24xx_idle)();
  40. else
  41. s3c24xx_default_idle();
  42. }
  43. static void
  44. arch_reset(char mode)
  45. {
  46. if (mode == 's') {
  47. cpu_reset(0);
  48. }
  49. printk("arch_reset: attempting watchdog reset\n");
  50. __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
  51. /* put initial values into count and data */
  52. __raw_writel(0x100, S3C2410_WTCNT);
  53. __raw_writel(0x100, S3C2410_WTDAT);
  54. /* set the watchdog to go and reset... */
  55. __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
  56. S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
  57. /* wait for reset to assert... */
  58. mdelay(5000);
  59. printk(KERN_ERR "Watchdog reset failed to assert reset\n");
  60. /* we'll take a jump through zero as a poor second */
  61. cpu_reset(0);
  62. }