uhci-hub.c 10 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
  13. */
  14. static __u8 root_hub_hub_des[] =
  15. {
  16. 0x09, /* __u8 bLength; */
  17. 0x29, /* __u8 bDescriptorType; Hub-descriptor */
  18. 0x02, /* __u8 bNbrPorts; */
  19. 0x0a, /* __u16 wHubCharacteristics; */
  20. 0x00, /* (per-port OC, no power switching) */
  21. 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
  22. 0x00, /* __u8 bHubContrCurrent; 0 mA */
  23. 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
  24. 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
  25. };
  26. #define UHCI_RH_MAXCHILD 7
  27. /* must write as zeroes */
  28. #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
  29. /* status change bits: nonzero writes will clear */
  30. #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
  31. /* A port that either is connected or has a changed-bit set will prevent
  32. * us from AUTO_STOPPING.
  33. */
  34. static int any_ports_active(struct uhci_hcd *uhci)
  35. {
  36. int port;
  37. for (port = 0; port < uhci->rh_numports; ++port) {
  38. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  39. (USBPORTSC_CCS | RWC_BITS)) ||
  40. test_bit(port, &uhci->port_c_suspend))
  41. return 1;
  42. }
  43. return 0;
  44. }
  45. static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
  46. {
  47. int port;
  48. *buf = 0;
  49. for (port = 0; port < uhci->rh_numports; ++port) {
  50. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
  51. test_bit(port, &uhci->port_c_suspend))
  52. *buf |= (1 << (port + 1));
  53. }
  54. return !!*buf;
  55. }
  56. #define OK(x) len = (x); break
  57. #define CLR_RH_PORTSTAT(x) \
  58. status = inw(port_addr); \
  59. status &= ~(RWC_BITS|WZ_BITS); \
  60. status &= ~(x); \
  61. status |= RWC_BITS & (x); \
  62. outw(status, port_addr)
  63. #define SET_RH_PORTSTAT(x) \
  64. status = inw(port_addr); \
  65. status |= (x); \
  66. status &= ~(RWC_BITS|WZ_BITS); \
  67. outw(status, port_addr)
  68. /* UHCI controllers don't automatically stop resume signalling after 20 msec,
  69. * so we have to poll and check timeouts in order to take care of it.
  70. */
  71. static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
  72. unsigned long port_addr)
  73. {
  74. int status;
  75. int i;
  76. if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) {
  77. CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
  78. if (test_bit(port, &uhci->resuming_ports))
  79. set_bit(port, &uhci->port_c_suspend);
  80. /* The controller won't actually turn off the RD bit until
  81. * it has had a chance to send a low-speed EOP sequence,
  82. * which is supposed to take 3 bit times (= 2 microseconds).
  83. * Experiments show that some controllers take longer, so
  84. * we'll poll for completion. */
  85. for (i = 0; i < 10; ++i) {
  86. if (!(inw(port_addr) & USBPORTSC_RD))
  87. break;
  88. udelay(1);
  89. }
  90. }
  91. clear_bit(port, &uhci->resuming_ports);
  92. }
  93. /* Wait for the UHCI controller in HP's iLO2 server management chip.
  94. * It can take up to 250 us to finish a reset and set the CSC bit.
  95. */
  96. static void wait_for_HP(unsigned long port_addr)
  97. {
  98. int i;
  99. for (i = 10; i < 250; i += 10) {
  100. if (inw(port_addr) & USBPORTSC_CSC)
  101. return;
  102. udelay(10);
  103. }
  104. /* Log a warning? */
  105. }
  106. static void uhci_check_ports(struct uhci_hcd *uhci)
  107. {
  108. unsigned int port;
  109. unsigned long port_addr;
  110. int status;
  111. for (port = 0; port < uhci->rh_numports; ++port) {
  112. port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  113. status = inw(port_addr);
  114. if (unlikely(status & USBPORTSC_PR)) {
  115. if (time_after_eq(jiffies, uhci->ports_timeout)) {
  116. CLR_RH_PORTSTAT(USBPORTSC_PR);
  117. udelay(10);
  118. /* HP's server management chip requires
  119. * a longer delay. */
  120. if (to_pci_dev(uhci_dev(uhci))->vendor ==
  121. PCI_VENDOR_ID_HP)
  122. wait_for_HP(port_addr);
  123. /* If the port was enabled before, turning
  124. * reset on caused a port enable change.
  125. * Turning reset off causes a port connect
  126. * status change. Clear these changes. */
  127. CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
  128. SET_RH_PORTSTAT(USBPORTSC_PE);
  129. }
  130. }
  131. if (unlikely(status & USBPORTSC_RD)) {
  132. if (!test_bit(port, &uhci->resuming_ports)) {
  133. /* Port received a wakeup request */
  134. set_bit(port, &uhci->resuming_ports);
  135. uhci->ports_timeout = jiffies +
  136. msecs_to_jiffies(20);
  137. /* Make sure we see the port again
  138. * after the resuming period is over. */
  139. mod_timer(&uhci_to_hcd(uhci)->rh_timer,
  140. uhci->ports_timeout);
  141. } else if (time_after_eq(jiffies,
  142. uhci->ports_timeout)) {
  143. uhci_finish_suspend(uhci, port, port_addr);
  144. }
  145. }
  146. }
  147. }
  148. static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
  149. {
  150. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  151. unsigned long flags;
  152. int status = 0;
  153. spin_lock_irqsave(&uhci->lock, flags);
  154. uhci_scan_schedule(uhci, NULL);
  155. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
  156. goto done;
  157. uhci_check_ports(uhci);
  158. status = get_hub_status_data(uhci, buf);
  159. switch (uhci->rh_state) {
  160. case UHCI_RH_SUSPENDING:
  161. case UHCI_RH_SUSPENDED:
  162. /* if port change, ask to be resumed */
  163. if (status)
  164. usb_hcd_resume_root_hub(hcd);
  165. break;
  166. case UHCI_RH_AUTO_STOPPED:
  167. /* if port change, auto start */
  168. if (status)
  169. wakeup_rh(uhci);
  170. break;
  171. case UHCI_RH_RUNNING:
  172. /* are any devices attached? */
  173. if (!any_ports_active(uhci)) {
  174. uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
  175. uhci->auto_stop_time = jiffies + HZ;
  176. }
  177. break;
  178. case UHCI_RH_RUNNING_NODEVS:
  179. /* auto-stop if nothing connected for 1 second */
  180. if (any_ports_active(uhci))
  181. uhci->rh_state = UHCI_RH_RUNNING;
  182. else if (time_after_eq(jiffies, uhci->auto_stop_time))
  183. suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
  184. break;
  185. default:
  186. break;
  187. }
  188. done:
  189. spin_unlock_irqrestore(&uhci->lock, flags);
  190. return status;
  191. }
  192. /* size of returned buffer is part of USB spec */
  193. static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
  194. u16 wIndex, char *buf, u16 wLength)
  195. {
  196. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  197. int status, lstatus, retval = 0, len = 0;
  198. unsigned int port = wIndex - 1;
  199. unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  200. u16 wPortChange, wPortStatus;
  201. unsigned long flags;
  202. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
  203. return -ETIMEDOUT;
  204. spin_lock_irqsave(&uhci->lock, flags);
  205. switch (typeReq) {
  206. case GetHubStatus:
  207. *(__le32 *)buf = cpu_to_le32(0);
  208. OK(4); /* hub power */
  209. case GetPortStatus:
  210. if (port >= uhci->rh_numports)
  211. goto err;
  212. uhci_check_ports(uhci);
  213. status = inw(port_addr);
  214. /* Intel controllers report the OverCurrent bit active on.
  215. * VIA controllers report it active off, so we'll adjust the
  216. * bit value. (It's not standardized in the UHCI spec.)
  217. */
  218. if (to_pci_dev(hcd->self.controller)->vendor ==
  219. PCI_VENDOR_ID_VIA)
  220. status ^= USBPORTSC_OC;
  221. /* UHCI doesn't support C_RESET (always false) */
  222. wPortChange = lstatus = 0;
  223. if (status & USBPORTSC_CSC)
  224. wPortChange |= USB_PORT_STAT_C_CONNECTION;
  225. if (status & USBPORTSC_PEC)
  226. wPortChange |= USB_PORT_STAT_C_ENABLE;
  227. if (status & USBPORTSC_OCC)
  228. wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
  229. if (test_bit(port, &uhci->port_c_suspend)) {
  230. wPortChange |= USB_PORT_STAT_C_SUSPEND;
  231. lstatus |= 1;
  232. }
  233. if (test_bit(port, &uhci->resuming_ports))
  234. lstatus |= 4;
  235. /* UHCI has no power switching (always on) */
  236. wPortStatus = USB_PORT_STAT_POWER;
  237. if (status & USBPORTSC_CCS)
  238. wPortStatus |= USB_PORT_STAT_CONNECTION;
  239. if (status & USBPORTSC_PE) {
  240. wPortStatus |= USB_PORT_STAT_ENABLE;
  241. if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
  242. wPortStatus |= USB_PORT_STAT_SUSPEND;
  243. }
  244. if (status & USBPORTSC_OC)
  245. wPortStatus |= USB_PORT_STAT_OVERCURRENT;
  246. if (status & USBPORTSC_PR)
  247. wPortStatus |= USB_PORT_STAT_RESET;
  248. if (status & USBPORTSC_LSDA)
  249. wPortStatus |= USB_PORT_STAT_LOW_SPEED;
  250. if (wPortChange)
  251. dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
  252. wIndex, status, lstatus);
  253. *(__le16 *)buf = cpu_to_le16(wPortStatus);
  254. *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
  255. OK(4);
  256. case SetHubFeature: /* We don't implement these */
  257. case ClearHubFeature:
  258. switch (wValue) {
  259. case C_HUB_OVER_CURRENT:
  260. case C_HUB_LOCAL_POWER:
  261. OK(0);
  262. default:
  263. goto err;
  264. }
  265. break;
  266. case SetPortFeature:
  267. if (port >= uhci->rh_numports)
  268. goto err;
  269. switch (wValue) {
  270. case USB_PORT_FEAT_SUSPEND:
  271. SET_RH_PORTSTAT(USBPORTSC_SUSP);
  272. OK(0);
  273. case USB_PORT_FEAT_RESET:
  274. SET_RH_PORTSTAT(USBPORTSC_PR);
  275. /* Reset terminates Resume signalling */
  276. uhci_finish_suspend(uhci, port, port_addr);
  277. /* USB v2.0 7.1.7.5 */
  278. uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
  279. OK(0);
  280. case USB_PORT_FEAT_POWER:
  281. /* UHCI has no power switching */
  282. OK(0);
  283. default:
  284. goto err;
  285. }
  286. break;
  287. case ClearPortFeature:
  288. if (port >= uhci->rh_numports)
  289. goto err;
  290. switch (wValue) {
  291. case USB_PORT_FEAT_ENABLE:
  292. CLR_RH_PORTSTAT(USBPORTSC_PE);
  293. /* Disable terminates Resume signalling */
  294. uhci_finish_suspend(uhci, port, port_addr);
  295. OK(0);
  296. case USB_PORT_FEAT_C_ENABLE:
  297. CLR_RH_PORTSTAT(USBPORTSC_PEC);
  298. OK(0);
  299. case USB_PORT_FEAT_SUSPEND:
  300. if (!(inw(port_addr) & USBPORTSC_SUSP)) {
  301. /* Make certain the port isn't suspended */
  302. uhci_finish_suspend(uhci, port, port_addr);
  303. } else if (!test_and_set_bit(port,
  304. &uhci->resuming_ports)) {
  305. SET_RH_PORTSTAT(USBPORTSC_RD);
  306. /* The controller won't allow RD to be set
  307. * if the port is disabled. When this happens
  308. * just skip the Resume signalling.
  309. */
  310. if (!(inw(port_addr) & USBPORTSC_RD))
  311. uhci_finish_suspend(uhci, port,
  312. port_addr);
  313. else
  314. /* USB v2.0 7.1.7.7 */
  315. uhci->ports_timeout = jiffies +
  316. msecs_to_jiffies(20);
  317. }
  318. OK(0);
  319. case USB_PORT_FEAT_C_SUSPEND:
  320. clear_bit(port, &uhci->port_c_suspend);
  321. OK(0);
  322. case USB_PORT_FEAT_POWER:
  323. /* UHCI has no power switching */
  324. goto err;
  325. case USB_PORT_FEAT_C_CONNECTION:
  326. CLR_RH_PORTSTAT(USBPORTSC_CSC);
  327. OK(0);
  328. case USB_PORT_FEAT_C_OVER_CURRENT:
  329. CLR_RH_PORTSTAT(USBPORTSC_OCC);
  330. OK(0);
  331. case USB_PORT_FEAT_C_RESET:
  332. /* this driver won't report these */
  333. OK(0);
  334. default:
  335. goto err;
  336. }
  337. break;
  338. case GetHubDescriptor:
  339. len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
  340. memcpy(buf, root_hub_hub_des, len);
  341. if (len > 2)
  342. buf[2] = uhci->rh_numports;
  343. OK(len);
  344. default:
  345. err:
  346. retval = -EPIPE;
  347. }
  348. spin_unlock_irqrestore(&uhci->lock, flags);
  349. return retval;
  350. }