e1000_main.c 137 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.2.7-k2"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  69. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  90. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10A4),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  94. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  95. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  100. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  101. struct e1000_tx_ring *txdr);
  102. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  103. struct e1000_rx_ring *rxdr);
  104. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  105. struct e1000_tx_ring *tx_ring);
  106. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  107. struct e1000_rx_ring *rx_ring);
  108. /* Local Function Prototypes */
  109. static int e1000_init_module(void);
  110. static void e1000_exit_module(void);
  111. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  112. static void __devexit e1000_remove(struct pci_dev *pdev);
  113. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  114. static int e1000_sw_init(struct e1000_adapter *adapter);
  115. static int e1000_open(struct net_device *netdev);
  116. static int e1000_close(struct net_device *netdev);
  117. static void e1000_configure_tx(struct e1000_adapter *adapter);
  118. static void e1000_configure_rx(struct e1000_adapter *adapter);
  119. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  120. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  121. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  122. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  123. struct e1000_tx_ring *tx_ring);
  124. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  125. struct e1000_rx_ring *rx_ring);
  126. static void e1000_set_multi(struct net_device *netdev);
  127. static void e1000_update_phy_info(unsigned long data);
  128. static void e1000_watchdog(unsigned long data);
  129. static void e1000_82547_tx_fifo_stall(unsigned long data);
  130. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  131. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  132. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  133. static int e1000_set_mac(struct net_device *netdev, void *p);
  134. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  135. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  136. struct e1000_tx_ring *tx_ring);
  137. #ifdef CONFIG_E1000_NAPI
  138. static int e1000_clean(struct net_device *poll_dev, int *budget);
  139. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  140. struct e1000_rx_ring *rx_ring,
  141. int *work_done, int work_to_do);
  142. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  143. struct e1000_rx_ring *rx_ring,
  144. int *work_done, int work_to_do);
  145. #else
  146. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring);
  150. #endif
  151. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  152. struct e1000_rx_ring *rx_ring,
  153. int cleaned_count);
  154. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring,
  156. int cleaned_count);
  157. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  158. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  159. int cmd);
  160. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  161. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  162. static void e1000_tx_timeout(struct net_device *dev);
  163. static void e1000_reset_task(struct net_device *dev);
  164. static void e1000_smartspeed(struct e1000_adapter *adapter);
  165. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  166. struct sk_buff *skb);
  167. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  168. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  169. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  170. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  171. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  172. #ifdef CONFIG_PM
  173. static int e1000_resume(struct pci_dev *pdev);
  174. #endif
  175. static void e1000_shutdown(struct pci_dev *pdev);
  176. #ifdef CONFIG_NET_POLL_CONTROLLER
  177. /* for netdump / net console */
  178. static void e1000_netpoll (struct net_device *netdev);
  179. #endif
  180. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  181. pci_channel_state_t state);
  182. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  183. static void e1000_io_resume(struct pci_dev *pdev);
  184. static struct pci_error_handlers e1000_err_handler = {
  185. .error_detected = e1000_io_error_detected,
  186. .slot_reset = e1000_io_slot_reset,
  187. .resume = e1000_io_resume,
  188. };
  189. static struct pci_driver e1000_driver = {
  190. .name = e1000_driver_name,
  191. .id_table = e1000_pci_tbl,
  192. .probe = e1000_probe,
  193. .remove = __devexit_p(e1000_remove),
  194. /* Power Managment Hooks */
  195. .suspend = e1000_suspend,
  196. #ifdef CONFIG_PM
  197. .resume = e1000_resume,
  198. #endif
  199. .shutdown = e1000_shutdown,
  200. .err_handler = &e1000_err_handler
  201. };
  202. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  203. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  204. MODULE_LICENSE("GPL");
  205. MODULE_VERSION(DRV_VERSION);
  206. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  207. module_param(debug, int, 0);
  208. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  209. /**
  210. * e1000_init_module - Driver Registration Routine
  211. *
  212. * e1000_init_module is the first routine called when the driver is
  213. * loaded. All it does is register with the PCI subsystem.
  214. **/
  215. static int __init
  216. e1000_init_module(void)
  217. {
  218. int ret;
  219. printk(KERN_INFO "%s - version %s\n",
  220. e1000_driver_string, e1000_driver_version);
  221. printk(KERN_INFO "%s\n", e1000_copyright);
  222. ret = pci_register_driver(&e1000_driver);
  223. return ret;
  224. }
  225. module_init(e1000_init_module);
  226. /**
  227. * e1000_exit_module - Driver Exit Cleanup Routine
  228. *
  229. * e1000_exit_module is called just before the driver is removed
  230. * from memory.
  231. **/
  232. static void __exit
  233. e1000_exit_module(void)
  234. {
  235. pci_unregister_driver(&e1000_driver);
  236. }
  237. module_exit(e1000_exit_module);
  238. static int e1000_request_irq(struct e1000_adapter *adapter)
  239. {
  240. struct net_device *netdev = adapter->netdev;
  241. int flags, err = 0;
  242. flags = IRQF_SHARED;
  243. #ifdef CONFIG_PCI_MSI
  244. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  245. adapter->have_msi = TRUE;
  246. if ((err = pci_enable_msi(adapter->pdev))) {
  247. DPRINTK(PROBE, ERR,
  248. "Unable to allocate MSI interrupt Error: %d\n", err);
  249. adapter->have_msi = FALSE;
  250. }
  251. }
  252. if (adapter->have_msi)
  253. flags &= ~IRQF_SHARED;
  254. #endif
  255. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  256. netdev->name, netdev)))
  257. DPRINTK(PROBE, ERR,
  258. "Unable to allocate interrupt Error: %d\n", err);
  259. return err;
  260. }
  261. static void e1000_free_irq(struct e1000_adapter *adapter)
  262. {
  263. struct net_device *netdev = adapter->netdev;
  264. free_irq(adapter->pdev->irq, netdev);
  265. #ifdef CONFIG_PCI_MSI
  266. if (adapter->have_msi)
  267. pci_disable_msi(adapter->pdev);
  268. #endif
  269. }
  270. /**
  271. * e1000_irq_disable - Mask off interrupt generation on the NIC
  272. * @adapter: board private structure
  273. **/
  274. static void
  275. e1000_irq_disable(struct e1000_adapter *adapter)
  276. {
  277. atomic_inc(&adapter->irq_sem);
  278. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  279. E1000_WRITE_FLUSH(&adapter->hw);
  280. synchronize_irq(adapter->pdev->irq);
  281. }
  282. /**
  283. * e1000_irq_enable - Enable default interrupt generation settings
  284. * @adapter: board private structure
  285. **/
  286. static void
  287. e1000_irq_enable(struct e1000_adapter *adapter)
  288. {
  289. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  290. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  291. E1000_WRITE_FLUSH(&adapter->hw);
  292. }
  293. }
  294. static void
  295. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  296. {
  297. struct net_device *netdev = adapter->netdev;
  298. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  299. uint16_t old_vid = adapter->mng_vlan_id;
  300. if (adapter->vlgrp) {
  301. if (!adapter->vlgrp->vlan_devices[vid]) {
  302. if (adapter->hw.mng_cookie.status &
  303. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  304. e1000_vlan_rx_add_vid(netdev, vid);
  305. adapter->mng_vlan_id = vid;
  306. } else
  307. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  308. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  309. (vid != old_vid) &&
  310. !adapter->vlgrp->vlan_devices[old_vid])
  311. e1000_vlan_rx_kill_vid(netdev, old_vid);
  312. } else
  313. adapter->mng_vlan_id = vid;
  314. }
  315. }
  316. /**
  317. * e1000_release_hw_control - release control of the h/w to f/w
  318. * @adapter: address of board private structure
  319. *
  320. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  321. * For ASF and Pass Through versions of f/w this means that the
  322. * driver is no longer loaded. For AMT version (only with 82573) i
  323. * of the f/w this means that the netowrk i/f is closed.
  324. *
  325. **/
  326. static void
  327. e1000_release_hw_control(struct e1000_adapter *adapter)
  328. {
  329. uint32_t ctrl_ext;
  330. uint32_t swsm;
  331. uint32_t extcnf;
  332. /* Let firmware taken over control of h/w */
  333. switch (adapter->hw.mac_type) {
  334. case e1000_82571:
  335. case e1000_82572:
  336. case e1000_80003es2lan:
  337. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  338. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  339. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  340. break;
  341. case e1000_82573:
  342. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  343. E1000_WRITE_REG(&adapter->hw, SWSM,
  344. swsm & ~E1000_SWSM_DRV_LOAD);
  345. case e1000_ich8lan:
  346. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  347. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  348. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  349. break;
  350. default:
  351. break;
  352. }
  353. }
  354. /**
  355. * e1000_get_hw_control - get control of the h/w from f/w
  356. * @adapter: address of board private structure
  357. *
  358. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  359. * For ASF and Pass Through versions of f/w this means that
  360. * the driver is loaded. For AMT version (only with 82573)
  361. * of the f/w this means that the netowrk i/f is open.
  362. *
  363. **/
  364. static void
  365. e1000_get_hw_control(struct e1000_adapter *adapter)
  366. {
  367. uint32_t ctrl_ext;
  368. uint32_t swsm;
  369. uint32_t extcnf;
  370. /* Let firmware know the driver has taken over */
  371. switch (adapter->hw.mac_type) {
  372. case e1000_82571:
  373. case e1000_82572:
  374. case e1000_80003es2lan:
  375. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  376. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  377. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  378. break;
  379. case e1000_82573:
  380. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  381. E1000_WRITE_REG(&adapter->hw, SWSM,
  382. swsm | E1000_SWSM_DRV_LOAD);
  383. break;
  384. case e1000_ich8lan:
  385. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  386. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  387. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  388. break;
  389. default:
  390. break;
  391. }
  392. }
  393. int
  394. e1000_up(struct e1000_adapter *adapter)
  395. {
  396. struct net_device *netdev = adapter->netdev;
  397. int i;
  398. /* hardware has been reset, we need to reload some things */
  399. e1000_set_multi(netdev);
  400. e1000_restore_vlan(adapter);
  401. e1000_configure_tx(adapter);
  402. e1000_setup_rctl(adapter);
  403. e1000_configure_rx(adapter);
  404. /* call E1000_DESC_UNUSED which always leaves
  405. * at least 1 descriptor unused to make sure
  406. * next_to_use != next_to_clean */
  407. for (i = 0; i < adapter->num_rx_queues; i++) {
  408. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  409. adapter->alloc_rx_buf(adapter, ring,
  410. E1000_DESC_UNUSED(ring));
  411. }
  412. adapter->tx_queue_len = netdev->tx_queue_len;
  413. mod_timer(&adapter->watchdog_timer, jiffies);
  414. #ifdef CONFIG_E1000_NAPI
  415. netif_poll_enable(netdev);
  416. #endif
  417. e1000_irq_enable(adapter);
  418. return 0;
  419. }
  420. /**
  421. * e1000_power_up_phy - restore link in case the phy was powered down
  422. * @adapter: address of board private structure
  423. *
  424. * The phy may be powered down to save power and turn off link when the
  425. * driver is unloaded and wake on lan is not enabled (among others)
  426. * *** this routine MUST be followed by a call to e1000_reset ***
  427. *
  428. **/
  429. void e1000_power_up_phy(struct e1000_adapter *adapter)
  430. {
  431. uint16_t mii_reg = 0;
  432. /* Just clear the power down bit to wake the phy back up */
  433. if (adapter->hw.media_type == e1000_media_type_copper) {
  434. /* according to the manual, the phy will retain its
  435. * settings across a power-down/up cycle */
  436. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  437. mii_reg &= ~MII_CR_POWER_DOWN;
  438. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  439. }
  440. }
  441. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  442. {
  443. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  444. e1000_check_mng_mode(&adapter->hw);
  445. /* Power down the PHY so no link is implied when interface is down
  446. * The PHY cannot be powered down if any of the following is TRUE
  447. * (a) WoL is enabled
  448. * (b) AMT is active
  449. * (c) SoL/IDER session is active */
  450. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  451. adapter->hw.mac_type != e1000_ich8lan &&
  452. adapter->hw.media_type == e1000_media_type_copper &&
  453. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  454. !mng_mode_enabled &&
  455. !e1000_check_phy_reset_block(&adapter->hw)) {
  456. uint16_t mii_reg = 0;
  457. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  458. mii_reg |= MII_CR_POWER_DOWN;
  459. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  460. mdelay(1);
  461. }
  462. }
  463. void
  464. e1000_down(struct e1000_adapter *adapter)
  465. {
  466. struct net_device *netdev = adapter->netdev;
  467. e1000_irq_disable(adapter);
  468. del_timer_sync(&adapter->tx_fifo_stall_timer);
  469. del_timer_sync(&adapter->watchdog_timer);
  470. del_timer_sync(&adapter->phy_info_timer);
  471. #ifdef CONFIG_E1000_NAPI
  472. netif_poll_disable(netdev);
  473. #endif
  474. netdev->tx_queue_len = adapter->tx_queue_len;
  475. adapter->link_speed = 0;
  476. adapter->link_duplex = 0;
  477. netif_carrier_off(netdev);
  478. netif_stop_queue(netdev);
  479. e1000_reset(adapter);
  480. e1000_clean_all_tx_rings(adapter);
  481. e1000_clean_all_rx_rings(adapter);
  482. }
  483. void
  484. e1000_reinit_locked(struct e1000_adapter *adapter)
  485. {
  486. WARN_ON(in_interrupt());
  487. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  488. msleep(1);
  489. e1000_down(adapter);
  490. e1000_up(adapter);
  491. clear_bit(__E1000_RESETTING, &adapter->flags);
  492. }
  493. void
  494. e1000_reset(struct e1000_adapter *adapter)
  495. {
  496. uint32_t pba, manc;
  497. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  498. /* Repartition Pba for greater than 9k mtu
  499. * To take effect CTRL.RST is required.
  500. */
  501. switch (adapter->hw.mac_type) {
  502. case e1000_82547:
  503. case e1000_82547_rev_2:
  504. pba = E1000_PBA_30K;
  505. break;
  506. case e1000_82571:
  507. case e1000_82572:
  508. case e1000_80003es2lan:
  509. pba = E1000_PBA_38K;
  510. break;
  511. case e1000_82573:
  512. pba = E1000_PBA_12K;
  513. break;
  514. case e1000_ich8lan:
  515. pba = E1000_PBA_8K;
  516. break;
  517. default:
  518. pba = E1000_PBA_48K;
  519. break;
  520. }
  521. if ((adapter->hw.mac_type != e1000_82573) &&
  522. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  523. pba -= 8; /* allocate more FIFO for Tx */
  524. if (adapter->hw.mac_type == e1000_82547) {
  525. adapter->tx_fifo_head = 0;
  526. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  527. adapter->tx_fifo_size =
  528. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  529. atomic_set(&adapter->tx_fifo_stall, 0);
  530. }
  531. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  532. /* flow control settings */
  533. /* Set the FC high water mark to 90% of the FIFO size.
  534. * Required to clear last 3 LSB */
  535. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  536. /* We can't use 90% on small FIFOs because the remainder
  537. * would be less than 1 full frame. In this case, we size
  538. * it to allow at least a full frame above the high water
  539. * mark. */
  540. if (pba < E1000_PBA_16K)
  541. fc_high_water_mark = (pba * 1024) - 1600;
  542. adapter->hw.fc_high_water = fc_high_water_mark;
  543. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  544. if (adapter->hw.mac_type == e1000_80003es2lan)
  545. adapter->hw.fc_pause_time = 0xFFFF;
  546. else
  547. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  548. adapter->hw.fc_send_xon = 1;
  549. adapter->hw.fc = adapter->hw.original_fc;
  550. /* Allow time for pending master requests to run */
  551. e1000_reset_hw(&adapter->hw);
  552. if (adapter->hw.mac_type >= e1000_82544)
  553. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  554. if (e1000_init_hw(&adapter->hw))
  555. DPRINTK(PROBE, ERR, "Hardware Error\n");
  556. e1000_update_mng_vlan(adapter);
  557. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  558. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  559. e1000_reset_adaptive(&adapter->hw);
  560. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  561. if (!adapter->smart_power_down &&
  562. (adapter->hw.mac_type == e1000_82571 ||
  563. adapter->hw.mac_type == e1000_82572)) {
  564. uint16_t phy_data = 0;
  565. /* speed up time to link by disabling smart power down, ignore
  566. * the return value of this function because there is nothing
  567. * different we would do if it failed */
  568. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  569. &phy_data);
  570. phy_data &= ~IGP02E1000_PM_SPD;
  571. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  572. phy_data);
  573. }
  574. if (adapter->hw.mac_type < e1000_ich8lan)
  575. /* FIXME: this code is duplicate and wrong for PCI Express */
  576. if (adapter->en_mng_pt) {
  577. manc = E1000_READ_REG(&adapter->hw, MANC);
  578. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  579. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  580. }
  581. }
  582. /**
  583. * e1000_probe - Device Initialization Routine
  584. * @pdev: PCI device information struct
  585. * @ent: entry in e1000_pci_tbl
  586. *
  587. * Returns 0 on success, negative on failure
  588. *
  589. * e1000_probe initializes an adapter identified by a pci_dev structure.
  590. * The OS initialization, configuring of the adapter private structure,
  591. * and a hardware reset occur.
  592. **/
  593. static int __devinit
  594. e1000_probe(struct pci_dev *pdev,
  595. const struct pci_device_id *ent)
  596. {
  597. struct net_device *netdev;
  598. struct e1000_adapter *adapter;
  599. unsigned long mmio_start, mmio_len;
  600. unsigned long flash_start, flash_len;
  601. static int cards_found = 0;
  602. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  603. int i, err, pci_using_dac;
  604. uint16_t eeprom_data = 0;
  605. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  606. if ((err = pci_enable_device(pdev)))
  607. return err;
  608. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  609. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  610. pci_using_dac = 1;
  611. } else {
  612. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  613. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  614. E1000_ERR("No usable DMA configuration, aborting\n");
  615. goto err_dma;
  616. }
  617. pci_using_dac = 0;
  618. }
  619. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  620. goto err_pci_reg;
  621. pci_set_master(pdev);
  622. err = -ENOMEM;
  623. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  624. if (!netdev)
  625. goto err_alloc_etherdev;
  626. SET_MODULE_OWNER(netdev);
  627. SET_NETDEV_DEV(netdev, &pdev->dev);
  628. pci_set_drvdata(pdev, netdev);
  629. adapter = netdev_priv(netdev);
  630. adapter->netdev = netdev;
  631. adapter->pdev = pdev;
  632. adapter->hw.back = adapter;
  633. adapter->msg_enable = (1 << debug) - 1;
  634. mmio_start = pci_resource_start(pdev, BAR_0);
  635. mmio_len = pci_resource_len(pdev, BAR_0);
  636. err = -EIO;
  637. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  638. if (!adapter->hw.hw_addr)
  639. goto err_ioremap;
  640. for (i = BAR_1; i <= BAR_5; i++) {
  641. if (pci_resource_len(pdev, i) == 0)
  642. continue;
  643. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  644. adapter->hw.io_base = pci_resource_start(pdev, i);
  645. break;
  646. }
  647. }
  648. netdev->open = &e1000_open;
  649. netdev->stop = &e1000_close;
  650. netdev->hard_start_xmit = &e1000_xmit_frame;
  651. netdev->get_stats = &e1000_get_stats;
  652. netdev->set_multicast_list = &e1000_set_multi;
  653. netdev->set_mac_address = &e1000_set_mac;
  654. netdev->change_mtu = &e1000_change_mtu;
  655. netdev->do_ioctl = &e1000_ioctl;
  656. e1000_set_ethtool_ops(netdev);
  657. netdev->tx_timeout = &e1000_tx_timeout;
  658. netdev->watchdog_timeo = 5 * HZ;
  659. #ifdef CONFIG_E1000_NAPI
  660. netdev->poll = &e1000_clean;
  661. netdev->weight = 64;
  662. #endif
  663. netdev->vlan_rx_register = e1000_vlan_rx_register;
  664. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  665. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  666. #ifdef CONFIG_NET_POLL_CONTROLLER
  667. netdev->poll_controller = e1000_netpoll;
  668. #endif
  669. strcpy(netdev->name, pci_name(pdev));
  670. netdev->mem_start = mmio_start;
  671. netdev->mem_end = mmio_start + mmio_len;
  672. netdev->base_addr = adapter->hw.io_base;
  673. adapter->bd_number = cards_found;
  674. /* setup the private structure */
  675. if ((err = e1000_sw_init(adapter)))
  676. goto err_sw_init;
  677. err = -EIO;
  678. /* Flash BAR mapping must happen after e1000_sw_init
  679. * because it depends on mac_type */
  680. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  681. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  682. flash_start = pci_resource_start(pdev, 1);
  683. flash_len = pci_resource_len(pdev, 1);
  684. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  685. if (!adapter->hw.flash_address)
  686. goto err_flashmap;
  687. }
  688. if (e1000_check_phy_reset_block(&adapter->hw))
  689. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  690. if (adapter->hw.mac_type >= e1000_82543) {
  691. netdev->features = NETIF_F_SG |
  692. NETIF_F_HW_CSUM |
  693. NETIF_F_HW_VLAN_TX |
  694. NETIF_F_HW_VLAN_RX |
  695. NETIF_F_HW_VLAN_FILTER;
  696. if (adapter->hw.mac_type == e1000_ich8lan)
  697. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  698. }
  699. #ifdef NETIF_F_TSO
  700. if ((adapter->hw.mac_type >= e1000_82544) &&
  701. (adapter->hw.mac_type != e1000_82547))
  702. netdev->features |= NETIF_F_TSO;
  703. #ifdef NETIF_F_TSO_IPV6
  704. if (adapter->hw.mac_type > e1000_82547_rev_2)
  705. netdev->features |= NETIF_F_TSO_IPV6;
  706. #endif
  707. #endif
  708. if (pci_using_dac)
  709. netdev->features |= NETIF_F_HIGHDMA;
  710. netdev->features |= NETIF_F_LLTX;
  711. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  712. /* initialize eeprom parameters */
  713. if (e1000_init_eeprom_params(&adapter->hw)) {
  714. E1000_ERR("EEPROM initialization failed\n");
  715. goto err_eeprom;
  716. }
  717. /* before reading the EEPROM, reset the controller to
  718. * put the device in a known good starting state */
  719. e1000_reset_hw(&adapter->hw);
  720. /* make sure the EEPROM is good */
  721. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  722. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  723. goto err_eeprom;
  724. }
  725. /* copy the MAC address out of the EEPROM */
  726. if (e1000_read_mac_addr(&adapter->hw))
  727. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  728. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  729. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  730. if (!is_valid_ether_addr(netdev->perm_addr)) {
  731. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  732. goto err_eeprom;
  733. }
  734. e1000_get_bus_info(&adapter->hw);
  735. init_timer(&adapter->tx_fifo_stall_timer);
  736. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  737. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  738. init_timer(&adapter->watchdog_timer);
  739. adapter->watchdog_timer.function = &e1000_watchdog;
  740. adapter->watchdog_timer.data = (unsigned long) adapter;
  741. init_timer(&adapter->phy_info_timer);
  742. adapter->phy_info_timer.function = &e1000_update_phy_info;
  743. adapter->phy_info_timer.data = (unsigned long) adapter;
  744. INIT_WORK(&adapter->reset_task,
  745. (void (*)(void *))e1000_reset_task, netdev);
  746. /* we're going to reset, so assume we have no link for now */
  747. netif_carrier_off(netdev);
  748. netif_stop_queue(netdev);
  749. e1000_check_options(adapter);
  750. /* Initial Wake on LAN setting
  751. * If APM wake is enabled in the EEPROM,
  752. * enable the ACPI Magic Packet filter
  753. */
  754. switch (adapter->hw.mac_type) {
  755. case e1000_82542_rev2_0:
  756. case e1000_82542_rev2_1:
  757. case e1000_82543:
  758. break;
  759. case e1000_82544:
  760. e1000_read_eeprom(&adapter->hw,
  761. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  762. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  763. break;
  764. case e1000_ich8lan:
  765. e1000_read_eeprom(&adapter->hw,
  766. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  767. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  768. break;
  769. case e1000_82546:
  770. case e1000_82546_rev_3:
  771. case e1000_82571:
  772. case e1000_80003es2lan:
  773. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  774. e1000_read_eeprom(&adapter->hw,
  775. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  776. break;
  777. }
  778. /* Fall Through */
  779. default:
  780. e1000_read_eeprom(&adapter->hw,
  781. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  782. break;
  783. }
  784. if (eeprom_data & eeprom_apme_mask)
  785. adapter->eeprom_wol |= E1000_WUFC_MAG;
  786. /* now that we have the eeprom settings, apply the special cases
  787. * where the eeprom may be wrong or the board simply won't support
  788. * wake on lan on a particular port */
  789. switch (pdev->device) {
  790. case E1000_DEV_ID_82546GB_PCIE:
  791. adapter->eeprom_wol = 0;
  792. break;
  793. case E1000_DEV_ID_82546EB_FIBER:
  794. case E1000_DEV_ID_82546GB_FIBER:
  795. case E1000_DEV_ID_82571EB_FIBER:
  796. /* Wake events only supported on port A for dual fiber
  797. * regardless of eeprom setting */
  798. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  799. adapter->eeprom_wol = 0;
  800. break;
  801. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  802. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  803. /* if quad port adapter, disable WoL on all but port A */
  804. if (global_quad_port_a != 0)
  805. adapter->eeprom_wol = 0;
  806. else
  807. adapter->quad_port_a = 1;
  808. /* Reset for multiple quad port adapters */
  809. if (++global_quad_port_a == 4)
  810. global_quad_port_a = 0;
  811. break;
  812. }
  813. /* initialize the wol settings based on the eeprom settings */
  814. adapter->wol = adapter->eeprom_wol;
  815. /* print bus type/speed/width info */
  816. {
  817. struct e1000_hw *hw = &adapter->hw;
  818. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  819. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  820. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  821. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  822. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  823. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  824. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  825. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  826. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  827. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  828. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  829. "32-bit"));
  830. }
  831. for (i = 0; i < 6; i++)
  832. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  833. /* reset the hardware with the new settings */
  834. e1000_reset(adapter);
  835. /* If the controller is 82573 and f/w is AMT, do not set
  836. * DRV_LOAD until the interface is up. For all other cases,
  837. * let the f/w know that the h/w is now under the control
  838. * of the driver. */
  839. if (adapter->hw.mac_type != e1000_82573 ||
  840. !e1000_check_mng_mode(&adapter->hw))
  841. e1000_get_hw_control(adapter);
  842. strcpy(netdev->name, "eth%d");
  843. if ((err = register_netdev(netdev)))
  844. goto err_register;
  845. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  846. cards_found++;
  847. return 0;
  848. err_register:
  849. e1000_release_hw_control(adapter);
  850. err_eeprom:
  851. if (!e1000_check_phy_reset_block(&adapter->hw))
  852. e1000_phy_hw_reset(&adapter->hw);
  853. if (adapter->hw.flash_address)
  854. iounmap(adapter->hw.flash_address);
  855. err_flashmap:
  856. #ifdef CONFIG_E1000_NAPI
  857. for (i = 0; i < adapter->num_rx_queues; i++)
  858. dev_put(&adapter->polling_netdev[i]);
  859. #endif
  860. kfree(adapter->tx_ring);
  861. kfree(adapter->rx_ring);
  862. #ifdef CONFIG_E1000_NAPI
  863. kfree(adapter->polling_netdev);
  864. #endif
  865. err_sw_init:
  866. iounmap(adapter->hw.hw_addr);
  867. err_ioremap:
  868. free_netdev(netdev);
  869. err_alloc_etherdev:
  870. pci_release_regions(pdev);
  871. err_pci_reg:
  872. err_dma:
  873. pci_disable_device(pdev);
  874. return err;
  875. }
  876. /**
  877. * e1000_remove - Device Removal Routine
  878. * @pdev: PCI device information struct
  879. *
  880. * e1000_remove is called by the PCI subsystem to alert the driver
  881. * that it should release a PCI device. The could be caused by a
  882. * Hot-Plug event, or because the driver is going to be removed from
  883. * memory.
  884. **/
  885. static void __devexit
  886. e1000_remove(struct pci_dev *pdev)
  887. {
  888. struct net_device *netdev = pci_get_drvdata(pdev);
  889. struct e1000_adapter *adapter = netdev_priv(netdev);
  890. uint32_t manc;
  891. #ifdef CONFIG_E1000_NAPI
  892. int i;
  893. #endif
  894. flush_scheduled_work();
  895. if (adapter->hw.mac_type >= e1000_82540 &&
  896. adapter->hw.mac_type != e1000_ich8lan &&
  897. adapter->hw.media_type == e1000_media_type_copper) {
  898. manc = E1000_READ_REG(&adapter->hw, MANC);
  899. if (manc & E1000_MANC_SMBUS_EN) {
  900. manc |= E1000_MANC_ARP_EN;
  901. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  902. }
  903. }
  904. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  905. * would have already happened in close and is redundant. */
  906. e1000_release_hw_control(adapter);
  907. unregister_netdev(netdev);
  908. #ifdef CONFIG_E1000_NAPI
  909. for (i = 0; i < adapter->num_rx_queues; i++)
  910. dev_put(&adapter->polling_netdev[i]);
  911. #endif
  912. if (!e1000_check_phy_reset_block(&adapter->hw))
  913. e1000_phy_hw_reset(&adapter->hw);
  914. kfree(adapter->tx_ring);
  915. kfree(adapter->rx_ring);
  916. #ifdef CONFIG_E1000_NAPI
  917. kfree(adapter->polling_netdev);
  918. #endif
  919. iounmap(adapter->hw.hw_addr);
  920. if (adapter->hw.flash_address)
  921. iounmap(adapter->hw.flash_address);
  922. pci_release_regions(pdev);
  923. free_netdev(netdev);
  924. pci_disable_device(pdev);
  925. }
  926. /**
  927. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  928. * @adapter: board private structure to initialize
  929. *
  930. * e1000_sw_init initializes the Adapter private data structure.
  931. * Fields are initialized based on PCI device information and
  932. * OS network device settings (MTU size).
  933. **/
  934. static int __devinit
  935. e1000_sw_init(struct e1000_adapter *adapter)
  936. {
  937. struct e1000_hw *hw = &adapter->hw;
  938. struct net_device *netdev = adapter->netdev;
  939. struct pci_dev *pdev = adapter->pdev;
  940. #ifdef CONFIG_E1000_NAPI
  941. int i;
  942. #endif
  943. /* PCI config space info */
  944. hw->vendor_id = pdev->vendor;
  945. hw->device_id = pdev->device;
  946. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  947. hw->subsystem_id = pdev->subsystem_device;
  948. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  949. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  950. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  951. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  952. hw->max_frame_size = netdev->mtu +
  953. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  954. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  955. /* identify the MAC */
  956. if (e1000_set_mac_type(hw)) {
  957. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  958. return -EIO;
  959. }
  960. switch (hw->mac_type) {
  961. default:
  962. break;
  963. case e1000_82541:
  964. case e1000_82547:
  965. case e1000_82541_rev_2:
  966. case e1000_82547_rev_2:
  967. hw->phy_init_script = 1;
  968. break;
  969. }
  970. e1000_set_media_type(hw);
  971. hw->wait_autoneg_complete = FALSE;
  972. hw->tbi_compatibility_en = TRUE;
  973. hw->adaptive_ifs = TRUE;
  974. /* Copper options */
  975. if (hw->media_type == e1000_media_type_copper) {
  976. hw->mdix = AUTO_ALL_MODES;
  977. hw->disable_polarity_correction = FALSE;
  978. hw->master_slave = E1000_MASTER_SLAVE;
  979. }
  980. adapter->num_tx_queues = 1;
  981. adapter->num_rx_queues = 1;
  982. if (e1000_alloc_queues(adapter)) {
  983. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  984. return -ENOMEM;
  985. }
  986. #ifdef CONFIG_E1000_NAPI
  987. for (i = 0; i < adapter->num_rx_queues; i++) {
  988. adapter->polling_netdev[i].priv = adapter;
  989. adapter->polling_netdev[i].poll = &e1000_clean;
  990. adapter->polling_netdev[i].weight = 64;
  991. dev_hold(&adapter->polling_netdev[i]);
  992. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  993. }
  994. spin_lock_init(&adapter->tx_queue_lock);
  995. #endif
  996. atomic_set(&adapter->irq_sem, 1);
  997. spin_lock_init(&adapter->stats_lock);
  998. return 0;
  999. }
  1000. /**
  1001. * e1000_alloc_queues - Allocate memory for all rings
  1002. * @adapter: board private structure to initialize
  1003. *
  1004. * We allocate one ring per queue at run-time since we don't know the
  1005. * number of queues at compile-time. The polling_netdev array is
  1006. * intended for Multiqueue, but should work fine with a single queue.
  1007. **/
  1008. static int __devinit
  1009. e1000_alloc_queues(struct e1000_adapter *adapter)
  1010. {
  1011. int size;
  1012. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  1013. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  1014. if (!adapter->tx_ring)
  1015. return -ENOMEM;
  1016. memset(adapter->tx_ring, 0, size);
  1017. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  1018. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  1019. if (!adapter->rx_ring) {
  1020. kfree(adapter->tx_ring);
  1021. return -ENOMEM;
  1022. }
  1023. memset(adapter->rx_ring, 0, size);
  1024. #ifdef CONFIG_E1000_NAPI
  1025. size = sizeof(struct net_device) * adapter->num_rx_queues;
  1026. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  1027. if (!adapter->polling_netdev) {
  1028. kfree(adapter->tx_ring);
  1029. kfree(adapter->rx_ring);
  1030. return -ENOMEM;
  1031. }
  1032. memset(adapter->polling_netdev, 0, size);
  1033. #endif
  1034. return E1000_SUCCESS;
  1035. }
  1036. /**
  1037. * e1000_open - Called when a network interface is made active
  1038. * @netdev: network interface device structure
  1039. *
  1040. * Returns 0 on success, negative value on failure
  1041. *
  1042. * The open entry point is called when a network interface is made
  1043. * active by the system (IFF_UP). At this point all resources needed
  1044. * for transmit and receive operations are allocated, the interrupt
  1045. * handler is registered with the OS, the watchdog timer is started,
  1046. * and the stack is notified that the interface is ready.
  1047. **/
  1048. static int
  1049. e1000_open(struct net_device *netdev)
  1050. {
  1051. struct e1000_adapter *adapter = netdev_priv(netdev);
  1052. int err;
  1053. /* disallow open during test */
  1054. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1055. return -EBUSY;
  1056. /* allocate transmit descriptors */
  1057. if ((err = e1000_setup_all_tx_resources(adapter)))
  1058. goto err_setup_tx;
  1059. /* allocate receive descriptors */
  1060. if ((err = e1000_setup_all_rx_resources(adapter)))
  1061. goto err_setup_rx;
  1062. err = e1000_request_irq(adapter);
  1063. if (err)
  1064. goto err_req_irq;
  1065. e1000_power_up_phy(adapter);
  1066. if ((err = e1000_up(adapter)))
  1067. goto err_up;
  1068. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1069. if ((adapter->hw.mng_cookie.status &
  1070. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1071. e1000_update_mng_vlan(adapter);
  1072. }
  1073. /* If AMT is enabled, let the firmware know that the network
  1074. * interface is now open */
  1075. if (adapter->hw.mac_type == e1000_82573 &&
  1076. e1000_check_mng_mode(&adapter->hw))
  1077. e1000_get_hw_control(adapter);
  1078. return E1000_SUCCESS;
  1079. err_up:
  1080. e1000_power_down_phy(adapter);
  1081. e1000_free_irq(adapter);
  1082. err_req_irq:
  1083. e1000_free_all_rx_resources(adapter);
  1084. err_setup_rx:
  1085. e1000_free_all_tx_resources(adapter);
  1086. err_setup_tx:
  1087. e1000_reset(adapter);
  1088. return err;
  1089. }
  1090. /**
  1091. * e1000_close - Disables a network interface
  1092. * @netdev: network interface device structure
  1093. *
  1094. * Returns 0, this is not allowed to fail
  1095. *
  1096. * The close entry point is called when an interface is de-activated
  1097. * by the OS. The hardware is still under the drivers control, but
  1098. * needs to be disabled. A global MAC reset is issued to stop the
  1099. * hardware, and all transmit and receive resources are freed.
  1100. **/
  1101. static int
  1102. e1000_close(struct net_device *netdev)
  1103. {
  1104. struct e1000_adapter *adapter = netdev_priv(netdev);
  1105. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1106. e1000_down(adapter);
  1107. e1000_power_down_phy(adapter);
  1108. e1000_free_irq(adapter);
  1109. e1000_free_all_tx_resources(adapter);
  1110. e1000_free_all_rx_resources(adapter);
  1111. if ((adapter->hw.mng_cookie.status &
  1112. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1113. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1114. }
  1115. /* If AMT is enabled, let the firmware know that the network
  1116. * interface is now closed */
  1117. if (adapter->hw.mac_type == e1000_82573 &&
  1118. e1000_check_mng_mode(&adapter->hw))
  1119. e1000_release_hw_control(adapter);
  1120. return 0;
  1121. }
  1122. /**
  1123. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1124. * @adapter: address of board private structure
  1125. * @start: address of beginning of memory
  1126. * @len: length of memory
  1127. **/
  1128. static boolean_t
  1129. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1130. void *start, unsigned long len)
  1131. {
  1132. unsigned long begin = (unsigned long) start;
  1133. unsigned long end = begin + len;
  1134. /* First rev 82545 and 82546 need to not allow any memory
  1135. * write location to cross 64k boundary due to errata 23 */
  1136. if (adapter->hw.mac_type == e1000_82545 ||
  1137. adapter->hw.mac_type == e1000_82546) {
  1138. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1139. }
  1140. return TRUE;
  1141. }
  1142. /**
  1143. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1144. * @adapter: board private structure
  1145. * @txdr: tx descriptor ring (for a specific queue) to setup
  1146. *
  1147. * Return 0 on success, negative on failure
  1148. **/
  1149. static int
  1150. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1151. struct e1000_tx_ring *txdr)
  1152. {
  1153. struct pci_dev *pdev = adapter->pdev;
  1154. int size;
  1155. size = sizeof(struct e1000_buffer) * txdr->count;
  1156. txdr->buffer_info = vmalloc(size);
  1157. if (!txdr->buffer_info) {
  1158. DPRINTK(PROBE, ERR,
  1159. "Unable to allocate memory for the transmit descriptor ring\n");
  1160. return -ENOMEM;
  1161. }
  1162. memset(txdr->buffer_info, 0, size);
  1163. /* round up to nearest 4K */
  1164. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1165. E1000_ROUNDUP(txdr->size, 4096);
  1166. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1167. if (!txdr->desc) {
  1168. setup_tx_desc_die:
  1169. vfree(txdr->buffer_info);
  1170. DPRINTK(PROBE, ERR,
  1171. "Unable to allocate memory for the transmit descriptor ring\n");
  1172. return -ENOMEM;
  1173. }
  1174. /* Fix for errata 23, can't cross 64kB boundary */
  1175. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1176. void *olddesc = txdr->desc;
  1177. dma_addr_t olddma = txdr->dma;
  1178. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1179. "at %p\n", txdr->size, txdr->desc);
  1180. /* Try again, without freeing the previous */
  1181. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1182. /* Failed allocation, critical failure */
  1183. if (!txdr->desc) {
  1184. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1185. goto setup_tx_desc_die;
  1186. }
  1187. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1188. /* give up */
  1189. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1190. txdr->dma);
  1191. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1192. DPRINTK(PROBE, ERR,
  1193. "Unable to allocate aligned memory "
  1194. "for the transmit descriptor ring\n");
  1195. vfree(txdr->buffer_info);
  1196. return -ENOMEM;
  1197. } else {
  1198. /* Free old allocation, new allocation was successful */
  1199. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1200. }
  1201. }
  1202. memset(txdr->desc, 0, txdr->size);
  1203. txdr->next_to_use = 0;
  1204. txdr->next_to_clean = 0;
  1205. spin_lock_init(&txdr->tx_lock);
  1206. return 0;
  1207. }
  1208. /**
  1209. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1210. * (Descriptors) for all queues
  1211. * @adapter: board private structure
  1212. *
  1213. * Return 0 on success, negative on failure
  1214. **/
  1215. int
  1216. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1217. {
  1218. int i, err = 0;
  1219. for (i = 0; i < adapter->num_tx_queues; i++) {
  1220. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1221. if (err) {
  1222. DPRINTK(PROBE, ERR,
  1223. "Allocation for Tx Queue %u failed\n", i);
  1224. for (i-- ; i >= 0; i--)
  1225. e1000_free_tx_resources(adapter,
  1226. &adapter->tx_ring[i]);
  1227. break;
  1228. }
  1229. }
  1230. return err;
  1231. }
  1232. /**
  1233. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1234. * @adapter: board private structure
  1235. *
  1236. * Configure the Tx unit of the MAC after a reset.
  1237. **/
  1238. static void
  1239. e1000_configure_tx(struct e1000_adapter *adapter)
  1240. {
  1241. uint64_t tdba;
  1242. struct e1000_hw *hw = &adapter->hw;
  1243. uint32_t tdlen, tctl, tipg, tarc;
  1244. uint32_t ipgr1, ipgr2;
  1245. /* Setup the HW Tx Head and Tail descriptor pointers */
  1246. switch (adapter->num_tx_queues) {
  1247. case 1:
  1248. default:
  1249. tdba = adapter->tx_ring[0].dma;
  1250. tdlen = adapter->tx_ring[0].count *
  1251. sizeof(struct e1000_tx_desc);
  1252. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1253. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1254. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1255. E1000_WRITE_REG(hw, TDT, 0);
  1256. E1000_WRITE_REG(hw, TDH, 0);
  1257. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  1258. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  1259. break;
  1260. }
  1261. /* Set the default values for the Tx Inter Packet Gap timer */
  1262. if (hw->media_type == e1000_media_type_fiber ||
  1263. hw->media_type == e1000_media_type_internal_serdes)
  1264. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1265. else
  1266. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1267. switch (hw->mac_type) {
  1268. case e1000_82542_rev2_0:
  1269. case e1000_82542_rev2_1:
  1270. tipg = DEFAULT_82542_TIPG_IPGT;
  1271. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1272. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1273. break;
  1274. case e1000_80003es2lan:
  1275. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1276. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1277. break;
  1278. default:
  1279. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1280. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1281. break;
  1282. }
  1283. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1284. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1285. E1000_WRITE_REG(hw, TIPG, tipg);
  1286. /* Set the Tx Interrupt Delay register */
  1287. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1288. if (hw->mac_type >= e1000_82540)
  1289. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1290. /* Program the Transmit Control Register */
  1291. tctl = E1000_READ_REG(hw, TCTL);
  1292. tctl &= ~E1000_TCTL_CT;
  1293. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1294. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1295. #ifdef DISABLE_MULR
  1296. /* disable Multiple Reads for debugging */
  1297. tctl &= ~E1000_TCTL_MULR;
  1298. #endif
  1299. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1300. tarc = E1000_READ_REG(hw, TARC0);
  1301. tarc |= ((1 << 25) | (1 << 21));
  1302. E1000_WRITE_REG(hw, TARC0, tarc);
  1303. tarc = E1000_READ_REG(hw, TARC1);
  1304. tarc |= (1 << 25);
  1305. if (tctl & E1000_TCTL_MULR)
  1306. tarc &= ~(1 << 28);
  1307. else
  1308. tarc |= (1 << 28);
  1309. E1000_WRITE_REG(hw, TARC1, tarc);
  1310. } else if (hw->mac_type == e1000_80003es2lan) {
  1311. tarc = E1000_READ_REG(hw, TARC0);
  1312. tarc |= 1;
  1313. E1000_WRITE_REG(hw, TARC0, tarc);
  1314. tarc = E1000_READ_REG(hw, TARC1);
  1315. tarc |= 1;
  1316. E1000_WRITE_REG(hw, TARC1, tarc);
  1317. }
  1318. e1000_config_collision_dist(hw);
  1319. /* Setup Transmit Descriptor Settings for eop descriptor */
  1320. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1321. E1000_TXD_CMD_IFCS;
  1322. if (hw->mac_type < e1000_82543)
  1323. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1324. else
  1325. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1326. /* Cache if we're 82544 running in PCI-X because we'll
  1327. * need this to apply a workaround later in the send path. */
  1328. if (hw->mac_type == e1000_82544 &&
  1329. hw->bus_type == e1000_bus_type_pcix)
  1330. adapter->pcix_82544 = 1;
  1331. E1000_WRITE_REG(hw, TCTL, tctl);
  1332. }
  1333. /**
  1334. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1335. * @adapter: board private structure
  1336. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1337. *
  1338. * Returns 0 on success, negative on failure
  1339. **/
  1340. static int
  1341. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1342. struct e1000_rx_ring *rxdr)
  1343. {
  1344. struct pci_dev *pdev = adapter->pdev;
  1345. int size, desc_len;
  1346. size = sizeof(struct e1000_buffer) * rxdr->count;
  1347. rxdr->buffer_info = vmalloc(size);
  1348. if (!rxdr->buffer_info) {
  1349. DPRINTK(PROBE, ERR,
  1350. "Unable to allocate memory for the receive descriptor ring\n");
  1351. return -ENOMEM;
  1352. }
  1353. memset(rxdr->buffer_info, 0, size);
  1354. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1355. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1356. if (!rxdr->ps_page) {
  1357. vfree(rxdr->buffer_info);
  1358. DPRINTK(PROBE, ERR,
  1359. "Unable to allocate memory for the receive descriptor ring\n");
  1360. return -ENOMEM;
  1361. }
  1362. memset(rxdr->ps_page, 0, size);
  1363. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1364. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1365. if (!rxdr->ps_page_dma) {
  1366. vfree(rxdr->buffer_info);
  1367. kfree(rxdr->ps_page);
  1368. DPRINTK(PROBE, ERR,
  1369. "Unable to allocate memory for the receive descriptor ring\n");
  1370. return -ENOMEM;
  1371. }
  1372. memset(rxdr->ps_page_dma, 0, size);
  1373. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1374. desc_len = sizeof(struct e1000_rx_desc);
  1375. else
  1376. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1377. /* Round up to nearest 4K */
  1378. rxdr->size = rxdr->count * desc_len;
  1379. E1000_ROUNDUP(rxdr->size, 4096);
  1380. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1381. if (!rxdr->desc) {
  1382. DPRINTK(PROBE, ERR,
  1383. "Unable to allocate memory for the receive descriptor ring\n");
  1384. setup_rx_desc_die:
  1385. vfree(rxdr->buffer_info);
  1386. kfree(rxdr->ps_page);
  1387. kfree(rxdr->ps_page_dma);
  1388. return -ENOMEM;
  1389. }
  1390. /* Fix for errata 23, can't cross 64kB boundary */
  1391. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1392. void *olddesc = rxdr->desc;
  1393. dma_addr_t olddma = rxdr->dma;
  1394. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1395. "at %p\n", rxdr->size, rxdr->desc);
  1396. /* Try again, without freeing the previous */
  1397. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1398. /* Failed allocation, critical failure */
  1399. if (!rxdr->desc) {
  1400. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1401. DPRINTK(PROBE, ERR,
  1402. "Unable to allocate memory "
  1403. "for the receive descriptor ring\n");
  1404. goto setup_rx_desc_die;
  1405. }
  1406. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1407. /* give up */
  1408. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1409. rxdr->dma);
  1410. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1411. DPRINTK(PROBE, ERR,
  1412. "Unable to allocate aligned memory "
  1413. "for the receive descriptor ring\n");
  1414. goto setup_rx_desc_die;
  1415. } else {
  1416. /* Free old allocation, new allocation was successful */
  1417. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1418. }
  1419. }
  1420. memset(rxdr->desc, 0, rxdr->size);
  1421. rxdr->next_to_clean = 0;
  1422. rxdr->next_to_use = 0;
  1423. return 0;
  1424. }
  1425. /**
  1426. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1427. * (Descriptors) for all queues
  1428. * @adapter: board private structure
  1429. *
  1430. * Return 0 on success, negative on failure
  1431. **/
  1432. int
  1433. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1434. {
  1435. int i, err = 0;
  1436. for (i = 0; i < adapter->num_rx_queues; i++) {
  1437. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1438. if (err) {
  1439. DPRINTK(PROBE, ERR,
  1440. "Allocation for Rx Queue %u failed\n", i);
  1441. for (i-- ; i >= 0; i--)
  1442. e1000_free_rx_resources(adapter,
  1443. &adapter->rx_ring[i]);
  1444. break;
  1445. }
  1446. }
  1447. return err;
  1448. }
  1449. /**
  1450. * e1000_setup_rctl - configure the receive control registers
  1451. * @adapter: Board private structure
  1452. **/
  1453. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1454. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1455. static void
  1456. e1000_setup_rctl(struct e1000_adapter *adapter)
  1457. {
  1458. uint32_t rctl, rfctl;
  1459. uint32_t psrctl = 0;
  1460. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1461. uint32_t pages = 0;
  1462. #endif
  1463. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1464. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1465. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1466. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1467. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1468. if (adapter->hw.tbi_compatibility_on == 1)
  1469. rctl |= E1000_RCTL_SBP;
  1470. else
  1471. rctl &= ~E1000_RCTL_SBP;
  1472. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1473. rctl &= ~E1000_RCTL_LPE;
  1474. else
  1475. rctl |= E1000_RCTL_LPE;
  1476. /* Setup buffer sizes */
  1477. rctl &= ~E1000_RCTL_SZ_4096;
  1478. rctl |= E1000_RCTL_BSEX;
  1479. switch (adapter->rx_buffer_len) {
  1480. case E1000_RXBUFFER_256:
  1481. rctl |= E1000_RCTL_SZ_256;
  1482. rctl &= ~E1000_RCTL_BSEX;
  1483. break;
  1484. case E1000_RXBUFFER_512:
  1485. rctl |= E1000_RCTL_SZ_512;
  1486. rctl &= ~E1000_RCTL_BSEX;
  1487. break;
  1488. case E1000_RXBUFFER_1024:
  1489. rctl |= E1000_RCTL_SZ_1024;
  1490. rctl &= ~E1000_RCTL_BSEX;
  1491. break;
  1492. case E1000_RXBUFFER_2048:
  1493. default:
  1494. rctl |= E1000_RCTL_SZ_2048;
  1495. rctl &= ~E1000_RCTL_BSEX;
  1496. break;
  1497. case E1000_RXBUFFER_4096:
  1498. rctl |= E1000_RCTL_SZ_4096;
  1499. break;
  1500. case E1000_RXBUFFER_8192:
  1501. rctl |= E1000_RCTL_SZ_8192;
  1502. break;
  1503. case E1000_RXBUFFER_16384:
  1504. rctl |= E1000_RCTL_SZ_16384;
  1505. break;
  1506. }
  1507. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1508. /* 82571 and greater support packet-split where the protocol
  1509. * header is placed in skb->data and the packet data is
  1510. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1511. * In the case of a non-split, skb->data is linearly filled,
  1512. * followed by the page buffers. Therefore, skb->data is
  1513. * sized to hold the largest protocol header.
  1514. */
  1515. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1516. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1517. PAGE_SIZE <= 16384)
  1518. adapter->rx_ps_pages = pages;
  1519. else
  1520. adapter->rx_ps_pages = 0;
  1521. #endif
  1522. if (adapter->rx_ps_pages) {
  1523. /* Configure extra packet-split registers */
  1524. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1525. rfctl |= E1000_RFCTL_EXTEN;
  1526. /* disable IPv6 packet split support */
  1527. rfctl |= E1000_RFCTL_IPV6_DIS;
  1528. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1529. rctl |= E1000_RCTL_DTYP_PS;
  1530. psrctl |= adapter->rx_ps_bsize0 >>
  1531. E1000_PSRCTL_BSIZE0_SHIFT;
  1532. switch (adapter->rx_ps_pages) {
  1533. case 3:
  1534. psrctl |= PAGE_SIZE <<
  1535. E1000_PSRCTL_BSIZE3_SHIFT;
  1536. case 2:
  1537. psrctl |= PAGE_SIZE <<
  1538. E1000_PSRCTL_BSIZE2_SHIFT;
  1539. case 1:
  1540. psrctl |= PAGE_SIZE >>
  1541. E1000_PSRCTL_BSIZE1_SHIFT;
  1542. break;
  1543. }
  1544. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1545. }
  1546. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1547. }
  1548. /**
  1549. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1550. * @adapter: board private structure
  1551. *
  1552. * Configure the Rx unit of the MAC after a reset.
  1553. **/
  1554. static void
  1555. e1000_configure_rx(struct e1000_adapter *adapter)
  1556. {
  1557. uint64_t rdba;
  1558. struct e1000_hw *hw = &adapter->hw;
  1559. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1560. if (adapter->rx_ps_pages) {
  1561. /* this is a 32 byte descriptor */
  1562. rdlen = adapter->rx_ring[0].count *
  1563. sizeof(union e1000_rx_desc_packet_split);
  1564. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1565. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1566. } else {
  1567. rdlen = adapter->rx_ring[0].count *
  1568. sizeof(struct e1000_rx_desc);
  1569. adapter->clean_rx = e1000_clean_rx_irq;
  1570. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1571. }
  1572. /* disable receives while setting up the descriptors */
  1573. rctl = E1000_READ_REG(hw, RCTL);
  1574. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1575. /* set the Receive Delay Timer Register */
  1576. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1577. if (hw->mac_type >= e1000_82540) {
  1578. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1579. if (adapter->itr > 1)
  1580. E1000_WRITE_REG(hw, ITR,
  1581. 1000000000 / (adapter->itr * 256));
  1582. }
  1583. if (hw->mac_type >= e1000_82571) {
  1584. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1585. /* Reset delay timers after every interrupt */
  1586. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1587. #ifdef CONFIG_E1000_NAPI
  1588. /* Auto-Mask interrupts upon ICR read. */
  1589. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1590. #endif
  1591. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1592. E1000_WRITE_REG(hw, IAM, ~0);
  1593. E1000_WRITE_FLUSH(hw);
  1594. }
  1595. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1596. * the Base and Length of the Rx Descriptor Ring */
  1597. switch (adapter->num_rx_queues) {
  1598. case 1:
  1599. default:
  1600. rdba = adapter->rx_ring[0].dma;
  1601. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1602. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1603. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1604. E1000_WRITE_REG(hw, RDT, 0);
  1605. E1000_WRITE_REG(hw, RDH, 0);
  1606. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
  1607. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
  1608. break;
  1609. }
  1610. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1611. if (hw->mac_type >= e1000_82543) {
  1612. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1613. if (adapter->rx_csum == TRUE) {
  1614. rxcsum |= E1000_RXCSUM_TUOFL;
  1615. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1616. * Must be used in conjunction with packet-split. */
  1617. if ((hw->mac_type >= e1000_82571) &&
  1618. (adapter->rx_ps_pages)) {
  1619. rxcsum |= E1000_RXCSUM_IPPCSE;
  1620. }
  1621. } else {
  1622. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1623. /* don't need to clear IPPCSE as it defaults to 0 */
  1624. }
  1625. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1626. }
  1627. /* Enable Receives */
  1628. E1000_WRITE_REG(hw, RCTL, rctl);
  1629. }
  1630. /**
  1631. * e1000_free_tx_resources - Free Tx Resources per Queue
  1632. * @adapter: board private structure
  1633. * @tx_ring: Tx descriptor ring for a specific queue
  1634. *
  1635. * Free all transmit software resources
  1636. **/
  1637. static void
  1638. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1639. struct e1000_tx_ring *tx_ring)
  1640. {
  1641. struct pci_dev *pdev = adapter->pdev;
  1642. e1000_clean_tx_ring(adapter, tx_ring);
  1643. vfree(tx_ring->buffer_info);
  1644. tx_ring->buffer_info = NULL;
  1645. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1646. tx_ring->desc = NULL;
  1647. }
  1648. /**
  1649. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1650. * @adapter: board private structure
  1651. *
  1652. * Free all transmit software resources
  1653. **/
  1654. void
  1655. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1656. {
  1657. int i;
  1658. for (i = 0; i < adapter->num_tx_queues; i++)
  1659. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1660. }
  1661. static void
  1662. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1663. struct e1000_buffer *buffer_info)
  1664. {
  1665. if (buffer_info->dma) {
  1666. pci_unmap_page(adapter->pdev,
  1667. buffer_info->dma,
  1668. buffer_info->length,
  1669. PCI_DMA_TODEVICE);
  1670. }
  1671. if (buffer_info->skb)
  1672. dev_kfree_skb_any(buffer_info->skb);
  1673. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1674. }
  1675. /**
  1676. * e1000_clean_tx_ring - Free Tx Buffers
  1677. * @adapter: board private structure
  1678. * @tx_ring: ring to be cleaned
  1679. **/
  1680. static void
  1681. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1682. struct e1000_tx_ring *tx_ring)
  1683. {
  1684. struct e1000_buffer *buffer_info;
  1685. unsigned long size;
  1686. unsigned int i;
  1687. /* Free all the Tx ring sk_buffs */
  1688. for (i = 0; i < tx_ring->count; i++) {
  1689. buffer_info = &tx_ring->buffer_info[i];
  1690. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1691. }
  1692. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1693. memset(tx_ring->buffer_info, 0, size);
  1694. /* Zero out the descriptor ring */
  1695. memset(tx_ring->desc, 0, tx_ring->size);
  1696. tx_ring->next_to_use = 0;
  1697. tx_ring->next_to_clean = 0;
  1698. tx_ring->last_tx_tso = 0;
  1699. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1700. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1701. }
  1702. /**
  1703. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1704. * @adapter: board private structure
  1705. **/
  1706. static void
  1707. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1708. {
  1709. int i;
  1710. for (i = 0; i < adapter->num_tx_queues; i++)
  1711. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1712. }
  1713. /**
  1714. * e1000_free_rx_resources - Free Rx Resources
  1715. * @adapter: board private structure
  1716. * @rx_ring: ring to clean the resources from
  1717. *
  1718. * Free all receive software resources
  1719. **/
  1720. static void
  1721. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1722. struct e1000_rx_ring *rx_ring)
  1723. {
  1724. struct pci_dev *pdev = adapter->pdev;
  1725. e1000_clean_rx_ring(adapter, rx_ring);
  1726. vfree(rx_ring->buffer_info);
  1727. rx_ring->buffer_info = NULL;
  1728. kfree(rx_ring->ps_page);
  1729. rx_ring->ps_page = NULL;
  1730. kfree(rx_ring->ps_page_dma);
  1731. rx_ring->ps_page_dma = NULL;
  1732. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1733. rx_ring->desc = NULL;
  1734. }
  1735. /**
  1736. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1737. * @adapter: board private structure
  1738. *
  1739. * Free all receive software resources
  1740. **/
  1741. void
  1742. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1743. {
  1744. int i;
  1745. for (i = 0; i < adapter->num_rx_queues; i++)
  1746. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1747. }
  1748. /**
  1749. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1750. * @adapter: board private structure
  1751. * @rx_ring: ring to free buffers from
  1752. **/
  1753. static void
  1754. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1755. struct e1000_rx_ring *rx_ring)
  1756. {
  1757. struct e1000_buffer *buffer_info;
  1758. struct e1000_ps_page *ps_page;
  1759. struct e1000_ps_page_dma *ps_page_dma;
  1760. struct pci_dev *pdev = adapter->pdev;
  1761. unsigned long size;
  1762. unsigned int i, j;
  1763. /* Free all the Rx ring sk_buffs */
  1764. for (i = 0; i < rx_ring->count; i++) {
  1765. buffer_info = &rx_ring->buffer_info[i];
  1766. if (buffer_info->skb) {
  1767. pci_unmap_single(pdev,
  1768. buffer_info->dma,
  1769. buffer_info->length,
  1770. PCI_DMA_FROMDEVICE);
  1771. dev_kfree_skb(buffer_info->skb);
  1772. buffer_info->skb = NULL;
  1773. }
  1774. ps_page = &rx_ring->ps_page[i];
  1775. ps_page_dma = &rx_ring->ps_page_dma[i];
  1776. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1777. if (!ps_page->ps_page[j]) break;
  1778. pci_unmap_page(pdev,
  1779. ps_page_dma->ps_page_dma[j],
  1780. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1781. ps_page_dma->ps_page_dma[j] = 0;
  1782. put_page(ps_page->ps_page[j]);
  1783. ps_page->ps_page[j] = NULL;
  1784. }
  1785. }
  1786. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1787. memset(rx_ring->buffer_info, 0, size);
  1788. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1789. memset(rx_ring->ps_page, 0, size);
  1790. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1791. memset(rx_ring->ps_page_dma, 0, size);
  1792. /* Zero out the descriptor ring */
  1793. memset(rx_ring->desc, 0, rx_ring->size);
  1794. rx_ring->next_to_clean = 0;
  1795. rx_ring->next_to_use = 0;
  1796. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1797. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1798. }
  1799. /**
  1800. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1801. * @adapter: board private structure
  1802. **/
  1803. static void
  1804. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1805. {
  1806. int i;
  1807. for (i = 0; i < adapter->num_rx_queues; i++)
  1808. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1809. }
  1810. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1811. * and memory write and invalidate disabled for certain operations
  1812. */
  1813. static void
  1814. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1815. {
  1816. struct net_device *netdev = adapter->netdev;
  1817. uint32_t rctl;
  1818. e1000_pci_clear_mwi(&adapter->hw);
  1819. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1820. rctl |= E1000_RCTL_RST;
  1821. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1822. E1000_WRITE_FLUSH(&adapter->hw);
  1823. mdelay(5);
  1824. if (netif_running(netdev))
  1825. e1000_clean_all_rx_rings(adapter);
  1826. }
  1827. static void
  1828. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1829. {
  1830. struct net_device *netdev = adapter->netdev;
  1831. uint32_t rctl;
  1832. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1833. rctl &= ~E1000_RCTL_RST;
  1834. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1835. E1000_WRITE_FLUSH(&adapter->hw);
  1836. mdelay(5);
  1837. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1838. e1000_pci_set_mwi(&adapter->hw);
  1839. if (netif_running(netdev)) {
  1840. /* No need to loop, because 82542 supports only 1 queue */
  1841. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1842. e1000_configure_rx(adapter);
  1843. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1844. }
  1845. }
  1846. /**
  1847. * e1000_set_mac - Change the Ethernet Address of the NIC
  1848. * @netdev: network interface device structure
  1849. * @p: pointer to an address structure
  1850. *
  1851. * Returns 0 on success, negative on failure
  1852. **/
  1853. static int
  1854. e1000_set_mac(struct net_device *netdev, void *p)
  1855. {
  1856. struct e1000_adapter *adapter = netdev_priv(netdev);
  1857. struct sockaddr *addr = p;
  1858. if (!is_valid_ether_addr(addr->sa_data))
  1859. return -EADDRNOTAVAIL;
  1860. /* 82542 2.0 needs to be in reset to write receive address registers */
  1861. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1862. e1000_enter_82542_rst(adapter);
  1863. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1864. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1865. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1866. /* With 82571 controllers, LAA may be overwritten (with the default)
  1867. * due to controller reset from the other port. */
  1868. if (adapter->hw.mac_type == e1000_82571) {
  1869. /* activate the work around */
  1870. adapter->hw.laa_is_present = 1;
  1871. /* Hold a copy of the LAA in RAR[14] This is done so that
  1872. * between the time RAR[0] gets clobbered and the time it
  1873. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1874. * of the RARs and no incoming packets directed to this port
  1875. * are dropped. Eventaully the LAA will be in RAR[0] and
  1876. * RAR[14] */
  1877. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1878. E1000_RAR_ENTRIES - 1);
  1879. }
  1880. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1881. e1000_leave_82542_rst(adapter);
  1882. return 0;
  1883. }
  1884. /**
  1885. * e1000_set_multi - Multicast and Promiscuous mode set
  1886. * @netdev: network interface device structure
  1887. *
  1888. * The set_multi entry point is called whenever the multicast address
  1889. * list or the network interface flags are updated. This routine is
  1890. * responsible for configuring the hardware for proper multicast,
  1891. * promiscuous mode, and all-multi behavior.
  1892. **/
  1893. static void
  1894. e1000_set_multi(struct net_device *netdev)
  1895. {
  1896. struct e1000_adapter *adapter = netdev_priv(netdev);
  1897. struct e1000_hw *hw = &adapter->hw;
  1898. struct dev_mc_list *mc_ptr;
  1899. uint32_t rctl;
  1900. uint32_t hash_value;
  1901. int i, rar_entries = E1000_RAR_ENTRIES;
  1902. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1903. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1904. E1000_NUM_MTA_REGISTERS;
  1905. if (adapter->hw.mac_type == e1000_ich8lan)
  1906. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1907. /* reserve RAR[14] for LAA over-write work-around */
  1908. if (adapter->hw.mac_type == e1000_82571)
  1909. rar_entries--;
  1910. /* Check for Promiscuous and All Multicast modes */
  1911. rctl = E1000_READ_REG(hw, RCTL);
  1912. if (netdev->flags & IFF_PROMISC) {
  1913. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1914. } else if (netdev->flags & IFF_ALLMULTI) {
  1915. rctl |= E1000_RCTL_MPE;
  1916. rctl &= ~E1000_RCTL_UPE;
  1917. } else {
  1918. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1919. }
  1920. E1000_WRITE_REG(hw, RCTL, rctl);
  1921. /* 82542 2.0 needs to be in reset to write receive address registers */
  1922. if (hw->mac_type == e1000_82542_rev2_0)
  1923. e1000_enter_82542_rst(adapter);
  1924. /* load the first 14 multicast address into the exact filters 1-14
  1925. * RAR 0 is used for the station MAC adddress
  1926. * if there are not 14 addresses, go ahead and clear the filters
  1927. * -- with 82571 controllers only 0-13 entries are filled here
  1928. */
  1929. mc_ptr = netdev->mc_list;
  1930. for (i = 1; i < rar_entries; i++) {
  1931. if (mc_ptr) {
  1932. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1933. mc_ptr = mc_ptr->next;
  1934. } else {
  1935. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1936. E1000_WRITE_FLUSH(hw);
  1937. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1938. E1000_WRITE_FLUSH(hw);
  1939. }
  1940. }
  1941. /* clear the old settings from the multicast hash table */
  1942. for (i = 0; i < mta_reg_count; i++) {
  1943. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1944. E1000_WRITE_FLUSH(hw);
  1945. }
  1946. /* load any remaining addresses into the hash table */
  1947. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1948. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1949. e1000_mta_set(hw, hash_value);
  1950. }
  1951. if (hw->mac_type == e1000_82542_rev2_0)
  1952. e1000_leave_82542_rst(adapter);
  1953. }
  1954. /* Need to wait a few seconds after link up to get diagnostic information from
  1955. * the phy */
  1956. static void
  1957. e1000_update_phy_info(unsigned long data)
  1958. {
  1959. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1960. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1961. }
  1962. /**
  1963. * e1000_82547_tx_fifo_stall - Timer Call-back
  1964. * @data: pointer to adapter cast into an unsigned long
  1965. **/
  1966. static void
  1967. e1000_82547_tx_fifo_stall(unsigned long data)
  1968. {
  1969. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1970. struct net_device *netdev = adapter->netdev;
  1971. uint32_t tctl;
  1972. if (atomic_read(&adapter->tx_fifo_stall)) {
  1973. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1974. E1000_READ_REG(&adapter->hw, TDH)) &&
  1975. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1976. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1977. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1978. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1979. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1980. E1000_WRITE_REG(&adapter->hw, TCTL,
  1981. tctl & ~E1000_TCTL_EN);
  1982. E1000_WRITE_REG(&adapter->hw, TDFT,
  1983. adapter->tx_head_addr);
  1984. E1000_WRITE_REG(&adapter->hw, TDFH,
  1985. adapter->tx_head_addr);
  1986. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1987. adapter->tx_head_addr);
  1988. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1989. adapter->tx_head_addr);
  1990. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1991. E1000_WRITE_FLUSH(&adapter->hw);
  1992. adapter->tx_fifo_head = 0;
  1993. atomic_set(&adapter->tx_fifo_stall, 0);
  1994. netif_wake_queue(netdev);
  1995. } else {
  1996. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1997. }
  1998. }
  1999. }
  2000. /**
  2001. * e1000_watchdog - Timer Call-back
  2002. * @data: pointer to adapter cast into an unsigned long
  2003. **/
  2004. static void
  2005. e1000_watchdog(unsigned long data)
  2006. {
  2007. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2008. struct net_device *netdev = adapter->netdev;
  2009. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2010. uint32_t link, tctl;
  2011. int32_t ret_val;
  2012. ret_val = e1000_check_for_link(&adapter->hw);
  2013. if ((ret_val == E1000_ERR_PHY) &&
  2014. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  2015. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  2016. /* See e1000_kumeran_lock_loss_workaround() */
  2017. DPRINTK(LINK, INFO,
  2018. "Gigabit has been disabled, downgrading speed\n");
  2019. }
  2020. if (adapter->hw.mac_type == e1000_82573) {
  2021. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2022. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2023. e1000_update_mng_vlan(adapter);
  2024. }
  2025. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2026. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2027. link = !adapter->hw.serdes_link_down;
  2028. else
  2029. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2030. if (link) {
  2031. if (!netif_carrier_ok(netdev)) {
  2032. boolean_t txb2b = 1;
  2033. e1000_get_speed_and_duplex(&adapter->hw,
  2034. &adapter->link_speed,
  2035. &adapter->link_duplex);
  2036. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2037. adapter->link_speed,
  2038. adapter->link_duplex == FULL_DUPLEX ?
  2039. "Full Duplex" : "Half Duplex");
  2040. /* tweak tx_queue_len according to speed/duplex
  2041. * and adjust the timeout factor */
  2042. netdev->tx_queue_len = adapter->tx_queue_len;
  2043. adapter->tx_timeout_factor = 1;
  2044. switch (adapter->link_speed) {
  2045. case SPEED_10:
  2046. txb2b = 0;
  2047. netdev->tx_queue_len = 10;
  2048. adapter->tx_timeout_factor = 8;
  2049. break;
  2050. case SPEED_100:
  2051. txb2b = 0;
  2052. netdev->tx_queue_len = 100;
  2053. /* maybe add some timeout factor ? */
  2054. break;
  2055. }
  2056. if ((adapter->hw.mac_type == e1000_82571 ||
  2057. adapter->hw.mac_type == e1000_82572) &&
  2058. txb2b == 0) {
  2059. #define SPEED_MODE_BIT (1 << 21)
  2060. uint32_t tarc0;
  2061. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2062. tarc0 &= ~SPEED_MODE_BIT;
  2063. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2064. }
  2065. #ifdef NETIF_F_TSO
  2066. /* disable TSO for pcie and 10/100 speeds, to avoid
  2067. * some hardware issues */
  2068. if (!adapter->tso_force &&
  2069. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2070. switch (adapter->link_speed) {
  2071. case SPEED_10:
  2072. case SPEED_100:
  2073. DPRINTK(PROBE,INFO,
  2074. "10/100 speed: disabling TSO\n");
  2075. netdev->features &= ~NETIF_F_TSO;
  2076. break;
  2077. case SPEED_1000:
  2078. netdev->features |= NETIF_F_TSO;
  2079. break;
  2080. default:
  2081. /* oops */
  2082. break;
  2083. }
  2084. }
  2085. #endif
  2086. /* enable transmits in the hardware, need to do this
  2087. * after setting TARC0 */
  2088. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2089. tctl |= E1000_TCTL_EN;
  2090. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2091. netif_carrier_on(netdev);
  2092. netif_wake_queue(netdev);
  2093. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2094. adapter->smartspeed = 0;
  2095. }
  2096. } else {
  2097. if (netif_carrier_ok(netdev)) {
  2098. adapter->link_speed = 0;
  2099. adapter->link_duplex = 0;
  2100. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2101. netif_carrier_off(netdev);
  2102. netif_stop_queue(netdev);
  2103. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2104. /* 80003ES2LAN workaround--
  2105. * For packet buffer work-around on link down event;
  2106. * disable receives in the ISR and
  2107. * reset device here in the watchdog
  2108. */
  2109. if (adapter->hw.mac_type == e1000_80003es2lan)
  2110. /* reset device */
  2111. schedule_work(&adapter->reset_task);
  2112. }
  2113. e1000_smartspeed(adapter);
  2114. }
  2115. e1000_update_stats(adapter);
  2116. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2117. adapter->tpt_old = adapter->stats.tpt;
  2118. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2119. adapter->colc_old = adapter->stats.colc;
  2120. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2121. adapter->gorcl_old = adapter->stats.gorcl;
  2122. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2123. adapter->gotcl_old = adapter->stats.gotcl;
  2124. e1000_update_adaptive(&adapter->hw);
  2125. if (!netif_carrier_ok(netdev)) {
  2126. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2127. /* We've lost link, so the controller stops DMA,
  2128. * but we've got queued Tx work that's never going
  2129. * to get done, so reset controller to flush Tx.
  2130. * (Do the reset outside of interrupt context). */
  2131. adapter->tx_timeout_count++;
  2132. schedule_work(&adapter->reset_task);
  2133. }
  2134. }
  2135. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2136. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2137. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2138. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2139. * else is between 2000-8000. */
  2140. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2141. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2142. adapter->gotcl - adapter->gorcl :
  2143. adapter->gorcl - adapter->gotcl) / 10000;
  2144. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2145. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2146. }
  2147. /* Cause software interrupt to ensure rx ring is cleaned */
  2148. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2149. /* Force detection of hung controller every watchdog period */
  2150. adapter->detect_tx_hung = TRUE;
  2151. /* With 82571 controllers, LAA may be overwritten due to controller
  2152. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2153. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2154. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2155. /* Reset the timer */
  2156. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2157. }
  2158. #define E1000_TX_FLAGS_CSUM 0x00000001
  2159. #define E1000_TX_FLAGS_VLAN 0x00000002
  2160. #define E1000_TX_FLAGS_TSO 0x00000004
  2161. #define E1000_TX_FLAGS_IPV4 0x00000008
  2162. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2163. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2164. static int
  2165. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2166. struct sk_buff *skb)
  2167. {
  2168. #ifdef NETIF_F_TSO
  2169. struct e1000_context_desc *context_desc;
  2170. struct e1000_buffer *buffer_info;
  2171. unsigned int i;
  2172. uint32_t cmd_length = 0;
  2173. uint16_t ipcse = 0, tucse, mss;
  2174. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2175. int err;
  2176. if (skb_is_gso(skb)) {
  2177. if (skb_header_cloned(skb)) {
  2178. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2179. if (err)
  2180. return err;
  2181. }
  2182. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2183. mss = skb_shinfo(skb)->gso_size;
  2184. if (skb->protocol == htons(ETH_P_IP)) {
  2185. skb->nh.iph->tot_len = 0;
  2186. skb->nh.iph->check = 0;
  2187. skb->h.th->check =
  2188. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2189. skb->nh.iph->daddr,
  2190. 0,
  2191. IPPROTO_TCP,
  2192. 0);
  2193. cmd_length = E1000_TXD_CMD_IP;
  2194. ipcse = skb->h.raw - skb->data - 1;
  2195. #ifdef NETIF_F_TSO_IPV6
  2196. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2197. skb->nh.ipv6h->payload_len = 0;
  2198. skb->h.th->check =
  2199. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2200. &skb->nh.ipv6h->daddr,
  2201. 0,
  2202. IPPROTO_TCP,
  2203. 0);
  2204. ipcse = 0;
  2205. #endif
  2206. }
  2207. ipcss = skb->nh.raw - skb->data;
  2208. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2209. tucss = skb->h.raw - skb->data;
  2210. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2211. tucse = 0;
  2212. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2213. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2214. i = tx_ring->next_to_use;
  2215. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2216. buffer_info = &tx_ring->buffer_info[i];
  2217. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2218. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2219. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2220. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2221. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2222. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2223. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2224. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2225. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2226. buffer_info->time_stamp = jiffies;
  2227. if (++i == tx_ring->count) i = 0;
  2228. tx_ring->next_to_use = i;
  2229. return TRUE;
  2230. }
  2231. #endif
  2232. return FALSE;
  2233. }
  2234. static boolean_t
  2235. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2236. struct sk_buff *skb)
  2237. {
  2238. struct e1000_context_desc *context_desc;
  2239. struct e1000_buffer *buffer_info;
  2240. unsigned int i;
  2241. uint8_t css;
  2242. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  2243. css = skb->h.raw - skb->data;
  2244. i = tx_ring->next_to_use;
  2245. buffer_info = &tx_ring->buffer_info[i];
  2246. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2247. context_desc->upper_setup.tcp_fields.tucss = css;
  2248. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2249. context_desc->upper_setup.tcp_fields.tucse = 0;
  2250. context_desc->tcp_seg_setup.data = 0;
  2251. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2252. buffer_info->time_stamp = jiffies;
  2253. if (unlikely(++i == tx_ring->count)) i = 0;
  2254. tx_ring->next_to_use = i;
  2255. return TRUE;
  2256. }
  2257. return FALSE;
  2258. }
  2259. #define E1000_MAX_TXD_PWR 12
  2260. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2261. static int
  2262. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2263. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2264. unsigned int nr_frags, unsigned int mss)
  2265. {
  2266. struct e1000_buffer *buffer_info;
  2267. unsigned int len = skb->len;
  2268. unsigned int offset = 0, size, count = 0, i;
  2269. unsigned int f;
  2270. len -= skb->data_len;
  2271. i = tx_ring->next_to_use;
  2272. while (len) {
  2273. buffer_info = &tx_ring->buffer_info[i];
  2274. size = min(len, max_per_txd);
  2275. #ifdef NETIF_F_TSO
  2276. /* Workaround for Controller erratum --
  2277. * descriptor for non-tso packet in a linear SKB that follows a
  2278. * tso gets written back prematurely before the data is fully
  2279. * DMA'd to the controller */
  2280. if (!skb->data_len && tx_ring->last_tx_tso &&
  2281. !skb_is_gso(skb)) {
  2282. tx_ring->last_tx_tso = 0;
  2283. size -= 4;
  2284. }
  2285. /* Workaround for premature desc write-backs
  2286. * in TSO mode. Append 4-byte sentinel desc */
  2287. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2288. size -= 4;
  2289. #endif
  2290. /* work-around for errata 10 and it applies
  2291. * to all controllers in PCI-X mode
  2292. * The fix is to make sure that the first descriptor of a
  2293. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2294. */
  2295. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2296. (size > 2015) && count == 0))
  2297. size = 2015;
  2298. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2299. * terminating buffers within evenly-aligned dwords. */
  2300. if (unlikely(adapter->pcix_82544 &&
  2301. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2302. size > 4))
  2303. size -= 4;
  2304. buffer_info->length = size;
  2305. buffer_info->dma =
  2306. pci_map_single(adapter->pdev,
  2307. skb->data + offset,
  2308. size,
  2309. PCI_DMA_TODEVICE);
  2310. buffer_info->time_stamp = jiffies;
  2311. len -= size;
  2312. offset += size;
  2313. count++;
  2314. if (unlikely(++i == tx_ring->count)) i = 0;
  2315. }
  2316. for (f = 0; f < nr_frags; f++) {
  2317. struct skb_frag_struct *frag;
  2318. frag = &skb_shinfo(skb)->frags[f];
  2319. len = frag->size;
  2320. offset = frag->page_offset;
  2321. while (len) {
  2322. buffer_info = &tx_ring->buffer_info[i];
  2323. size = min(len, max_per_txd);
  2324. #ifdef NETIF_F_TSO
  2325. /* Workaround for premature desc write-backs
  2326. * in TSO mode. Append 4-byte sentinel desc */
  2327. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2328. size -= 4;
  2329. #endif
  2330. /* Workaround for potential 82544 hang in PCI-X.
  2331. * Avoid terminating buffers within evenly-aligned
  2332. * dwords. */
  2333. if (unlikely(adapter->pcix_82544 &&
  2334. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2335. size > 4))
  2336. size -= 4;
  2337. buffer_info->length = size;
  2338. buffer_info->dma =
  2339. pci_map_page(adapter->pdev,
  2340. frag->page,
  2341. offset,
  2342. size,
  2343. PCI_DMA_TODEVICE);
  2344. buffer_info->time_stamp = jiffies;
  2345. len -= size;
  2346. offset += size;
  2347. count++;
  2348. if (unlikely(++i == tx_ring->count)) i = 0;
  2349. }
  2350. }
  2351. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2352. tx_ring->buffer_info[i].skb = skb;
  2353. tx_ring->buffer_info[first].next_to_watch = i;
  2354. return count;
  2355. }
  2356. static void
  2357. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2358. int tx_flags, int count)
  2359. {
  2360. struct e1000_tx_desc *tx_desc = NULL;
  2361. struct e1000_buffer *buffer_info;
  2362. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2363. unsigned int i;
  2364. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2365. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2366. E1000_TXD_CMD_TSE;
  2367. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2368. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2369. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2370. }
  2371. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2372. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2373. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2374. }
  2375. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2376. txd_lower |= E1000_TXD_CMD_VLE;
  2377. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2378. }
  2379. i = tx_ring->next_to_use;
  2380. while (count--) {
  2381. buffer_info = &tx_ring->buffer_info[i];
  2382. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2383. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2384. tx_desc->lower.data =
  2385. cpu_to_le32(txd_lower | buffer_info->length);
  2386. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2387. if (unlikely(++i == tx_ring->count)) i = 0;
  2388. }
  2389. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2390. /* Force memory writes to complete before letting h/w
  2391. * know there are new descriptors to fetch. (Only
  2392. * applicable for weak-ordered memory model archs,
  2393. * such as IA-64). */
  2394. wmb();
  2395. tx_ring->next_to_use = i;
  2396. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2397. }
  2398. /**
  2399. * 82547 workaround to avoid controller hang in half-duplex environment.
  2400. * The workaround is to avoid queuing a large packet that would span
  2401. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2402. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2403. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2404. * to the beginning of the Tx FIFO.
  2405. **/
  2406. #define E1000_FIFO_HDR 0x10
  2407. #define E1000_82547_PAD_LEN 0x3E0
  2408. static int
  2409. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2410. {
  2411. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2412. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2413. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2414. if (adapter->link_duplex != HALF_DUPLEX)
  2415. goto no_fifo_stall_required;
  2416. if (atomic_read(&adapter->tx_fifo_stall))
  2417. return 1;
  2418. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2419. atomic_set(&adapter->tx_fifo_stall, 1);
  2420. return 1;
  2421. }
  2422. no_fifo_stall_required:
  2423. adapter->tx_fifo_head += skb_fifo_len;
  2424. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2425. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2426. return 0;
  2427. }
  2428. #define MINIMUM_DHCP_PACKET_SIZE 282
  2429. static int
  2430. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2431. {
  2432. struct e1000_hw *hw = &adapter->hw;
  2433. uint16_t length, offset;
  2434. if (vlan_tx_tag_present(skb)) {
  2435. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2436. ( adapter->hw.mng_cookie.status &
  2437. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2438. return 0;
  2439. }
  2440. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2441. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2442. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2443. const struct iphdr *ip =
  2444. (struct iphdr *)((uint8_t *)skb->data+14);
  2445. if (IPPROTO_UDP == ip->protocol) {
  2446. struct udphdr *udp =
  2447. (struct udphdr *)((uint8_t *)ip +
  2448. (ip->ihl << 2));
  2449. if (ntohs(udp->dest) == 67) {
  2450. offset = (uint8_t *)udp + 8 - skb->data;
  2451. length = skb->len - offset;
  2452. return e1000_mng_write_dhcp_info(hw,
  2453. (uint8_t *)udp + 8,
  2454. length);
  2455. }
  2456. }
  2457. }
  2458. }
  2459. return 0;
  2460. }
  2461. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2462. static int
  2463. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2464. {
  2465. struct e1000_adapter *adapter = netdev_priv(netdev);
  2466. struct e1000_tx_ring *tx_ring;
  2467. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2468. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2469. unsigned int tx_flags = 0;
  2470. unsigned int len = skb->len;
  2471. unsigned long flags;
  2472. unsigned int nr_frags = 0;
  2473. unsigned int mss = 0;
  2474. int count = 0;
  2475. int tso;
  2476. unsigned int f;
  2477. len -= skb->data_len;
  2478. tx_ring = adapter->tx_ring;
  2479. if (unlikely(skb->len <= 0)) {
  2480. dev_kfree_skb_any(skb);
  2481. return NETDEV_TX_OK;
  2482. }
  2483. #ifdef NETIF_F_TSO
  2484. mss = skb_shinfo(skb)->gso_size;
  2485. /* The controller does a simple calculation to
  2486. * make sure there is enough room in the FIFO before
  2487. * initiating the DMA for each buffer. The calc is:
  2488. * 4 = ceil(buffer len/mss). To make sure we don't
  2489. * overrun the FIFO, adjust the max buffer len if mss
  2490. * drops. */
  2491. if (mss) {
  2492. uint8_t hdr_len;
  2493. max_per_txd = min(mss << 2, max_per_txd);
  2494. max_txd_pwr = fls(max_per_txd) - 1;
  2495. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2496. * points to just header, pull a few bytes of payload from
  2497. * frags into skb->data */
  2498. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2499. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2500. switch (adapter->hw.mac_type) {
  2501. unsigned int pull_size;
  2502. case e1000_82571:
  2503. case e1000_82572:
  2504. case e1000_82573:
  2505. case e1000_ich8lan:
  2506. pull_size = min((unsigned int)4, skb->data_len);
  2507. if (!__pskb_pull_tail(skb, pull_size)) {
  2508. DPRINTK(DRV, ERR,
  2509. "__pskb_pull_tail failed.\n");
  2510. dev_kfree_skb_any(skb);
  2511. return NETDEV_TX_OK;
  2512. }
  2513. len = skb->len - skb->data_len;
  2514. break;
  2515. default:
  2516. /* do nothing */
  2517. break;
  2518. }
  2519. }
  2520. }
  2521. /* reserve a descriptor for the offload context */
  2522. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2523. count++;
  2524. count++;
  2525. #else
  2526. if (skb->ip_summed == CHECKSUM_PARTIAL)
  2527. count++;
  2528. #endif
  2529. #ifdef NETIF_F_TSO
  2530. /* Controller Erratum workaround */
  2531. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2532. count++;
  2533. #endif
  2534. count += TXD_USE_COUNT(len, max_txd_pwr);
  2535. if (adapter->pcix_82544)
  2536. count++;
  2537. /* work-around for errata 10 and it applies to all controllers
  2538. * in PCI-X mode, so add one more descriptor to the count
  2539. */
  2540. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2541. (len > 2015)))
  2542. count++;
  2543. nr_frags = skb_shinfo(skb)->nr_frags;
  2544. for (f = 0; f < nr_frags; f++)
  2545. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2546. max_txd_pwr);
  2547. if (adapter->pcix_82544)
  2548. count += nr_frags;
  2549. if (adapter->hw.tx_pkt_filtering &&
  2550. (adapter->hw.mac_type == e1000_82573))
  2551. e1000_transfer_dhcp_info(adapter, skb);
  2552. local_irq_save(flags);
  2553. if (!spin_trylock(&tx_ring->tx_lock)) {
  2554. /* Collision - tell upper layer to requeue */
  2555. local_irq_restore(flags);
  2556. return NETDEV_TX_LOCKED;
  2557. }
  2558. /* need: count + 2 desc gap to keep tail from touching
  2559. * head, otherwise try next time */
  2560. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2561. netif_stop_queue(netdev);
  2562. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2563. return NETDEV_TX_BUSY;
  2564. }
  2565. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2566. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2567. netif_stop_queue(netdev);
  2568. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2569. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2570. return NETDEV_TX_BUSY;
  2571. }
  2572. }
  2573. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2574. tx_flags |= E1000_TX_FLAGS_VLAN;
  2575. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2576. }
  2577. first = tx_ring->next_to_use;
  2578. tso = e1000_tso(adapter, tx_ring, skb);
  2579. if (tso < 0) {
  2580. dev_kfree_skb_any(skb);
  2581. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2582. return NETDEV_TX_OK;
  2583. }
  2584. if (likely(tso)) {
  2585. tx_ring->last_tx_tso = 1;
  2586. tx_flags |= E1000_TX_FLAGS_TSO;
  2587. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2588. tx_flags |= E1000_TX_FLAGS_CSUM;
  2589. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2590. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2591. * no longer assume, we must. */
  2592. if (likely(skb->protocol == htons(ETH_P_IP)))
  2593. tx_flags |= E1000_TX_FLAGS_IPV4;
  2594. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2595. e1000_tx_map(adapter, tx_ring, skb, first,
  2596. max_per_txd, nr_frags, mss));
  2597. netdev->trans_start = jiffies;
  2598. /* Make sure there is space in the ring for the next send. */
  2599. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2600. netif_stop_queue(netdev);
  2601. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2602. return NETDEV_TX_OK;
  2603. }
  2604. /**
  2605. * e1000_tx_timeout - Respond to a Tx Hang
  2606. * @netdev: network interface device structure
  2607. **/
  2608. static void
  2609. e1000_tx_timeout(struct net_device *netdev)
  2610. {
  2611. struct e1000_adapter *adapter = netdev_priv(netdev);
  2612. /* Do the reset outside of interrupt context */
  2613. adapter->tx_timeout_count++;
  2614. schedule_work(&adapter->reset_task);
  2615. }
  2616. static void
  2617. e1000_reset_task(struct net_device *netdev)
  2618. {
  2619. struct e1000_adapter *adapter = netdev_priv(netdev);
  2620. e1000_reinit_locked(adapter);
  2621. }
  2622. /**
  2623. * e1000_get_stats - Get System Network Statistics
  2624. * @netdev: network interface device structure
  2625. *
  2626. * Returns the address of the device statistics structure.
  2627. * The statistics are actually updated from the timer callback.
  2628. **/
  2629. static struct net_device_stats *
  2630. e1000_get_stats(struct net_device *netdev)
  2631. {
  2632. struct e1000_adapter *adapter = netdev_priv(netdev);
  2633. /* only return the current stats */
  2634. return &adapter->net_stats;
  2635. }
  2636. /**
  2637. * e1000_change_mtu - Change the Maximum Transfer Unit
  2638. * @netdev: network interface device structure
  2639. * @new_mtu: new value for maximum frame size
  2640. *
  2641. * Returns 0 on success, negative on failure
  2642. **/
  2643. static int
  2644. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2645. {
  2646. struct e1000_adapter *adapter = netdev_priv(netdev);
  2647. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2648. uint16_t eeprom_data = 0;
  2649. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2650. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2651. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2652. return -EINVAL;
  2653. }
  2654. /* Adapter-specific max frame size limits. */
  2655. switch (adapter->hw.mac_type) {
  2656. case e1000_undefined ... e1000_82542_rev2_1:
  2657. case e1000_ich8lan:
  2658. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2659. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2660. return -EINVAL;
  2661. }
  2662. break;
  2663. case e1000_82573:
  2664. /* only enable jumbo frames if ASPM is disabled completely
  2665. * this means both bits must be zero in 0x1A bits 3:2 */
  2666. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2667. &eeprom_data);
  2668. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2669. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2670. DPRINTK(PROBE, ERR,
  2671. "Jumbo Frames not supported.\n");
  2672. return -EINVAL;
  2673. }
  2674. break;
  2675. }
  2676. /* fall through to get support */
  2677. case e1000_82571:
  2678. case e1000_82572:
  2679. case e1000_80003es2lan:
  2680. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2681. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2682. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2683. return -EINVAL;
  2684. }
  2685. break;
  2686. default:
  2687. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2688. break;
  2689. }
  2690. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2691. * means we reserve 2 more, this pushes us to allocate from the next
  2692. * larger slab size
  2693. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2694. if (max_frame <= E1000_RXBUFFER_256)
  2695. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2696. else if (max_frame <= E1000_RXBUFFER_512)
  2697. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2698. else if (max_frame <= E1000_RXBUFFER_1024)
  2699. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2700. else if (max_frame <= E1000_RXBUFFER_2048)
  2701. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2702. else if (max_frame <= E1000_RXBUFFER_4096)
  2703. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2704. else if (max_frame <= E1000_RXBUFFER_8192)
  2705. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2706. else if (max_frame <= E1000_RXBUFFER_16384)
  2707. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2708. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2709. if (!adapter->hw.tbi_compatibility_on &&
  2710. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2711. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2712. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2713. netdev->mtu = new_mtu;
  2714. if (netif_running(netdev))
  2715. e1000_reinit_locked(adapter);
  2716. adapter->hw.max_frame_size = max_frame;
  2717. return 0;
  2718. }
  2719. /**
  2720. * e1000_update_stats - Update the board statistics counters
  2721. * @adapter: board private structure
  2722. **/
  2723. void
  2724. e1000_update_stats(struct e1000_adapter *adapter)
  2725. {
  2726. struct e1000_hw *hw = &adapter->hw;
  2727. struct pci_dev *pdev = adapter->pdev;
  2728. unsigned long flags;
  2729. uint16_t phy_tmp;
  2730. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2731. /*
  2732. * Prevent stats update while adapter is being reset, or if the pci
  2733. * connection is down.
  2734. */
  2735. if (adapter->link_speed == 0)
  2736. return;
  2737. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2738. return;
  2739. spin_lock_irqsave(&adapter->stats_lock, flags);
  2740. /* these counters are modified from e1000_adjust_tbi_stats,
  2741. * called from the interrupt context, so they must only
  2742. * be written while holding adapter->stats_lock
  2743. */
  2744. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2745. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2746. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2747. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2748. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2749. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2750. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2751. if (adapter->hw.mac_type != e1000_ich8lan) {
  2752. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2753. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2754. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2755. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2756. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2757. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2758. }
  2759. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2760. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2761. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2762. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2763. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2764. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2765. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2766. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2767. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2768. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2769. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2770. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2771. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2772. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2773. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2774. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2775. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2776. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2777. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2778. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2779. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2780. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2781. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2782. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2783. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2784. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2785. if (adapter->hw.mac_type != e1000_ich8lan) {
  2786. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2787. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2788. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2789. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2790. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2791. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2792. }
  2793. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2794. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2795. /* used for adaptive IFS */
  2796. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2797. adapter->stats.tpt += hw->tx_packet_delta;
  2798. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2799. adapter->stats.colc += hw->collision_delta;
  2800. if (hw->mac_type >= e1000_82543) {
  2801. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2802. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2803. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2804. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2805. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2806. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2807. }
  2808. if (hw->mac_type > e1000_82547_rev_2) {
  2809. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2810. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2811. if (adapter->hw.mac_type != e1000_ich8lan) {
  2812. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2813. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2814. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2815. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2816. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2817. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2818. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2819. }
  2820. }
  2821. /* Fill out the OS statistics structure */
  2822. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2823. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2824. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2825. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2826. adapter->net_stats.multicast = adapter->stats.mprc;
  2827. adapter->net_stats.collisions = adapter->stats.colc;
  2828. /* Rx Errors */
  2829. /* RLEC on some newer hardware can be incorrect so build
  2830. * our own version based on RUC and ROC */
  2831. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2832. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2833. adapter->stats.ruc + adapter->stats.roc +
  2834. adapter->stats.cexterr;
  2835. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2836. adapter->stats.roc;
  2837. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2838. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2839. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2840. /* Tx Errors */
  2841. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2842. adapter->stats.latecol;
  2843. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2844. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2845. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2846. /* Tx Dropped needs to be maintained elsewhere */
  2847. /* Phy Stats */
  2848. if (hw->media_type == e1000_media_type_copper) {
  2849. if ((adapter->link_speed == SPEED_1000) &&
  2850. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2851. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2852. adapter->phy_stats.idle_errors += phy_tmp;
  2853. }
  2854. if ((hw->mac_type <= e1000_82546) &&
  2855. (hw->phy_type == e1000_phy_m88) &&
  2856. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2857. adapter->phy_stats.receive_errors += phy_tmp;
  2858. }
  2859. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2860. }
  2861. /**
  2862. * e1000_intr - Interrupt Handler
  2863. * @irq: interrupt number
  2864. * @data: pointer to a network interface device structure
  2865. * @pt_regs: CPU registers structure
  2866. **/
  2867. static irqreturn_t
  2868. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2869. {
  2870. struct net_device *netdev = data;
  2871. struct e1000_adapter *adapter = netdev_priv(netdev);
  2872. struct e1000_hw *hw = &adapter->hw;
  2873. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2874. #ifndef CONFIG_E1000_NAPI
  2875. int i;
  2876. #else
  2877. /* Interrupt Auto-Mask...upon reading ICR,
  2878. * interrupts are masked. No need for the
  2879. * IMC write, but it does mean we should
  2880. * account for it ASAP. */
  2881. if (likely(hw->mac_type >= e1000_82571))
  2882. atomic_inc(&adapter->irq_sem);
  2883. #endif
  2884. if (unlikely(!icr)) {
  2885. #ifdef CONFIG_E1000_NAPI
  2886. if (hw->mac_type >= e1000_82571)
  2887. e1000_irq_enable(adapter);
  2888. #endif
  2889. return IRQ_NONE; /* Not our interrupt */
  2890. }
  2891. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2892. hw->get_link_status = 1;
  2893. /* 80003ES2LAN workaround--
  2894. * For packet buffer work-around on link down event;
  2895. * disable receives here in the ISR and
  2896. * reset adapter in watchdog
  2897. */
  2898. if (netif_carrier_ok(netdev) &&
  2899. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2900. /* disable receives */
  2901. rctl = E1000_READ_REG(hw, RCTL);
  2902. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2903. }
  2904. mod_timer(&adapter->watchdog_timer, jiffies);
  2905. }
  2906. #ifdef CONFIG_E1000_NAPI
  2907. if (unlikely(hw->mac_type < e1000_82571)) {
  2908. atomic_inc(&adapter->irq_sem);
  2909. E1000_WRITE_REG(hw, IMC, ~0);
  2910. E1000_WRITE_FLUSH(hw);
  2911. }
  2912. if (likely(netif_rx_schedule_prep(netdev)))
  2913. __netif_rx_schedule(netdev);
  2914. else
  2915. e1000_irq_enable(adapter);
  2916. #else
  2917. /* Writing IMC and IMS is needed for 82547.
  2918. * Due to Hub Link bus being occupied, an interrupt
  2919. * de-assertion message is not able to be sent.
  2920. * When an interrupt assertion message is generated later,
  2921. * two messages are re-ordered and sent out.
  2922. * That causes APIC to think 82547 is in de-assertion
  2923. * state, while 82547 is in assertion state, resulting
  2924. * in dead lock. Writing IMC forces 82547 into
  2925. * de-assertion state.
  2926. */
  2927. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2928. atomic_inc(&adapter->irq_sem);
  2929. E1000_WRITE_REG(hw, IMC, ~0);
  2930. }
  2931. for (i = 0; i < E1000_MAX_INTR; i++)
  2932. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2933. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2934. break;
  2935. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2936. e1000_irq_enable(adapter);
  2937. #endif
  2938. return IRQ_HANDLED;
  2939. }
  2940. #ifdef CONFIG_E1000_NAPI
  2941. /**
  2942. * e1000_clean - NAPI Rx polling callback
  2943. * @adapter: board private structure
  2944. **/
  2945. static int
  2946. e1000_clean(struct net_device *poll_dev, int *budget)
  2947. {
  2948. struct e1000_adapter *adapter;
  2949. int work_to_do = min(*budget, poll_dev->quota);
  2950. int tx_cleaned = 0, work_done = 0;
  2951. /* Must NOT use netdev_priv macro here. */
  2952. adapter = poll_dev->priv;
  2953. /* Keep link state information with original netdev */
  2954. if (!netif_carrier_ok(poll_dev))
  2955. goto quit_polling;
  2956. /* e1000_clean is called per-cpu. This lock protects
  2957. * tx_ring[0] from being cleaned by multiple cpus
  2958. * simultaneously. A failure obtaining the lock means
  2959. * tx_ring[0] is currently being cleaned anyway. */
  2960. if (spin_trylock(&adapter->tx_queue_lock)) {
  2961. tx_cleaned = e1000_clean_tx_irq(adapter,
  2962. &adapter->tx_ring[0]);
  2963. spin_unlock(&adapter->tx_queue_lock);
  2964. }
  2965. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2966. &work_done, work_to_do);
  2967. *budget -= work_done;
  2968. poll_dev->quota -= work_done;
  2969. /* If no Tx and not enough Rx work done, exit the polling mode */
  2970. if ((!tx_cleaned && (work_done == 0)) ||
  2971. !netif_running(poll_dev)) {
  2972. quit_polling:
  2973. netif_rx_complete(poll_dev);
  2974. e1000_irq_enable(adapter);
  2975. return 0;
  2976. }
  2977. return 1;
  2978. }
  2979. #endif
  2980. /**
  2981. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2982. * @adapter: board private structure
  2983. **/
  2984. static boolean_t
  2985. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2986. struct e1000_tx_ring *tx_ring)
  2987. {
  2988. struct net_device *netdev = adapter->netdev;
  2989. struct e1000_tx_desc *tx_desc, *eop_desc;
  2990. struct e1000_buffer *buffer_info;
  2991. unsigned int i, eop;
  2992. #ifdef CONFIG_E1000_NAPI
  2993. unsigned int count = 0;
  2994. #endif
  2995. boolean_t cleaned = FALSE;
  2996. i = tx_ring->next_to_clean;
  2997. eop = tx_ring->buffer_info[i].next_to_watch;
  2998. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2999. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  3000. for (cleaned = FALSE; !cleaned; ) {
  3001. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3002. buffer_info = &tx_ring->buffer_info[i];
  3003. cleaned = (i == eop);
  3004. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3005. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  3006. if (unlikely(++i == tx_ring->count)) i = 0;
  3007. }
  3008. eop = tx_ring->buffer_info[i].next_to_watch;
  3009. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3010. #ifdef CONFIG_E1000_NAPI
  3011. #define E1000_TX_WEIGHT 64
  3012. /* weight of a sort for tx, to avoid endless transmit cleanup */
  3013. if (count++ == E1000_TX_WEIGHT) break;
  3014. #endif
  3015. }
  3016. tx_ring->next_to_clean = i;
  3017. #define TX_WAKE_THRESHOLD 32
  3018. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  3019. netif_carrier_ok(netdev))) {
  3020. spin_lock(&tx_ring->tx_lock);
  3021. if (netif_queue_stopped(netdev) &&
  3022. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  3023. netif_wake_queue(netdev);
  3024. spin_unlock(&tx_ring->tx_lock);
  3025. }
  3026. if (adapter->detect_tx_hung) {
  3027. /* Detect a transmit hang in hardware, this serializes the
  3028. * check with the clearing of time_stamp and movement of i */
  3029. adapter->detect_tx_hung = FALSE;
  3030. if (tx_ring->buffer_info[eop].dma &&
  3031. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3032. (adapter->tx_timeout_factor * HZ))
  3033. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3034. E1000_STATUS_TXOFF)) {
  3035. /* detected Tx unit hang */
  3036. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3037. " Tx Queue <%lu>\n"
  3038. " TDH <%x>\n"
  3039. " TDT <%x>\n"
  3040. " next_to_use <%x>\n"
  3041. " next_to_clean <%x>\n"
  3042. "buffer_info[next_to_clean]\n"
  3043. " time_stamp <%lx>\n"
  3044. " next_to_watch <%x>\n"
  3045. " jiffies <%lx>\n"
  3046. " next_to_watch.status <%x>\n",
  3047. (unsigned long)((tx_ring - adapter->tx_ring) /
  3048. sizeof(struct e1000_tx_ring)),
  3049. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3050. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3051. tx_ring->next_to_use,
  3052. tx_ring->next_to_clean,
  3053. tx_ring->buffer_info[eop].time_stamp,
  3054. eop,
  3055. jiffies,
  3056. eop_desc->upper.fields.status);
  3057. netif_stop_queue(netdev);
  3058. }
  3059. }
  3060. return cleaned;
  3061. }
  3062. /**
  3063. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3064. * @adapter: board private structure
  3065. * @status_err: receive descriptor status and error fields
  3066. * @csum: receive descriptor csum field
  3067. * @sk_buff: socket buffer with received data
  3068. **/
  3069. static void
  3070. e1000_rx_checksum(struct e1000_adapter *adapter,
  3071. uint32_t status_err, uint32_t csum,
  3072. struct sk_buff *skb)
  3073. {
  3074. uint16_t status = (uint16_t)status_err;
  3075. uint8_t errors = (uint8_t)(status_err >> 24);
  3076. skb->ip_summed = CHECKSUM_NONE;
  3077. /* 82543 or newer only */
  3078. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3079. /* Ignore Checksum bit is set */
  3080. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3081. /* TCP/UDP checksum error bit is set */
  3082. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3083. /* let the stack verify checksum errors */
  3084. adapter->hw_csum_err++;
  3085. return;
  3086. }
  3087. /* TCP/UDP Checksum has not been calculated */
  3088. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3089. if (!(status & E1000_RXD_STAT_TCPCS))
  3090. return;
  3091. } else {
  3092. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3093. return;
  3094. }
  3095. /* It must be a TCP or UDP packet with a valid checksum */
  3096. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3097. /* TCP checksum is good */
  3098. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3099. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3100. /* IP fragment with UDP payload */
  3101. /* Hardware complements the payload checksum, so we undo it
  3102. * and then put the value in host order for further stack use.
  3103. */
  3104. csum = ntohl(csum ^ 0xFFFF);
  3105. skb->csum = csum;
  3106. skb->ip_summed = CHECKSUM_COMPLETE;
  3107. }
  3108. adapter->hw_csum_good++;
  3109. }
  3110. /**
  3111. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3112. * @adapter: board private structure
  3113. **/
  3114. static boolean_t
  3115. #ifdef CONFIG_E1000_NAPI
  3116. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3117. struct e1000_rx_ring *rx_ring,
  3118. int *work_done, int work_to_do)
  3119. #else
  3120. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3121. struct e1000_rx_ring *rx_ring)
  3122. #endif
  3123. {
  3124. struct net_device *netdev = adapter->netdev;
  3125. struct pci_dev *pdev = adapter->pdev;
  3126. struct e1000_rx_desc *rx_desc, *next_rxd;
  3127. struct e1000_buffer *buffer_info, *next_buffer;
  3128. unsigned long flags;
  3129. uint32_t length;
  3130. uint8_t last_byte;
  3131. unsigned int i;
  3132. int cleaned_count = 0;
  3133. boolean_t cleaned = FALSE;
  3134. i = rx_ring->next_to_clean;
  3135. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3136. buffer_info = &rx_ring->buffer_info[i];
  3137. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3138. struct sk_buff *skb;
  3139. u8 status;
  3140. #ifdef CONFIG_E1000_NAPI
  3141. if (*work_done >= work_to_do)
  3142. break;
  3143. (*work_done)++;
  3144. #endif
  3145. status = rx_desc->status;
  3146. skb = buffer_info->skb;
  3147. buffer_info->skb = NULL;
  3148. prefetch(skb->data - NET_IP_ALIGN);
  3149. if (++i == rx_ring->count) i = 0;
  3150. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3151. prefetch(next_rxd);
  3152. next_buffer = &rx_ring->buffer_info[i];
  3153. cleaned = TRUE;
  3154. cleaned_count++;
  3155. pci_unmap_single(pdev,
  3156. buffer_info->dma,
  3157. buffer_info->length,
  3158. PCI_DMA_FROMDEVICE);
  3159. length = le16_to_cpu(rx_desc->length);
  3160. /* adjust length to remove Ethernet CRC */
  3161. length -= 4;
  3162. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3163. /* All receives must fit into a single buffer */
  3164. E1000_DBG("%s: Receive packet consumed multiple"
  3165. " buffers\n", netdev->name);
  3166. /* recycle */
  3167. buffer_info->skb = skb;
  3168. goto next_desc;
  3169. }
  3170. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3171. last_byte = *(skb->data + length - 1);
  3172. if (TBI_ACCEPT(&adapter->hw, status,
  3173. rx_desc->errors, length, last_byte)) {
  3174. spin_lock_irqsave(&adapter->stats_lock, flags);
  3175. e1000_tbi_adjust_stats(&adapter->hw,
  3176. &adapter->stats,
  3177. length, skb->data);
  3178. spin_unlock_irqrestore(&adapter->stats_lock,
  3179. flags);
  3180. length--;
  3181. } else {
  3182. /* recycle */
  3183. buffer_info->skb = skb;
  3184. goto next_desc;
  3185. }
  3186. }
  3187. /* code added for copybreak, this should improve
  3188. * performance for small packets with large amounts
  3189. * of reassembly being done in the stack */
  3190. #define E1000_CB_LENGTH 256
  3191. if (length < E1000_CB_LENGTH) {
  3192. struct sk_buff *new_skb =
  3193. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3194. if (new_skb) {
  3195. skb_reserve(new_skb, NET_IP_ALIGN);
  3196. memcpy(new_skb->data - NET_IP_ALIGN,
  3197. skb->data - NET_IP_ALIGN,
  3198. length + NET_IP_ALIGN);
  3199. /* save the skb in buffer_info as good */
  3200. buffer_info->skb = skb;
  3201. skb = new_skb;
  3202. skb_put(skb, length);
  3203. }
  3204. } else
  3205. skb_put(skb, length);
  3206. /* end copybreak code */
  3207. /* Receive Checksum Offload */
  3208. e1000_rx_checksum(adapter,
  3209. (uint32_t)(status) |
  3210. ((uint32_t)(rx_desc->errors) << 24),
  3211. le16_to_cpu(rx_desc->csum), skb);
  3212. skb->protocol = eth_type_trans(skb, netdev);
  3213. #ifdef CONFIG_E1000_NAPI
  3214. if (unlikely(adapter->vlgrp &&
  3215. (status & E1000_RXD_STAT_VP))) {
  3216. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3217. le16_to_cpu(rx_desc->special) &
  3218. E1000_RXD_SPC_VLAN_MASK);
  3219. } else {
  3220. netif_receive_skb(skb);
  3221. }
  3222. #else /* CONFIG_E1000_NAPI */
  3223. if (unlikely(adapter->vlgrp &&
  3224. (status & E1000_RXD_STAT_VP))) {
  3225. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3226. le16_to_cpu(rx_desc->special) &
  3227. E1000_RXD_SPC_VLAN_MASK);
  3228. } else {
  3229. netif_rx(skb);
  3230. }
  3231. #endif /* CONFIG_E1000_NAPI */
  3232. netdev->last_rx = jiffies;
  3233. next_desc:
  3234. rx_desc->status = 0;
  3235. /* return some buffers to hardware, one at a time is too slow */
  3236. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3237. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3238. cleaned_count = 0;
  3239. }
  3240. /* use prefetched values */
  3241. rx_desc = next_rxd;
  3242. buffer_info = next_buffer;
  3243. }
  3244. rx_ring->next_to_clean = i;
  3245. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3246. if (cleaned_count)
  3247. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3248. return cleaned;
  3249. }
  3250. /**
  3251. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3252. * @adapter: board private structure
  3253. **/
  3254. static boolean_t
  3255. #ifdef CONFIG_E1000_NAPI
  3256. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3257. struct e1000_rx_ring *rx_ring,
  3258. int *work_done, int work_to_do)
  3259. #else
  3260. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3261. struct e1000_rx_ring *rx_ring)
  3262. #endif
  3263. {
  3264. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3265. struct net_device *netdev = adapter->netdev;
  3266. struct pci_dev *pdev = adapter->pdev;
  3267. struct e1000_buffer *buffer_info, *next_buffer;
  3268. struct e1000_ps_page *ps_page;
  3269. struct e1000_ps_page_dma *ps_page_dma;
  3270. struct sk_buff *skb;
  3271. unsigned int i, j;
  3272. uint32_t length, staterr;
  3273. int cleaned_count = 0;
  3274. boolean_t cleaned = FALSE;
  3275. i = rx_ring->next_to_clean;
  3276. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3277. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3278. buffer_info = &rx_ring->buffer_info[i];
  3279. while (staterr & E1000_RXD_STAT_DD) {
  3280. ps_page = &rx_ring->ps_page[i];
  3281. ps_page_dma = &rx_ring->ps_page_dma[i];
  3282. #ifdef CONFIG_E1000_NAPI
  3283. if (unlikely(*work_done >= work_to_do))
  3284. break;
  3285. (*work_done)++;
  3286. #endif
  3287. skb = buffer_info->skb;
  3288. /* in the packet split case this is header only */
  3289. prefetch(skb->data - NET_IP_ALIGN);
  3290. if (++i == rx_ring->count) i = 0;
  3291. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3292. prefetch(next_rxd);
  3293. next_buffer = &rx_ring->buffer_info[i];
  3294. cleaned = TRUE;
  3295. cleaned_count++;
  3296. pci_unmap_single(pdev, buffer_info->dma,
  3297. buffer_info->length,
  3298. PCI_DMA_FROMDEVICE);
  3299. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3300. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3301. " the full packet\n", netdev->name);
  3302. dev_kfree_skb_irq(skb);
  3303. goto next_desc;
  3304. }
  3305. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3306. dev_kfree_skb_irq(skb);
  3307. goto next_desc;
  3308. }
  3309. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3310. if (unlikely(!length)) {
  3311. E1000_DBG("%s: Last part of the packet spanning"
  3312. " multiple descriptors\n", netdev->name);
  3313. dev_kfree_skb_irq(skb);
  3314. goto next_desc;
  3315. }
  3316. /* Good Receive */
  3317. skb_put(skb, length);
  3318. {
  3319. /* this looks ugly, but it seems compiler issues make it
  3320. more efficient than reusing j */
  3321. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3322. /* page alloc/put takes too long and effects small packet
  3323. * throughput, so unsplit small packets and save the alloc/put*/
  3324. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3325. u8 *vaddr;
  3326. /* there is no documentation about how to call
  3327. * kmap_atomic, so we can't hold the mapping
  3328. * very long */
  3329. pci_dma_sync_single_for_cpu(pdev,
  3330. ps_page_dma->ps_page_dma[0],
  3331. PAGE_SIZE,
  3332. PCI_DMA_FROMDEVICE);
  3333. vaddr = kmap_atomic(ps_page->ps_page[0],
  3334. KM_SKB_DATA_SOFTIRQ);
  3335. memcpy(skb->tail, vaddr, l1);
  3336. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3337. pci_dma_sync_single_for_device(pdev,
  3338. ps_page_dma->ps_page_dma[0],
  3339. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3340. /* remove the CRC */
  3341. l1 -= 4;
  3342. skb_put(skb, l1);
  3343. goto copydone;
  3344. } /* if */
  3345. }
  3346. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3347. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3348. break;
  3349. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3350. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3351. ps_page_dma->ps_page_dma[j] = 0;
  3352. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3353. length);
  3354. ps_page->ps_page[j] = NULL;
  3355. skb->len += length;
  3356. skb->data_len += length;
  3357. skb->truesize += length;
  3358. }
  3359. /* strip the ethernet crc, problem is we're using pages now so
  3360. * this whole operation can get a little cpu intensive */
  3361. pskb_trim(skb, skb->len - 4);
  3362. copydone:
  3363. e1000_rx_checksum(adapter, staterr,
  3364. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3365. skb->protocol = eth_type_trans(skb, netdev);
  3366. if (likely(rx_desc->wb.upper.header_status &
  3367. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3368. adapter->rx_hdr_split++;
  3369. #ifdef CONFIG_E1000_NAPI
  3370. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3371. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3372. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3373. E1000_RXD_SPC_VLAN_MASK);
  3374. } else {
  3375. netif_receive_skb(skb);
  3376. }
  3377. #else /* CONFIG_E1000_NAPI */
  3378. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3379. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3380. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3381. E1000_RXD_SPC_VLAN_MASK);
  3382. } else {
  3383. netif_rx(skb);
  3384. }
  3385. #endif /* CONFIG_E1000_NAPI */
  3386. netdev->last_rx = jiffies;
  3387. next_desc:
  3388. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3389. buffer_info->skb = NULL;
  3390. /* return some buffers to hardware, one at a time is too slow */
  3391. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3392. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3393. cleaned_count = 0;
  3394. }
  3395. /* use prefetched values */
  3396. rx_desc = next_rxd;
  3397. buffer_info = next_buffer;
  3398. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3399. }
  3400. rx_ring->next_to_clean = i;
  3401. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3402. if (cleaned_count)
  3403. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3404. return cleaned;
  3405. }
  3406. /**
  3407. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3408. * @adapter: address of board private structure
  3409. **/
  3410. static void
  3411. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3412. struct e1000_rx_ring *rx_ring,
  3413. int cleaned_count)
  3414. {
  3415. struct net_device *netdev = adapter->netdev;
  3416. struct pci_dev *pdev = adapter->pdev;
  3417. struct e1000_rx_desc *rx_desc;
  3418. struct e1000_buffer *buffer_info;
  3419. struct sk_buff *skb;
  3420. unsigned int i;
  3421. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3422. i = rx_ring->next_to_use;
  3423. buffer_info = &rx_ring->buffer_info[i];
  3424. while (cleaned_count--) {
  3425. skb = buffer_info->skb;
  3426. if (skb) {
  3427. skb_trim(skb, 0);
  3428. goto map_skb;
  3429. }
  3430. skb = netdev_alloc_skb(netdev, bufsz);
  3431. if (unlikely(!skb)) {
  3432. /* Better luck next round */
  3433. adapter->alloc_rx_buff_failed++;
  3434. break;
  3435. }
  3436. /* Fix for errata 23, can't cross 64kB boundary */
  3437. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3438. struct sk_buff *oldskb = skb;
  3439. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3440. "at %p\n", bufsz, skb->data);
  3441. /* Try again, without freeing the previous */
  3442. skb = netdev_alloc_skb(netdev, bufsz);
  3443. /* Failed allocation, critical failure */
  3444. if (!skb) {
  3445. dev_kfree_skb(oldskb);
  3446. break;
  3447. }
  3448. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3449. /* give up */
  3450. dev_kfree_skb(skb);
  3451. dev_kfree_skb(oldskb);
  3452. break; /* while !buffer_info->skb */
  3453. }
  3454. /* Use new allocation */
  3455. dev_kfree_skb(oldskb);
  3456. }
  3457. /* Make buffer alignment 2 beyond a 16 byte boundary
  3458. * this will result in a 16 byte aligned IP header after
  3459. * the 14 byte MAC header is removed
  3460. */
  3461. skb_reserve(skb, NET_IP_ALIGN);
  3462. buffer_info->skb = skb;
  3463. buffer_info->length = adapter->rx_buffer_len;
  3464. map_skb:
  3465. buffer_info->dma = pci_map_single(pdev,
  3466. skb->data,
  3467. adapter->rx_buffer_len,
  3468. PCI_DMA_FROMDEVICE);
  3469. /* Fix for errata 23, can't cross 64kB boundary */
  3470. if (!e1000_check_64k_bound(adapter,
  3471. (void *)(unsigned long)buffer_info->dma,
  3472. adapter->rx_buffer_len)) {
  3473. DPRINTK(RX_ERR, ERR,
  3474. "dma align check failed: %u bytes at %p\n",
  3475. adapter->rx_buffer_len,
  3476. (void *)(unsigned long)buffer_info->dma);
  3477. dev_kfree_skb(skb);
  3478. buffer_info->skb = NULL;
  3479. pci_unmap_single(pdev, buffer_info->dma,
  3480. adapter->rx_buffer_len,
  3481. PCI_DMA_FROMDEVICE);
  3482. break; /* while !buffer_info->skb */
  3483. }
  3484. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3485. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3486. if (unlikely(++i == rx_ring->count))
  3487. i = 0;
  3488. buffer_info = &rx_ring->buffer_info[i];
  3489. }
  3490. if (likely(rx_ring->next_to_use != i)) {
  3491. rx_ring->next_to_use = i;
  3492. if (unlikely(i-- == 0))
  3493. i = (rx_ring->count - 1);
  3494. /* Force memory writes to complete before letting h/w
  3495. * know there are new descriptors to fetch. (Only
  3496. * applicable for weak-ordered memory model archs,
  3497. * such as IA-64). */
  3498. wmb();
  3499. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3500. }
  3501. }
  3502. /**
  3503. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3504. * @adapter: address of board private structure
  3505. **/
  3506. static void
  3507. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3508. struct e1000_rx_ring *rx_ring,
  3509. int cleaned_count)
  3510. {
  3511. struct net_device *netdev = adapter->netdev;
  3512. struct pci_dev *pdev = adapter->pdev;
  3513. union e1000_rx_desc_packet_split *rx_desc;
  3514. struct e1000_buffer *buffer_info;
  3515. struct e1000_ps_page *ps_page;
  3516. struct e1000_ps_page_dma *ps_page_dma;
  3517. struct sk_buff *skb;
  3518. unsigned int i, j;
  3519. i = rx_ring->next_to_use;
  3520. buffer_info = &rx_ring->buffer_info[i];
  3521. ps_page = &rx_ring->ps_page[i];
  3522. ps_page_dma = &rx_ring->ps_page_dma[i];
  3523. while (cleaned_count--) {
  3524. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3525. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3526. if (j < adapter->rx_ps_pages) {
  3527. if (likely(!ps_page->ps_page[j])) {
  3528. ps_page->ps_page[j] =
  3529. alloc_page(GFP_ATOMIC);
  3530. if (unlikely(!ps_page->ps_page[j])) {
  3531. adapter->alloc_rx_buff_failed++;
  3532. goto no_buffers;
  3533. }
  3534. ps_page_dma->ps_page_dma[j] =
  3535. pci_map_page(pdev,
  3536. ps_page->ps_page[j],
  3537. 0, PAGE_SIZE,
  3538. PCI_DMA_FROMDEVICE);
  3539. }
  3540. /* Refresh the desc even if buffer_addrs didn't
  3541. * change because each write-back erases
  3542. * this info.
  3543. */
  3544. rx_desc->read.buffer_addr[j+1] =
  3545. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3546. } else
  3547. rx_desc->read.buffer_addr[j+1] = ~0;
  3548. }
  3549. skb = netdev_alloc_skb(netdev,
  3550. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3551. if (unlikely(!skb)) {
  3552. adapter->alloc_rx_buff_failed++;
  3553. break;
  3554. }
  3555. /* Make buffer alignment 2 beyond a 16 byte boundary
  3556. * this will result in a 16 byte aligned IP header after
  3557. * the 14 byte MAC header is removed
  3558. */
  3559. skb_reserve(skb, NET_IP_ALIGN);
  3560. buffer_info->skb = skb;
  3561. buffer_info->length = adapter->rx_ps_bsize0;
  3562. buffer_info->dma = pci_map_single(pdev, skb->data,
  3563. adapter->rx_ps_bsize0,
  3564. PCI_DMA_FROMDEVICE);
  3565. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3566. if (unlikely(++i == rx_ring->count)) i = 0;
  3567. buffer_info = &rx_ring->buffer_info[i];
  3568. ps_page = &rx_ring->ps_page[i];
  3569. ps_page_dma = &rx_ring->ps_page_dma[i];
  3570. }
  3571. no_buffers:
  3572. if (likely(rx_ring->next_to_use != i)) {
  3573. rx_ring->next_to_use = i;
  3574. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3575. /* Force memory writes to complete before letting h/w
  3576. * know there are new descriptors to fetch. (Only
  3577. * applicable for weak-ordered memory model archs,
  3578. * such as IA-64). */
  3579. wmb();
  3580. /* Hardware increments by 16 bytes, but packet split
  3581. * descriptors are 32 bytes...so we increment tail
  3582. * twice as much.
  3583. */
  3584. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3585. }
  3586. }
  3587. /**
  3588. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3589. * @adapter:
  3590. **/
  3591. static void
  3592. e1000_smartspeed(struct e1000_adapter *adapter)
  3593. {
  3594. uint16_t phy_status;
  3595. uint16_t phy_ctrl;
  3596. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3597. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3598. return;
  3599. if (adapter->smartspeed == 0) {
  3600. /* If Master/Slave config fault is asserted twice,
  3601. * we assume back-to-back */
  3602. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3603. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3604. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3605. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3606. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3607. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3608. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3609. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3610. phy_ctrl);
  3611. adapter->smartspeed++;
  3612. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3613. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3614. &phy_ctrl)) {
  3615. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3616. MII_CR_RESTART_AUTO_NEG);
  3617. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3618. phy_ctrl);
  3619. }
  3620. }
  3621. return;
  3622. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3623. /* If still no link, perhaps using 2/3 pair cable */
  3624. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3625. phy_ctrl |= CR_1000T_MS_ENABLE;
  3626. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3627. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3628. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3629. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3630. MII_CR_RESTART_AUTO_NEG);
  3631. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3632. }
  3633. }
  3634. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3635. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3636. adapter->smartspeed = 0;
  3637. }
  3638. /**
  3639. * e1000_ioctl -
  3640. * @netdev:
  3641. * @ifreq:
  3642. * @cmd:
  3643. **/
  3644. static int
  3645. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3646. {
  3647. switch (cmd) {
  3648. case SIOCGMIIPHY:
  3649. case SIOCGMIIREG:
  3650. case SIOCSMIIREG:
  3651. return e1000_mii_ioctl(netdev, ifr, cmd);
  3652. default:
  3653. return -EOPNOTSUPP;
  3654. }
  3655. }
  3656. /**
  3657. * e1000_mii_ioctl -
  3658. * @netdev:
  3659. * @ifreq:
  3660. * @cmd:
  3661. **/
  3662. static int
  3663. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3664. {
  3665. struct e1000_adapter *adapter = netdev_priv(netdev);
  3666. struct mii_ioctl_data *data = if_mii(ifr);
  3667. int retval;
  3668. uint16_t mii_reg;
  3669. uint16_t spddplx;
  3670. unsigned long flags;
  3671. if (adapter->hw.media_type != e1000_media_type_copper)
  3672. return -EOPNOTSUPP;
  3673. switch (cmd) {
  3674. case SIOCGMIIPHY:
  3675. data->phy_id = adapter->hw.phy_addr;
  3676. break;
  3677. case SIOCGMIIREG:
  3678. if (!capable(CAP_NET_ADMIN))
  3679. return -EPERM;
  3680. spin_lock_irqsave(&adapter->stats_lock, flags);
  3681. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3682. &data->val_out)) {
  3683. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3684. return -EIO;
  3685. }
  3686. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3687. break;
  3688. case SIOCSMIIREG:
  3689. if (!capable(CAP_NET_ADMIN))
  3690. return -EPERM;
  3691. if (data->reg_num & ~(0x1F))
  3692. return -EFAULT;
  3693. mii_reg = data->val_in;
  3694. spin_lock_irqsave(&adapter->stats_lock, flags);
  3695. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3696. mii_reg)) {
  3697. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3698. return -EIO;
  3699. }
  3700. if (adapter->hw.media_type == e1000_media_type_copper) {
  3701. switch (data->reg_num) {
  3702. case PHY_CTRL:
  3703. if (mii_reg & MII_CR_POWER_DOWN)
  3704. break;
  3705. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3706. adapter->hw.autoneg = 1;
  3707. adapter->hw.autoneg_advertised = 0x2F;
  3708. } else {
  3709. if (mii_reg & 0x40)
  3710. spddplx = SPEED_1000;
  3711. else if (mii_reg & 0x2000)
  3712. spddplx = SPEED_100;
  3713. else
  3714. spddplx = SPEED_10;
  3715. spddplx += (mii_reg & 0x100)
  3716. ? DUPLEX_FULL :
  3717. DUPLEX_HALF;
  3718. retval = e1000_set_spd_dplx(adapter,
  3719. spddplx);
  3720. if (retval) {
  3721. spin_unlock_irqrestore(
  3722. &adapter->stats_lock,
  3723. flags);
  3724. return retval;
  3725. }
  3726. }
  3727. if (netif_running(adapter->netdev))
  3728. e1000_reinit_locked(adapter);
  3729. else
  3730. e1000_reset(adapter);
  3731. break;
  3732. case M88E1000_PHY_SPEC_CTRL:
  3733. case M88E1000_EXT_PHY_SPEC_CTRL:
  3734. if (e1000_phy_reset(&adapter->hw)) {
  3735. spin_unlock_irqrestore(
  3736. &adapter->stats_lock, flags);
  3737. return -EIO;
  3738. }
  3739. break;
  3740. }
  3741. } else {
  3742. switch (data->reg_num) {
  3743. case PHY_CTRL:
  3744. if (mii_reg & MII_CR_POWER_DOWN)
  3745. break;
  3746. if (netif_running(adapter->netdev))
  3747. e1000_reinit_locked(adapter);
  3748. else
  3749. e1000_reset(adapter);
  3750. break;
  3751. }
  3752. }
  3753. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3754. break;
  3755. default:
  3756. return -EOPNOTSUPP;
  3757. }
  3758. return E1000_SUCCESS;
  3759. }
  3760. void
  3761. e1000_pci_set_mwi(struct e1000_hw *hw)
  3762. {
  3763. struct e1000_adapter *adapter = hw->back;
  3764. int ret_val = pci_set_mwi(adapter->pdev);
  3765. if (ret_val)
  3766. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3767. }
  3768. void
  3769. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3770. {
  3771. struct e1000_adapter *adapter = hw->back;
  3772. pci_clear_mwi(adapter->pdev);
  3773. }
  3774. void
  3775. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3776. {
  3777. struct e1000_adapter *adapter = hw->back;
  3778. pci_read_config_word(adapter->pdev, reg, value);
  3779. }
  3780. void
  3781. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3782. {
  3783. struct e1000_adapter *adapter = hw->back;
  3784. pci_write_config_word(adapter->pdev, reg, *value);
  3785. }
  3786. #if 0
  3787. uint32_t
  3788. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3789. {
  3790. return inl(port);
  3791. }
  3792. #endif /* 0 */
  3793. void
  3794. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3795. {
  3796. outl(value, port);
  3797. }
  3798. static void
  3799. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3800. {
  3801. struct e1000_adapter *adapter = netdev_priv(netdev);
  3802. uint32_t ctrl, rctl;
  3803. e1000_irq_disable(adapter);
  3804. adapter->vlgrp = grp;
  3805. if (grp) {
  3806. /* enable VLAN tag insert/strip */
  3807. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3808. ctrl |= E1000_CTRL_VME;
  3809. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3810. if (adapter->hw.mac_type != e1000_ich8lan) {
  3811. /* enable VLAN receive filtering */
  3812. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3813. rctl |= E1000_RCTL_VFE;
  3814. rctl &= ~E1000_RCTL_CFIEN;
  3815. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3816. e1000_update_mng_vlan(adapter);
  3817. }
  3818. } else {
  3819. /* disable VLAN tag insert/strip */
  3820. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3821. ctrl &= ~E1000_CTRL_VME;
  3822. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3823. if (adapter->hw.mac_type != e1000_ich8lan) {
  3824. /* disable VLAN filtering */
  3825. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3826. rctl &= ~E1000_RCTL_VFE;
  3827. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3828. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3829. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3830. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3831. }
  3832. }
  3833. }
  3834. e1000_irq_enable(adapter);
  3835. }
  3836. static void
  3837. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3838. {
  3839. struct e1000_adapter *adapter = netdev_priv(netdev);
  3840. uint32_t vfta, index;
  3841. if ((adapter->hw.mng_cookie.status &
  3842. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3843. (vid == adapter->mng_vlan_id))
  3844. return;
  3845. /* add VID to filter table */
  3846. index = (vid >> 5) & 0x7F;
  3847. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3848. vfta |= (1 << (vid & 0x1F));
  3849. e1000_write_vfta(&adapter->hw, index, vfta);
  3850. }
  3851. static void
  3852. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3853. {
  3854. struct e1000_adapter *adapter = netdev_priv(netdev);
  3855. uint32_t vfta, index;
  3856. e1000_irq_disable(adapter);
  3857. if (adapter->vlgrp)
  3858. adapter->vlgrp->vlan_devices[vid] = NULL;
  3859. e1000_irq_enable(adapter);
  3860. if ((adapter->hw.mng_cookie.status &
  3861. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3862. (vid == adapter->mng_vlan_id)) {
  3863. /* release control to f/w */
  3864. e1000_release_hw_control(adapter);
  3865. return;
  3866. }
  3867. /* remove VID from filter table */
  3868. index = (vid >> 5) & 0x7F;
  3869. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3870. vfta &= ~(1 << (vid & 0x1F));
  3871. e1000_write_vfta(&adapter->hw, index, vfta);
  3872. }
  3873. static void
  3874. e1000_restore_vlan(struct e1000_adapter *adapter)
  3875. {
  3876. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3877. if (adapter->vlgrp) {
  3878. uint16_t vid;
  3879. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3880. if (!adapter->vlgrp->vlan_devices[vid])
  3881. continue;
  3882. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3883. }
  3884. }
  3885. }
  3886. int
  3887. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3888. {
  3889. adapter->hw.autoneg = 0;
  3890. /* Fiber NICs only allow 1000 gbps Full duplex */
  3891. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3892. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3893. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3894. return -EINVAL;
  3895. }
  3896. switch (spddplx) {
  3897. case SPEED_10 + DUPLEX_HALF:
  3898. adapter->hw.forced_speed_duplex = e1000_10_half;
  3899. break;
  3900. case SPEED_10 + DUPLEX_FULL:
  3901. adapter->hw.forced_speed_duplex = e1000_10_full;
  3902. break;
  3903. case SPEED_100 + DUPLEX_HALF:
  3904. adapter->hw.forced_speed_duplex = e1000_100_half;
  3905. break;
  3906. case SPEED_100 + DUPLEX_FULL:
  3907. adapter->hw.forced_speed_duplex = e1000_100_full;
  3908. break;
  3909. case SPEED_1000 + DUPLEX_FULL:
  3910. adapter->hw.autoneg = 1;
  3911. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3912. break;
  3913. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3914. default:
  3915. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3916. return -EINVAL;
  3917. }
  3918. return 0;
  3919. }
  3920. #ifdef CONFIG_PM
  3921. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3922. * bus we're on (PCI(X) vs. PCI-E)
  3923. */
  3924. #define PCIE_CONFIG_SPACE_LEN 256
  3925. #define PCI_CONFIG_SPACE_LEN 64
  3926. static int
  3927. e1000_pci_save_state(struct e1000_adapter *adapter)
  3928. {
  3929. struct pci_dev *dev = adapter->pdev;
  3930. int size;
  3931. int i;
  3932. if (adapter->hw.mac_type >= e1000_82571)
  3933. size = PCIE_CONFIG_SPACE_LEN;
  3934. else
  3935. size = PCI_CONFIG_SPACE_LEN;
  3936. WARN_ON(adapter->config_space != NULL);
  3937. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3938. if (!adapter->config_space) {
  3939. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3940. return -ENOMEM;
  3941. }
  3942. for (i = 0; i < (size / 4); i++)
  3943. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3944. return 0;
  3945. }
  3946. static void
  3947. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3948. {
  3949. struct pci_dev *dev = adapter->pdev;
  3950. int size;
  3951. int i;
  3952. if (adapter->config_space == NULL)
  3953. return;
  3954. if (adapter->hw.mac_type >= e1000_82571)
  3955. size = PCIE_CONFIG_SPACE_LEN;
  3956. else
  3957. size = PCI_CONFIG_SPACE_LEN;
  3958. for (i = 0; i < (size / 4); i++)
  3959. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3960. kfree(adapter->config_space);
  3961. adapter->config_space = NULL;
  3962. return;
  3963. }
  3964. #endif /* CONFIG_PM */
  3965. static int
  3966. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3967. {
  3968. struct net_device *netdev = pci_get_drvdata(pdev);
  3969. struct e1000_adapter *adapter = netdev_priv(netdev);
  3970. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3971. uint32_t wufc = adapter->wol;
  3972. #ifdef CONFIG_PM
  3973. int retval = 0;
  3974. #endif
  3975. netif_device_detach(netdev);
  3976. if (netif_running(netdev)) {
  3977. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3978. e1000_down(adapter);
  3979. }
  3980. #ifdef CONFIG_PM
  3981. /* Implement our own version of pci_save_state(pdev) because pci-
  3982. * express adapters have 256-byte config spaces. */
  3983. retval = e1000_pci_save_state(adapter);
  3984. if (retval)
  3985. return retval;
  3986. #endif
  3987. status = E1000_READ_REG(&adapter->hw, STATUS);
  3988. if (status & E1000_STATUS_LU)
  3989. wufc &= ~E1000_WUFC_LNKC;
  3990. if (wufc) {
  3991. e1000_setup_rctl(adapter);
  3992. e1000_set_multi(netdev);
  3993. /* turn on all-multi mode if wake on multicast is enabled */
  3994. if (wufc & E1000_WUFC_MC) {
  3995. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3996. rctl |= E1000_RCTL_MPE;
  3997. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3998. }
  3999. if (adapter->hw.mac_type >= e1000_82540) {
  4000. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4001. /* advertise wake from D3Cold */
  4002. #define E1000_CTRL_ADVD3WUC 0x00100000
  4003. /* phy power management enable */
  4004. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4005. ctrl |= E1000_CTRL_ADVD3WUC |
  4006. E1000_CTRL_EN_PHY_PWR_MGMT;
  4007. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4008. }
  4009. if (adapter->hw.media_type == e1000_media_type_fiber ||
  4010. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  4011. /* keep the laser running in D3 */
  4012. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  4013. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4014. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  4015. }
  4016. /* Allow time for pending master requests to run */
  4017. e1000_disable_pciex_master(&adapter->hw);
  4018. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4019. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4020. pci_enable_wake(pdev, PCI_D3hot, 1);
  4021. pci_enable_wake(pdev, PCI_D3cold, 1);
  4022. } else {
  4023. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4024. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4025. pci_enable_wake(pdev, PCI_D3hot, 0);
  4026. pci_enable_wake(pdev, PCI_D3cold, 0);
  4027. }
  4028. /* FIXME: this code is incorrect for PCI Express */
  4029. if (adapter->hw.mac_type >= e1000_82540 &&
  4030. adapter->hw.mac_type != e1000_ich8lan &&
  4031. adapter->hw.media_type == e1000_media_type_copper) {
  4032. manc = E1000_READ_REG(&adapter->hw, MANC);
  4033. if (manc & E1000_MANC_SMBUS_EN) {
  4034. manc |= E1000_MANC_ARP_EN;
  4035. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4036. pci_enable_wake(pdev, PCI_D3hot, 1);
  4037. pci_enable_wake(pdev, PCI_D3cold, 1);
  4038. }
  4039. }
  4040. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4041. e1000_phy_powerdown_workaround(&adapter->hw);
  4042. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4043. * would have already happened in close and is redundant. */
  4044. e1000_release_hw_control(adapter);
  4045. pci_disable_device(pdev);
  4046. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4047. return 0;
  4048. }
  4049. #ifdef CONFIG_PM
  4050. static int
  4051. e1000_resume(struct pci_dev *pdev)
  4052. {
  4053. struct net_device *netdev = pci_get_drvdata(pdev);
  4054. struct e1000_adapter *adapter = netdev_priv(netdev);
  4055. uint32_t manc, err;
  4056. pci_set_power_state(pdev, PCI_D0);
  4057. e1000_pci_restore_state(adapter);
  4058. if ((err = pci_enable_device(pdev))) {
  4059. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4060. return err;
  4061. }
  4062. pci_set_master(pdev);
  4063. pci_enable_wake(pdev, PCI_D3hot, 0);
  4064. pci_enable_wake(pdev, PCI_D3cold, 0);
  4065. e1000_reset(adapter);
  4066. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4067. if (netif_running(netdev))
  4068. e1000_up(adapter);
  4069. netif_device_attach(netdev);
  4070. /* FIXME: this code is incorrect for PCI Express */
  4071. if (adapter->hw.mac_type >= e1000_82540 &&
  4072. adapter->hw.mac_type != e1000_ich8lan &&
  4073. adapter->hw.media_type == e1000_media_type_copper) {
  4074. manc = E1000_READ_REG(&adapter->hw, MANC);
  4075. manc &= ~(E1000_MANC_ARP_EN);
  4076. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4077. }
  4078. /* If the controller is 82573 and f/w is AMT, do not set
  4079. * DRV_LOAD until the interface is up. For all other cases,
  4080. * let the f/w know that the h/w is now under the control
  4081. * of the driver. */
  4082. if (adapter->hw.mac_type != e1000_82573 ||
  4083. !e1000_check_mng_mode(&adapter->hw))
  4084. e1000_get_hw_control(adapter);
  4085. return 0;
  4086. }
  4087. #endif
  4088. static void e1000_shutdown(struct pci_dev *pdev)
  4089. {
  4090. e1000_suspend(pdev, PMSG_SUSPEND);
  4091. }
  4092. #ifdef CONFIG_NET_POLL_CONTROLLER
  4093. /*
  4094. * Polling 'interrupt' - used by things like netconsole to send skbs
  4095. * without having to re-enable interrupts. It's not called while
  4096. * the interrupt routine is executing.
  4097. */
  4098. static void
  4099. e1000_netpoll(struct net_device *netdev)
  4100. {
  4101. struct e1000_adapter *adapter = netdev_priv(netdev);
  4102. disable_irq(adapter->pdev->irq);
  4103. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4104. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4105. #ifndef CONFIG_E1000_NAPI
  4106. adapter->clean_rx(adapter, adapter->rx_ring);
  4107. #endif
  4108. enable_irq(adapter->pdev->irq);
  4109. }
  4110. #endif
  4111. /**
  4112. * e1000_io_error_detected - called when PCI error is detected
  4113. * @pdev: Pointer to PCI device
  4114. * @state: The current pci conneection state
  4115. *
  4116. * This function is called after a PCI bus error affecting
  4117. * this device has been detected.
  4118. */
  4119. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4120. {
  4121. struct net_device *netdev = pci_get_drvdata(pdev);
  4122. struct e1000_adapter *adapter = netdev->priv;
  4123. netif_device_detach(netdev);
  4124. if (netif_running(netdev))
  4125. e1000_down(adapter);
  4126. pci_disable_device(pdev);
  4127. /* Request a slot slot reset. */
  4128. return PCI_ERS_RESULT_NEED_RESET;
  4129. }
  4130. /**
  4131. * e1000_io_slot_reset - called after the pci bus has been reset.
  4132. * @pdev: Pointer to PCI device
  4133. *
  4134. * Restart the card from scratch, as if from a cold-boot. Implementation
  4135. * resembles the first-half of the e1000_resume routine.
  4136. */
  4137. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4138. {
  4139. struct net_device *netdev = pci_get_drvdata(pdev);
  4140. struct e1000_adapter *adapter = netdev->priv;
  4141. if (pci_enable_device(pdev)) {
  4142. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4143. return PCI_ERS_RESULT_DISCONNECT;
  4144. }
  4145. pci_set_master(pdev);
  4146. pci_enable_wake(pdev, 3, 0);
  4147. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4148. /* Perform card reset only on one instance of the card */
  4149. if (PCI_FUNC (pdev->devfn) != 0)
  4150. return PCI_ERS_RESULT_RECOVERED;
  4151. e1000_reset(adapter);
  4152. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4153. return PCI_ERS_RESULT_RECOVERED;
  4154. }
  4155. /**
  4156. * e1000_io_resume - called when traffic can start flowing again.
  4157. * @pdev: Pointer to PCI device
  4158. *
  4159. * This callback is called when the error recovery driver tells us that
  4160. * its OK to resume normal operation. Implementation resembles the
  4161. * second-half of the e1000_resume routine.
  4162. */
  4163. static void e1000_io_resume(struct pci_dev *pdev)
  4164. {
  4165. struct net_device *netdev = pci_get_drvdata(pdev);
  4166. struct e1000_adapter *adapter = netdev->priv;
  4167. uint32_t manc, swsm;
  4168. if (netif_running(netdev)) {
  4169. if (e1000_up(adapter)) {
  4170. printk("e1000: can't bring device back up after reset\n");
  4171. return;
  4172. }
  4173. }
  4174. netif_device_attach(netdev);
  4175. if (adapter->hw.mac_type >= e1000_82540 &&
  4176. adapter->hw.media_type == e1000_media_type_copper) {
  4177. manc = E1000_READ_REG(&adapter->hw, MANC);
  4178. manc &= ~(E1000_MANC_ARP_EN);
  4179. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4180. }
  4181. switch (adapter->hw.mac_type) {
  4182. case e1000_82573:
  4183. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4184. E1000_WRITE_REG(&adapter->hw, SWSM,
  4185. swsm | E1000_SWSM_DRV_LOAD);
  4186. break;
  4187. default:
  4188. break;
  4189. }
  4190. if (netif_running(netdev))
  4191. mod_timer(&adapter->watchdog_timer, jiffies);
  4192. }
  4193. /* e1000_main.c */