e1000_ethtool.c 57 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. /* ethtool support for e1000 */
  22. #include "e1000.h"
  23. #include <asm/uaccess.h>
  24. struct e1000_stats {
  25. char stat_string[ETH_GSTRING_LEN];
  26. int sizeof_stat;
  27. int stat_offset;
  28. };
  29. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  30. offsetof(struct e1000_adapter, m)
  31. static const struct e1000_stats e1000_gstrings_stats[] = {
  32. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  33. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  34. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  35. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  36. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  37. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  38. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  39. { "multicast", E1000_STAT(net_stats.multicast) },
  40. { "collisions", E1000_STAT(net_stats.collisions) },
  41. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  42. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  43. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  44. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  45. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  46. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  47. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  48. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  49. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  50. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  51. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  52. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  53. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  54. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  55. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  56. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  57. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  58. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  59. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  60. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  61. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  62. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  63. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  64. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  65. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  66. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  67. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  68. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  69. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  70. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  71. };
  72. #define E1000_QUEUE_STATS_LEN 0
  73. #define E1000_GLOBAL_STATS_LEN \
  74. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  75. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  76. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  77. "Register test (offline)", "Eeprom test (offline)",
  78. "Interrupt test (offline)", "Loopback test (offline)",
  79. "Link test (on/offline)"
  80. };
  81. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  82. static int
  83. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  84. {
  85. struct e1000_adapter *adapter = netdev_priv(netdev);
  86. struct e1000_hw *hw = &adapter->hw;
  87. if (hw->media_type == e1000_media_type_copper) {
  88. ecmd->supported = (SUPPORTED_10baseT_Half |
  89. SUPPORTED_10baseT_Full |
  90. SUPPORTED_100baseT_Half |
  91. SUPPORTED_100baseT_Full |
  92. SUPPORTED_1000baseT_Full|
  93. SUPPORTED_Autoneg |
  94. SUPPORTED_TP);
  95. if (hw->phy_type == e1000_phy_ife)
  96. ecmd->supported &= ~SUPPORTED_1000baseT_Full;
  97. ecmd->advertising = ADVERTISED_TP;
  98. if (hw->autoneg == 1) {
  99. ecmd->advertising |= ADVERTISED_Autoneg;
  100. /* the e1000 autoneg seems to match ethtool nicely */
  101. ecmd->advertising |= hw->autoneg_advertised;
  102. }
  103. ecmd->port = PORT_TP;
  104. ecmd->phy_address = hw->phy_addr;
  105. if (hw->mac_type == e1000_82543)
  106. ecmd->transceiver = XCVR_EXTERNAL;
  107. else
  108. ecmd->transceiver = XCVR_INTERNAL;
  109. } else {
  110. ecmd->supported = (SUPPORTED_1000baseT_Full |
  111. SUPPORTED_FIBRE |
  112. SUPPORTED_Autoneg);
  113. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  114. ADVERTISED_FIBRE |
  115. ADVERTISED_Autoneg);
  116. ecmd->port = PORT_FIBRE;
  117. if (hw->mac_type >= e1000_82545)
  118. ecmd->transceiver = XCVR_INTERNAL;
  119. else
  120. ecmd->transceiver = XCVR_EXTERNAL;
  121. }
  122. if (netif_carrier_ok(adapter->netdev)) {
  123. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  124. &adapter->link_duplex);
  125. ecmd->speed = adapter->link_speed;
  126. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  127. * and HALF_DUPLEX != DUPLEX_HALF */
  128. if (adapter->link_duplex == FULL_DUPLEX)
  129. ecmd->duplex = DUPLEX_FULL;
  130. else
  131. ecmd->duplex = DUPLEX_HALF;
  132. } else {
  133. ecmd->speed = -1;
  134. ecmd->duplex = -1;
  135. }
  136. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  137. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  138. return 0;
  139. }
  140. static int
  141. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  142. {
  143. struct e1000_adapter *adapter = netdev_priv(netdev);
  144. struct e1000_hw *hw = &adapter->hw;
  145. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  146. * cannot be changed */
  147. if (e1000_check_phy_reset_block(hw)) {
  148. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  149. "when SoL/IDER is active.\n");
  150. return -EINVAL;
  151. }
  152. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  153. msleep(1);
  154. if (ecmd->autoneg == AUTONEG_ENABLE) {
  155. hw->autoneg = 1;
  156. if (hw->media_type == e1000_media_type_fiber)
  157. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  158. ADVERTISED_FIBRE |
  159. ADVERTISED_Autoneg;
  160. else
  161. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  162. ADVERTISED_10baseT_Full |
  163. ADVERTISED_100baseT_Half |
  164. ADVERTISED_100baseT_Full |
  165. ADVERTISED_1000baseT_Full|
  166. ADVERTISED_Autoneg |
  167. ADVERTISED_TP;
  168. ecmd->advertising = hw->autoneg_advertised;
  169. } else
  170. if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
  171. clear_bit(__E1000_RESETTING, &adapter->flags);
  172. return -EINVAL;
  173. }
  174. /* reset the link */
  175. if (netif_running(adapter->netdev)) {
  176. e1000_down(adapter);
  177. e1000_up(adapter);
  178. } else
  179. e1000_reset(adapter);
  180. clear_bit(__E1000_RESETTING, &adapter->flags);
  181. return 0;
  182. }
  183. static void
  184. e1000_get_pauseparam(struct net_device *netdev,
  185. struct ethtool_pauseparam *pause)
  186. {
  187. struct e1000_adapter *adapter = netdev_priv(netdev);
  188. struct e1000_hw *hw = &adapter->hw;
  189. pause->autoneg =
  190. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  191. if (hw->fc == e1000_fc_rx_pause)
  192. pause->rx_pause = 1;
  193. else if (hw->fc == e1000_fc_tx_pause)
  194. pause->tx_pause = 1;
  195. else if (hw->fc == e1000_fc_full) {
  196. pause->rx_pause = 1;
  197. pause->tx_pause = 1;
  198. }
  199. }
  200. static int
  201. e1000_set_pauseparam(struct net_device *netdev,
  202. struct ethtool_pauseparam *pause)
  203. {
  204. struct e1000_adapter *adapter = netdev_priv(netdev);
  205. struct e1000_hw *hw = &adapter->hw;
  206. int retval = 0;
  207. adapter->fc_autoneg = pause->autoneg;
  208. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  209. msleep(1);
  210. if (pause->rx_pause && pause->tx_pause)
  211. hw->fc = e1000_fc_full;
  212. else if (pause->rx_pause && !pause->tx_pause)
  213. hw->fc = e1000_fc_rx_pause;
  214. else if (!pause->rx_pause && pause->tx_pause)
  215. hw->fc = e1000_fc_tx_pause;
  216. else if (!pause->rx_pause && !pause->tx_pause)
  217. hw->fc = e1000_fc_none;
  218. hw->original_fc = hw->fc;
  219. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  220. if (netif_running(adapter->netdev)) {
  221. e1000_down(adapter);
  222. e1000_up(adapter);
  223. } else
  224. e1000_reset(adapter);
  225. } else
  226. retval = ((hw->media_type == e1000_media_type_fiber) ?
  227. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  228. clear_bit(__E1000_RESETTING, &adapter->flags);
  229. return retval;
  230. }
  231. static uint32_t
  232. e1000_get_rx_csum(struct net_device *netdev)
  233. {
  234. struct e1000_adapter *adapter = netdev_priv(netdev);
  235. return adapter->rx_csum;
  236. }
  237. static int
  238. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  239. {
  240. struct e1000_adapter *adapter = netdev_priv(netdev);
  241. adapter->rx_csum = data;
  242. if (netif_running(netdev))
  243. e1000_reinit_locked(adapter);
  244. else
  245. e1000_reset(adapter);
  246. return 0;
  247. }
  248. static uint32_t
  249. e1000_get_tx_csum(struct net_device *netdev)
  250. {
  251. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  252. }
  253. static int
  254. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  255. {
  256. struct e1000_adapter *adapter = netdev_priv(netdev);
  257. if (adapter->hw.mac_type < e1000_82543) {
  258. if (!data)
  259. return -EINVAL;
  260. return 0;
  261. }
  262. if (data)
  263. netdev->features |= NETIF_F_HW_CSUM;
  264. else
  265. netdev->features &= ~NETIF_F_HW_CSUM;
  266. return 0;
  267. }
  268. #ifdef NETIF_F_TSO
  269. static int
  270. e1000_set_tso(struct net_device *netdev, uint32_t data)
  271. {
  272. struct e1000_adapter *adapter = netdev_priv(netdev);
  273. if ((adapter->hw.mac_type < e1000_82544) ||
  274. (adapter->hw.mac_type == e1000_82547))
  275. return data ? -EINVAL : 0;
  276. if (data)
  277. netdev->features |= NETIF_F_TSO;
  278. else
  279. netdev->features &= ~NETIF_F_TSO;
  280. DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
  281. adapter->tso_force = TRUE;
  282. return 0;
  283. }
  284. #endif /* NETIF_F_TSO */
  285. static uint32_t
  286. e1000_get_msglevel(struct net_device *netdev)
  287. {
  288. struct e1000_adapter *adapter = netdev_priv(netdev);
  289. return adapter->msg_enable;
  290. }
  291. static void
  292. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  293. {
  294. struct e1000_adapter *adapter = netdev_priv(netdev);
  295. adapter->msg_enable = data;
  296. }
  297. static int
  298. e1000_get_regs_len(struct net_device *netdev)
  299. {
  300. #define E1000_REGS_LEN 32
  301. return E1000_REGS_LEN * sizeof(uint32_t);
  302. }
  303. static void
  304. e1000_get_regs(struct net_device *netdev,
  305. struct ethtool_regs *regs, void *p)
  306. {
  307. struct e1000_adapter *adapter = netdev_priv(netdev);
  308. struct e1000_hw *hw = &adapter->hw;
  309. uint32_t *regs_buff = p;
  310. uint16_t phy_data;
  311. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  312. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  313. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  314. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  315. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  316. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  317. regs_buff[4] = E1000_READ_REG(hw, RDH);
  318. regs_buff[5] = E1000_READ_REG(hw, RDT);
  319. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  320. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  321. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  322. regs_buff[9] = E1000_READ_REG(hw, TDH);
  323. regs_buff[10] = E1000_READ_REG(hw, TDT);
  324. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  325. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  326. if (hw->phy_type == e1000_phy_igp) {
  327. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  328. IGP01E1000_PHY_AGC_A);
  329. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  330. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  331. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  332. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  333. IGP01E1000_PHY_AGC_B);
  334. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  335. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  336. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  337. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  338. IGP01E1000_PHY_AGC_C);
  339. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  340. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  341. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  342. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  343. IGP01E1000_PHY_AGC_D);
  344. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  345. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  346. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  347. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  348. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  349. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  350. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  351. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  352. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  353. IGP01E1000_PHY_PCS_INIT_REG);
  354. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  355. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  356. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  357. regs_buff[20] = 0; /* polarity correction enabled (always) */
  358. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  359. regs_buff[23] = regs_buff[18]; /* mdix mode */
  360. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  361. } else {
  362. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  363. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  364. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  365. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  366. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  367. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  368. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  369. regs_buff[18] = regs_buff[13]; /* cable polarity */
  370. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  371. regs_buff[20] = regs_buff[17]; /* polarity correction */
  372. /* phy receive errors */
  373. regs_buff[22] = adapter->phy_stats.receive_errors;
  374. regs_buff[23] = regs_buff[13]; /* mdix mode */
  375. }
  376. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  377. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  378. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  379. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  380. if (hw->mac_type >= e1000_82540 &&
  381. hw->media_type == e1000_media_type_copper) {
  382. regs_buff[26] = E1000_READ_REG(hw, MANC);
  383. }
  384. }
  385. static int
  386. e1000_get_eeprom_len(struct net_device *netdev)
  387. {
  388. struct e1000_adapter *adapter = netdev_priv(netdev);
  389. return adapter->hw.eeprom.word_size * 2;
  390. }
  391. static int
  392. e1000_get_eeprom(struct net_device *netdev,
  393. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  394. {
  395. struct e1000_adapter *adapter = netdev_priv(netdev);
  396. struct e1000_hw *hw = &adapter->hw;
  397. uint16_t *eeprom_buff;
  398. int first_word, last_word;
  399. int ret_val = 0;
  400. uint16_t i;
  401. if (eeprom->len == 0)
  402. return -EINVAL;
  403. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  404. first_word = eeprom->offset >> 1;
  405. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  406. eeprom_buff = kmalloc(sizeof(uint16_t) *
  407. (last_word - first_word + 1), GFP_KERNEL);
  408. if (!eeprom_buff)
  409. return -ENOMEM;
  410. if (hw->eeprom.type == e1000_eeprom_spi)
  411. ret_val = e1000_read_eeprom(hw, first_word,
  412. last_word - first_word + 1,
  413. eeprom_buff);
  414. else {
  415. for (i = 0; i < last_word - first_word + 1; i++)
  416. if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  417. &eeprom_buff[i])))
  418. break;
  419. }
  420. /* Device's eeprom is always little-endian, word addressable */
  421. for (i = 0; i < last_word - first_word + 1; i++)
  422. le16_to_cpus(&eeprom_buff[i]);
  423. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  424. eeprom->len);
  425. kfree(eeprom_buff);
  426. return ret_val;
  427. }
  428. static int
  429. e1000_set_eeprom(struct net_device *netdev,
  430. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  431. {
  432. struct e1000_adapter *adapter = netdev_priv(netdev);
  433. struct e1000_hw *hw = &adapter->hw;
  434. uint16_t *eeprom_buff;
  435. void *ptr;
  436. int max_len, first_word, last_word, ret_val = 0;
  437. uint16_t i;
  438. if (eeprom->len == 0)
  439. return -EOPNOTSUPP;
  440. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  441. return -EFAULT;
  442. max_len = hw->eeprom.word_size * 2;
  443. first_word = eeprom->offset >> 1;
  444. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  445. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  446. if (!eeprom_buff)
  447. return -ENOMEM;
  448. ptr = (void *)eeprom_buff;
  449. if (eeprom->offset & 1) {
  450. /* need read/modify/write of first changed EEPROM word */
  451. /* only the second byte of the word is being modified */
  452. ret_val = e1000_read_eeprom(hw, first_word, 1,
  453. &eeprom_buff[0]);
  454. ptr++;
  455. }
  456. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  457. /* need read/modify/write of last changed EEPROM word */
  458. /* only the first byte of the word is being modified */
  459. ret_val = e1000_read_eeprom(hw, last_word, 1,
  460. &eeprom_buff[last_word - first_word]);
  461. }
  462. /* Device's eeprom is always little-endian, word addressable */
  463. for (i = 0; i < last_word - first_word + 1; i++)
  464. le16_to_cpus(&eeprom_buff[i]);
  465. memcpy(ptr, bytes, eeprom->len);
  466. for (i = 0; i < last_word - first_word + 1; i++)
  467. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  468. ret_val = e1000_write_eeprom(hw, first_word,
  469. last_word - first_word + 1, eeprom_buff);
  470. /* Update the checksum over the first part of the EEPROM if needed
  471. * and flush shadow RAM for 82573 conrollers */
  472. if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  473. (hw->mac_type == e1000_82573)))
  474. e1000_update_eeprom_checksum(hw);
  475. kfree(eeprom_buff);
  476. return ret_val;
  477. }
  478. static void
  479. e1000_get_drvinfo(struct net_device *netdev,
  480. struct ethtool_drvinfo *drvinfo)
  481. {
  482. struct e1000_adapter *adapter = netdev_priv(netdev);
  483. char firmware_version[32];
  484. uint16_t eeprom_data;
  485. strncpy(drvinfo->driver, e1000_driver_name, 32);
  486. strncpy(drvinfo->version, e1000_driver_version, 32);
  487. /* EEPROM image version # is reported as firmware version # for
  488. * 8257{1|2|3} controllers */
  489. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  490. switch (adapter->hw.mac_type) {
  491. case e1000_82571:
  492. case e1000_82572:
  493. case e1000_82573:
  494. case e1000_80003es2lan:
  495. case e1000_ich8lan:
  496. sprintf(firmware_version, "%d.%d-%d",
  497. (eeprom_data & 0xF000) >> 12,
  498. (eeprom_data & 0x0FF0) >> 4,
  499. eeprom_data & 0x000F);
  500. break;
  501. default:
  502. sprintf(firmware_version, "N/A");
  503. }
  504. strncpy(drvinfo->fw_version, firmware_version, 32);
  505. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  506. drvinfo->n_stats = E1000_STATS_LEN;
  507. drvinfo->testinfo_len = E1000_TEST_LEN;
  508. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  509. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  510. }
  511. static void
  512. e1000_get_ringparam(struct net_device *netdev,
  513. struct ethtool_ringparam *ring)
  514. {
  515. struct e1000_adapter *adapter = netdev_priv(netdev);
  516. e1000_mac_type mac_type = adapter->hw.mac_type;
  517. struct e1000_tx_ring *txdr = adapter->tx_ring;
  518. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  519. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  520. E1000_MAX_82544_RXD;
  521. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  522. E1000_MAX_82544_TXD;
  523. ring->rx_mini_max_pending = 0;
  524. ring->rx_jumbo_max_pending = 0;
  525. ring->rx_pending = rxdr->count;
  526. ring->tx_pending = txdr->count;
  527. ring->rx_mini_pending = 0;
  528. ring->rx_jumbo_pending = 0;
  529. }
  530. static int
  531. e1000_set_ringparam(struct net_device *netdev,
  532. struct ethtool_ringparam *ring)
  533. {
  534. struct e1000_adapter *adapter = netdev_priv(netdev);
  535. e1000_mac_type mac_type = adapter->hw.mac_type;
  536. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  537. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  538. int i, err, tx_ring_size, rx_ring_size;
  539. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  540. return -EINVAL;
  541. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  542. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  543. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  544. msleep(1);
  545. if (netif_running(adapter->netdev))
  546. e1000_down(adapter);
  547. tx_old = adapter->tx_ring;
  548. rx_old = adapter->rx_ring;
  549. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  550. if (!adapter->tx_ring) {
  551. err = -ENOMEM;
  552. goto err_setup_rx;
  553. }
  554. memset(adapter->tx_ring, 0, tx_ring_size);
  555. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  556. if (!adapter->rx_ring) {
  557. kfree(adapter->tx_ring);
  558. err = -ENOMEM;
  559. goto err_setup_rx;
  560. }
  561. memset(adapter->rx_ring, 0, rx_ring_size);
  562. txdr = adapter->tx_ring;
  563. rxdr = adapter->rx_ring;
  564. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  565. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  566. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  567. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  568. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  569. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  570. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  571. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  572. for (i = 0; i < adapter->num_tx_queues; i++)
  573. txdr[i].count = txdr->count;
  574. for (i = 0; i < adapter->num_rx_queues; i++)
  575. rxdr[i].count = rxdr->count;
  576. if (netif_running(adapter->netdev)) {
  577. /* Try to get new resources before deleting old */
  578. if ((err = e1000_setup_all_rx_resources(adapter)))
  579. goto err_setup_rx;
  580. if ((err = e1000_setup_all_tx_resources(adapter)))
  581. goto err_setup_tx;
  582. /* save the new, restore the old in order to free it,
  583. * then restore the new back again */
  584. rx_new = adapter->rx_ring;
  585. tx_new = adapter->tx_ring;
  586. adapter->rx_ring = rx_old;
  587. adapter->tx_ring = tx_old;
  588. e1000_free_all_rx_resources(adapter);
  589. e1000_free_all_tx_resources(adapter);
  590. kfree(tx_old);
  591. kfree(rx_old);
  592. adapter->rx_ring = rx_new;
  593. adapter->tx_ring = tx_new;
  594. if ((err = e1000_up(adapter)))
  595. goto err_setup;
  596. }
  597. clear_bit(__E1000_RESETTING, &adapter->flags);
  598. return 0;
  599. err_setup_tx:
  600. e1000_free_all_rx_resources(adapter);
  601. err_setup_rx:
  602. adapter->rx_ring = rx_old;
  603. adapter->tx_ring = tx_old;
  604. e1000_up(adapter);
  605. err_setup:
  606. clear_bit(__E1000_RESETTING, &adapter->flags);
  607. return err;
  608. }
  609. #define REG_PATTERN_TEST(R, M, W) \
  610. { \
  611. uint32_t pat, value; \
  612. uint32_t test[] = \
  613. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  614. for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  615. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  616. value = E1000_READ_REG(&adapter->hw, R); \
  617. if (value != (test[pat] & W & M)) { \
  618. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  619. "0x%08X expected 0x%08X\n", \
  620. E1000_##R, value, (test[pat] & W & M)); \
  621. *data = (adapter->hw.mac_type < e1000_82543) ? \
  622. E1000_82542_##R : E1000_##R; \
  623. return 1; \
  624. } \
  625. } \
  626. }
  627. #define REG_SET_AND_CHECK(R, M, W) \
  628. { \
  629. uint32_t value; \
  630. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  631. value = E1000_READ_REG(&adapter->hw, R); \
  632. if ((W & M) != (value & M)) { \
  633. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  634. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  635. *data = (adapter->hw.mac_type < e1000_82543) ? \
  636. E1000_82542_##R : E1000_##R; \
  637. return 1; \
  638. } \
  639. }
  640. static int
  641. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  642. {
  643. uint32_t value, before, after;
  644. uint32_t i, toggle;
  645. /* The status register is Read Only, so a write should fail.
  646. * Some bits that get toggled are ignored.
  647. */
  648. switch (adapter->hw.mac_type) {
  649. /* there are several bits on newer hardware that are r/w */
  650. case e1000_82571:
  651. case e1000_82572:
  652. case e1000_80003es2lan:
  653. toggle = 0x7FFFF3FF;
  654. break;
  655. case e1000_82573:
  656. case e1000_ich8lan:
  657. toggle = 0x7FFFF033;
  658. break;
  659. default:
  660. toggle = 0xFFFFF833;
  661. break;
  662. }
  663. before = E1000_READ_REG(&adapter->hw, STATUS);
  664. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  665. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  666. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  667. if (value != after) {
  668. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  669. "0x%08X expected: 0x%08X\n", after, value);
  670. *data = 1;
  671. return 1;
  672. }
  673. /* restore previous status */
  674. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  675. if (adapter->hw.mac_type != e1000_ich8lan) {
  676. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  677. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  678. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  679. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  680. }
  681. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  682. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  683. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  684. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  685. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  686. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  687. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  688. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  689. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  690. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  691. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  692. before = (adapter->hw.mac_type == e1000_ich8lan ?
  693. 0x06C3B33E : 0x06DFB3FE);
  694. REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
  695. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  696. if (adapter->hw.mac_type >= e1000_82543) {
  697. REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
  698. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  699. if (adapter->hw.mac_type != e1000_ich8lan)
  700. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  701. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  702. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  703. value = (adapter->hw.mac_type == e1000_ich8lan ?
  704. E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
  705. for (i = 0; i < value; i++) {
  706. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  707. 0xFFFFFFFF);
  708. }
  709. } else {
  710. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  711. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  712. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  713. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  714. }
  715. value = (adapter->hw.mac_type == e1000_ich8lan ?
  716. E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
  717. for (i = 0; i < value; i++)
  718. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  719. *data = 0;
  720. return 0;
  721. }
  722. static int
  723. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  724. {
  725. uint16_t temp;
  726. uint16_t checksum = 0;
  727. uint16_t i;
  728. *data = 0;
  729. /* Read and add up the contents of the EEPROM */
  730. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  731. if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  732. *data = 1;
  733. break;
  734. }
  735. checksum += temp;
  736. }
  737. /* If Checksum is not Correct return error else test passed */
  738. if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  739. *data = 2;
  740. return *data;
  741. }
  742. static irqreturn_t
  743. e1000_test_intr(int irq,
  744. void *data,
  745. struct pt_regs *regs)
  746. {
  747. struct net_device *netdev = (struct net_device *) data;
  748. struct e1000_adapter *adapter = netdev_priv(netdev);
  749. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  750. return IRQ_HANDLED;
  751. }
  752. static int
  753. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  754. {
  755. struct net_device *netdev = adapter->netdev;
  756. uint32_t mask, i=0, shared_int = TRUE;
  757. uint32_t irq = adapter->pdev->irq;
  758. *data = 0;
  759. /* NOTE: we don't test MSI interrupts here, yet */
  760. /* Hook up test interrupt handler just for this test */
  761. if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED,
  762. netdev->name, netdev))
  763. shared_int = FALSE;
  764. else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
  765. netdev->name, netdev)) {
  766. *data = 1;
  767. return -1;
  768. }
  769. DPRINTK(HW, INFO, "testing %s interrupt\n",
  770. (shared_int ? "shared" : "unshared"));
  771. /* Disable all the interrupts */
  772. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  773. msleep(10);
  774. /* Test each interrupt */
  775. for (; i < 10; i++) {
  776. if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
  777. continue;
  778. /* Interrupt to test */
  779. mask = 1 << i;
  780. if (!shared_int) {
  781. /* Disable the interrupt to be reported in
  782. * the cause register and then force the same
  783. * interrupt and see if one gets posted. If
  784. * an interrupt was posted to the bus, the
  785. * test failed.
  786. */
  787. adapter->test_icr = 0;
  788. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  789. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  790. msleep(10);
  791. if (adapter->test_icr & mask) {
  792. *data = 3;
  793. break;
  794. }
  795. }
  796. /* Enable the interrupt to be reported in
  797. * the cause register and then force the same
  798. * interrupt and see if one gets posted. If
  799. * an interrupt was not posted to the bus, the
  800. * test failed.
  801. */
  802. adapter->test_icr = 0;
  803. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  804. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  805. msleep(10);
  806. if (!(adapter->test_icr & mask)) {
  807. *data = 4;
  808. break;
  809. }
  810. if (!shared_int) {
  811. /* Disable the other interrupts to be reported in
  812. * the cause register and then force the other
  813. * interrupts and see if any get posted. If
  814. * an interrupt was posted to the bus, the
  815. * test failed.
  816. */
  817. adapter->test_icr = 0;
  818. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  819. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  820. msleep(10);
  821. if (adapter->test_icr) {
  822. *data = 5;
  823. break;
  824. }
  825. }
  826. }
  827. /* Disable all the interrupts */
  828. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  829. msleep(10);
  830. /* Unhook test interrupt handler */
  831. free_irq(irq, netdev);
  832. return *data;
  833. }
  834. static void
  835. e1000_free_desc_rings(struct e1000_adapter *adapter)
  836. {
  837. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  838. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  839. struct pci_dev *pdev = adapter->pdev;
  840. int i;
  841. if (txdr->desc && txdr->buffer_info) {
  842. for (i = 0; i < txdr->count; i++) {
  843. if (txdr->buffer_info[i].dma)
  844. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  845. txdr->buffer_info[i].length,
  846. PCI_DMA_TODEVICE);
  847. if (txdr->buffer_info[i].skb)
  848. dev_kfree_skb(txdr->buffer_info[i].skb);
  849. }
  850. }
  851. if (rxdr->desc && rxdr->buffer_info) {
  852. for (i = 0; i < rxdr->count; i++) {
  853. if (rxdr->buffer_info[i].dma)
  854. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  855. rxdr->buffer_info[i].length,
  856. PCI_DMA_FROMDEVICE);
  857. if (rxdr->buffer_info[i].skb)
  858. dev_kfree_skb(rxdr->buffer_info[i].skb);
  859. }
  860. }
  861. if (txdr->desc) {
  862. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  863. txdr->desc = NULL;
  864. }
  865. if (rxdr->desc) {
  866. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  867. rxdr->desc = NULL;
  868. }
  869. kfree(txdr->buffer_info);
  870. txdr->buffer_info = NULL;
  871. kfree(rxdr->buffer_info);
  872. rxdr->buffer_info = NULL;
  873. return;
  874. }
  875. static int
  876. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  877. {
  878. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  879. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  880. struct pci_dev *pdev = adapter->pdev;
  881. uint32_t rctl;
  882. int size, i, ret_val;
  883. /* Setup Tx descriptor ring and Tx buffers */
  884. if (!txdr->count)
  885. txdr->count = E1000_DEFAULT_TXD;
  886. size = txdr->count * sizeof(struct e1000_buffer);
  887. if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  888. ret_val = 1;
  889. goto err_nomem;
  890. }
  891. memset(txdr->buffer_info, 0, size);
  892. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  893. E1000_ROUNDUP(txdr->size, 4096);
  894. if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  895. ret_val = 2;
  896. goto err_nomem;
  897. }
  898. memset(txdr->desc, 0, txdr->size);
  899. txdr->next_to_use = txdr->next_to_clean = 0;
  900. E1000_WRITE_REG(&adapter->hw, TDBAL,
  901. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  902. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  903. E1000_WRITE_REG(&adapter->hw, TDLEN,
  904. txdr->count * sizeof(struct e1000_tx_desc));
  905. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  906. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  907. E1000_WRITE_REG(&adapter->hw, TCTL,
  908. E1000_TCTL_PSP | E1000_TCTL_EN |
  909. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  910. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  911. for (i = 0; i < txdr->count; i++) {
  912. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  913. struct sk_buff *skb;
  914. unsigned int size = 1024;
  915. if (!(skb = alloc_skb(size, GFP_KERNEL))) {
  916. ret_val = 3;
  917. goto err_nomem;
  918. }
  919. skb_put(skb, size);
  920. txdr->buffer_info[i].skb = skb;
  921. txdr->buffer_info[i].length = skb->len;
  922. txdr->buffer_info[i].dma =
  923. pci_map_single(pdev, skb->data, skb->len,
  924. PCI_DMA_TODEVICE);
  925. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  926. tx_desc->lower.data = cpu_to_le32(skb->len);
  927. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  928. E1000_TXD_CMD_IFCS |
  929. E1000_TXD_CMD_RPS);
  930. tx_desc->upper.data = 0;
  931. }
  932. /* Setup Rx descriptor ring and Rx buffers */
  933. if (!rxdr->count)
  934. rxdr->count = E1000_DEFAULT_RXD;
  935. size = rxdr->count * sizeof(struct e1000_buffer);
  936. if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  937. ret_val = 4;
  938. goto err_nomem;
  939. }
  940. memset(rxdr->buffer_info, 0, size);
  941. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  942. if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  943. ret_val = 5;
  944. goto err_nomem;
  945. }
  946. memset(rxdr->desc, 0, rxdr->size);
  947. rxdr->next_to_use = rxdr->next_to_clean = 0;
  948. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  949. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  950. E1000_WRITE_REG(&adapter->hw, RDBAL,
  951. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  952. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  953. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  954. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  955. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  956. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  957. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  958. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  959. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  960. for (i = 0; i < rxdr->count; i++) {
  961. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  962. struct sk_buff *skb;
  963. if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  964. GFP_KERNEL))) {
  965. ret_val = 6;
  966. goto err_nomem;
  967. }
  968. skb_reserve(skb, NET_IP_ALIGN);
  969. rxdr->buffer_info[i].skb = skb;
  970. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  971. rxdr->buffer_info[i].dma =
  972. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  973. PCI_DMA_FROMDEVICE);
  974. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  975. memset(skb->data, 0x00, skb->len);
  976. }
  977. return 0;
  978. err_nomem:
  979. e1000_free_desc_rings(adapter);
  980. return ret_val;
  981. }
  982. static void
  983. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  984. {
  985. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  986. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  987. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  988. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  989. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  990. }
  991. static void
  992. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  993. {
  994. uint16_t phy_reg;
  995. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  996. * Extended PHY Specific Control Register to 25MHz clock. This
  997. * value defaults back to a 2.5MHz clock when the PHY is reset.
  998. */
  999. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1000. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  1001. e1000_write_phy_reg(&adapter->hw,
  1002. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  1003. /* In addition, because of the s/w reset above, we need to enable
  1004. * CRS on TX. This must be set for both full and half duplex
  1005. * operation.
  1006. */
  1007. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1008. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  1009. e1000_write_phy_reg(&adapter->hw,
  1010. M88E1000_PHY_SPEC_CTRL, phy_reg);
  1011. }
  1012. static int
  1013. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  1014. {
  1015. uint32_t ctrl_reg;
  1016. uint16_t phy_reg;
  1017. /* Setup the Device Control Register for PHY loopback test. */
  1018. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1019. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  1020. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1021. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1022. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1023. E1000_CTRL_FD); /* Force Duplex to FULL */
  1024. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1025. /* Read the PHY Specific Control Register (0x10) */
  1026. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1027. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1028. * (bits 6:5).
  1029. */
  1030. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1031. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1032. /* Perform software reset on the PHY */
  1033. e1000_phy_reset(&adapter->hw);
  1034. /* Have to setup TX_CLK and TX_CRS after software reset */
  1035. e1000_phy_reset_clk_and_crs(adapter);
  1036. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1037. /* Wait for reset to complete. */
  1038. udelay(500);
  1039. /* Have to setup TX_CLK and TX_CRS after software reset */
  1040. e1000_phy_reset_clk_and_crs(adapter);
  1041. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1042. e1000_phy_disable_receiver(adapter);
  1043. /* Set the loopback bit in the PHY control register. */
  1044. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1045. phy_reg |= MII_CR_LOOPBACK;
  1046. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1047. /* Setup TX_CLK and TX_CRS one more time. */
  1048. e1000_phy_reset_clk_and_crs(adapter);
  1049. /* Check Phy Configuration */
  1050. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1051. if (phy_reg != 0x4100)
  1052. return 9;
  1053. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1054. if (phy_reg != 0x0070)
  1055. return 10;
  1056. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1057. if (phy_reg != 0x001A)
  1058. return 11;
  1059. return 0;
  1060. }
  1061. static int
  1062. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1063. {
  1064. uint32_t ctrl_reg = 0;
  1065. uint32_t stat_reg = 0;
  1066. adapter->hw.autoneg = FALSE;
  1067. if (adapter->hw.phy_type == e1000_phy_m88) {
  1068. /* Auto-MDI/MDIX Off */
  1069. e1000_write_phy_reg(&adapter->hw,
  1070. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1071. /* reset to update Auto-MDI/MDIX */
  1072. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1073. /* autoneg off */
  1074. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1075. } else if (adapter->hw.phy_type == e1000_phy_gg82563)
  1076. e1000_write_phy_reg(&adapter->hw,
  1077. GG82563_PHY_KMRN_MODE_CTRL,
  1078. 0x1CC);
  1079. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1080. if (adapter->hw.phy_type == e1000_phy_ife) {
  1081. /* force 100, set loopback */
  1082. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
  1083. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1084. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1085. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1086. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1087. E1000_CTRL_SPD_100 |/* Force Speed to 100 */
  1088. E1000_CTRL_FD); /* Force Duplex to FULL */
  1089. } else {
  1090. /* force 1000, set loopback */
  1091. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1092. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1093. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1094. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1095. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1096. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1097. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1098. E1000_CTRL_FD); /* Force Duplex to FULL */
  1099. }
  1100. if (adapter->hw.media_type == e1000_media_type_copper &&
  1101. adapter->hw.phy_type == e1000_phy_m88)
  1102. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1103. else {
  1104. /* Set the ILOS bit on the fiber Nic is half
  1105. * duplex link is detected. */
  1106. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1107. if ((stat_reg & E1000_STATUS_FD) == 0)
  1108. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1109. }
  1110. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1111. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1112. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1113. */
  1114. if (adapter->hw.phy_type == e1000_phy_m88)
  1115. e1000_phy_disable_receiver(adapter);
  1116. udelay(500);
  1117. return 0;
  1118. }
  1119. static int
  1120. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1121. {
  1122. uint16_t phy_reg = 0;
  1123. uint16_t count = 0;
  1124. switch (adapter->hw.mac_type) {
  1125. case e1000_82543:
  1126. if (adapter->hw.media_type == e1000_media_type_copper) {
  1127. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1128. * Some PHY registers get corrupted at random, so
  1129. * attempt this 10 times.
  1130. */
  1131. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1132. count++ < 10);
  1133. if (count < 11)
  1134. return 0;
  1135. }
  1136. break;
  1137. case e1000_82544:
  1138. case e1000_82540:
  1139. case e1000_82545:
  1140. case e1000_82545_rev_3:
  1141. case e1000_82546:
  1142. case e1000_82546_rev_3:
  1143. case e1000_82541:
  1144. case e1000_82541_rev_2:
  1145. case e1000_82547:
  1146. case e1000_82547_rev_2:
  1147. case e1000_82571:
  1148. case e1000_82572:
  1149. case e1000_82573:
  1150. case e1000_80003es2lan:
  1151. case e1000_ich8lan:
  1152. return e1000_integrated_phy_loopback(adapter);
  1153. break;
  1154. default:
  1155. /* Default PHY loopback work is to read the MII
  1156. * control register and assert bit 14 (loopback mode).
  1157. */
  1158. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1159. phy_reg |= MII_CR_LOOPBACK;
  1160. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1161. return 0;
  1162. break;
  1163. }
  1164. return 8;
  1165. }
  1166. static int
  1167. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1168. {
  1169. struct e1000_hw *hw = &adapter->hw;
  1170. uint32_t rctl;
  1171. if (hw->media_type == e1000_media_type_fiber ||
  1172. hw->media_type == e1000_media_type_internal_serdes) {
  1173. switch (hw->mac_type) {
  1174. case e1000_82545:
  1175. case e1000_82546:
  1176. case e1000_82545_rev_3:
  1177. case e1000_82546_rev_3:
  1178. return e1000_set_phy_loopback(adapter);
  1179. break;
  1180. case e1000_82571:
  1181. case e1000_82572:
  1182. #define E1000_SERDES_LB_ON 0x410
  1183. e1000_set_phy_loopback(adapter);
  1184. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1185. msleep(10);
  1186. return 0;
  1187. break;
  1188. default:
  1189. rctl = E1000_READ_REG(hw, RCTL);
  1190. rctl |= E1000_RCTL_LBM_TCVR;
  1191. E1000_WRITE_REG(hw, RCTL, rctl);
  1192. return 0;
  1193. }
  1194. } else if (hw->media_type == e1000_media_type_copper)
  1195. return e1000_set_phy_loopback(adapter);
  1196. return 7;
  1197. }
  1198. static void
  1199. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1200. {
  1201. struct e1000_hw *hw = &adapter->hw;
  1202. uint32_t rctl;
  1203. uint16_t phy_reg;
  1204. rctl = E1000_READ_REG(hw, RCTL);
  1205. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1206. E1000_WRITE_REG(hw, RCTL, rctl);
  1207. switch (hw->mac_type) {
  1208. case e1000_82571:
  1209. case e1000_82572:
  1210. if (hw->media_type == e1000_media_type_fiber ||
  1211. hw->media_type == e1000_media_type_internal_serdes) {
  1212. #define E1000_SERDES_LB_OFF 0x400
  1213. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1214. msleep(10);
  1215. break;
  1216. }
  1217. /* Fall Through */
  1218. case e1000_82545:
  1219. case e1000_82546:
  1220. case e1000_82545_rev_3:
  1221. case e1000_82546_rev_3:
  1222. default:
  1223. hw->autoneg = TRUE;
  1224. if (hw->phy_type == e1000_phy_gg82563)
  1225. e1000_write_phy_reg(hw,
  1226. GG82563_PHY_KMRN_MODE_CTRL,
  1227. 0x180);
  1228. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1229. if (phy_reg & MII_CR_LOOPBACK) {
  1230. phy_reg &= ~MII_CR_LOOPBACK;
  1231. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1232. e1000_phy_reset(hw);
  1233. }
  1234. break;
  1235. }
  1236. }
  1237. static void
  1238. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1239. {
  1240. memset(skb->data, 0xFF, frame_size);
  1241. frame_size &= ~1;
  1242. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1243. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1244. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1245. }
  1246. static int
  1247. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1248. {
  1249. frame_size &= ~1;
  1250. if (*(skb->data + 3) == 0xFF) {
  1251. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1252. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1253. return 0;
  1254. }
  1255. }
  1256. return 13;
  1257. }
  1258. static int
  1259. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1260. {
  1261. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1262. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1263. struct pci_dev *pdev = adapter->pdev;
  1264. int i, j, k, l, lc, good_cnt, ret_val=0;
  1265. unsigned long time;
  1266. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1267. /* Calculate the loop count based on the largest descriptor ring
  1268. * The idea is to wrap the largest ring a number of times using 64
  1269. * send/receive pairs during each loop
  1270. */
  1271. if (rxdr->count <= txdr->count)
  1272. lc = ((txdr->count / 64) * 2) + 1;
  1273. else
  1274. lc = ((rxdr->count / 64) * 2) + 1;
  1275. k = l = 0;
  1276. for (j = 0; j <= lc; j++) { /* loop count loop */
  1277. for (i = 0; i < 64; i++) { /* send the packets */
  1278. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1279. 1024);
  1280. pci_dma_sync_single_for_device(pdev,
  1281. txdr->buffer_info[k].dma,
  1282. txdr->buffer_info[k].length,
  1283. PCI_DMA_TODEVICE);
  1284. if (unlikely(++k == txdr->count)) k = 0;
  1285. }
  1286. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1287. msleep(200);
  1288. time = jiffies; /* set the start time for the receive */
  1289. good_cnt = 0;
  1290. do { /* receive the sent packets */
  1291. pci_dma_sync_single_for_cpu(pdev,
  1292. rxdr->buffer_info[l].dma,
  1293. rxdr->buffer_info[l].length,
  1294. PCI_DMA_FROMDEVICE);
  1295. ret_val = e1000_check_lbtest_frame(
  1296. rxdr->buffer_info[l].skb,
  1297. 1024);
  1298. if (!ret_val)
  1299. good_cnt++;
  1300. if (unlikely(++l == rxdr->count)) l = 0;
  1301. /* time + 20 msecs (200 msecs on 2.4) is more than
  1302. * enough time to complete the receives, if it's
  1303. * exceeded, break and error off
  1304. */
  1305. } while (good_cnt < 64 && jiffies < (time + 20));
  1306. if (good_cnt != 64) {
  1307. ret_val = 13; /* ret_val is the same as mis-compare */
  1308. break;
  1309. }
  1310. if (jiffies >= (time + 2)) {
  1311. ret_val = 14; /* error code for time out error */
  1312. break;
  1313. }
  1314. } /* end loop count loop */
  1315. return ret_val;
  1316. }
  1317. static int
  1318. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1319. {
  1320. /* PHY loopback cannot be performed if SoL/IDER
  1321. * sessions are active */
  1322. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1323. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1324. "when SoL/IDER is active.\n");
  1325. *data = 0;
  1326. goto out;
  1327. }
  1328. if ((*data = e1000_setup_desc_rings(adapter)))
  1329. goto out;
  1330. if ((*data = e1000_setup_loopback_test(adapter)))
  1331. goto err_loopback;
  1332. *data = e1000_run_loopback_test(adapter);
  1333. e1000_loopback_cleanup(adapter);
  1334. err_loopback:
  1335. e1000_free_desc_rings(adapter);
  1336. out:
  1337. return *data;
  1338. }
  1339. static int
  1340. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1341. {
  1342. *data = 0;
  1343. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1344. int i = 0;
  1345. adapter->hw.serdes_link_down = TRUE;
  1346. /* On some blade server designs, link establishment
  1347. * could take as long as 2-3 minutes */
  1348. do {
  1349. e1000_check_for_link(&adapter->hw);
  1350. if (adapter->hw.serdes_link_down == FALSE)
  1351. return *data;
  1352. msleep(20);
  1353. } while (i++ < 3750);
  1354. *data = 1;
  1355. } else {
  1356. e1000_check_for_link(&adapter->hw);
  1357. if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1358. msleep(4000);
  1359. if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1360. *data = 1;
  1361. }
  1362. }
  1363. return *data;
  1364. }
  1365. static int
  1366. e1000_diag_test_count(struct net_device *netdev)
  1367. {
  1368. return E1000_TEST_LEN;
  1369. }
  1370. extern void e1000_power_up_phy(struct e1000_adapter *);
  1371. static void
  1372. e1000_diag_test(struct net_device *netdev,
  1373. struct ethtool_test *eth_test, uint64_t *data)
  1374. {
  1375. struct e1000_adapter *adapter = netdev_priv(netdev);
  1376. boolean_t if_running = netif_running(netdev);
  1377. set_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1378. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1379. /* Offline tests */
  1380. /* save speed, duplex, autoneg settings */
  1381. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1382. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1383. uint8_t autoneg = adapter->hw.autoneg;
  1384. DPRINTK(HW, INFO, "offline testing starting\n");
  1385. /* Link test performed before hardware reset so autoneg doesn't
  1386. * interfere with test result */
  1387. if (e1000_link_test(adapter, &data[4]))
  1388. eth_test->flags |= ETH_TEST_FL_FAILED;
  1389. if (if_running)
  1390. /* indicate we're in test mode */
  1391. dev_close(netdev);
  1392. else
  1393. e1000_reset(adapter);
  1394. if (e1000_reg_test(adapter, &data[0]))
  1395. eth_test->flags |= ETH_TEST_FL_FAILED;
  1396. e1000_reset(adapter);
  1397. if (e1000_eeprom_test(adapter, &data[1]))
  1398. eth_test->flags |= ETH_TEST_FL_FAILED;
  1399. e1000_reset(adapter);
  1400. if (e1000_intr_test(adapter, &data[2]))
  1401. eth_test->flags |= ETH_TEST_FL_FAILED;
  1402. e1000_reset(adapter);
  1403. /* make sure the phy is powered up */
  1404. e1000_power_up_phy(adapter);
  1405. if (e1000_loopback_test(adapter, &data[3]))
  1406. eth_test->flags |= ETH_TEST_FL_FAILED;
  1407. /* restore speed, duplex, autoneg settings */
  1408. adapter->hw.autoneg_advertised = autoneg_advertised;
  1409. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1410. adapter->hw.autoneg = autoneg;
  1411. e1000_reset(adapter);
  1412. clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1413. if (if_running)
  1414. dev_open(netdev);
  1415. } else {
  1416. DPRINTK(HW, INFO, "online testing starting\n");
  1417. /* Online tests */
  1418. if (e1000_link_test(adapter, &data[4]))
  1419. eth_test->flags |= ETH_TEST_FL_FAILED;
  1420. /* Offline tests aren't run; pass by default */
  1421. data[0] = 0;
  1422. data[1] = 0;
  1423. data[2] = 0;
  1424. data[3] = 0;
  1425. clear_bit(__E1000_DRIVER_TESTING, &adapter->flags);
  1426. }
  1427. msleep_interruptible(4 * 1000);
  1428. }
  1429. static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
  1430. {
  1431. struct e1000_hw *hw = &adapter->hw;
  1432. int retval = 1; /* fail by default */
  1433. switch (hw->device_id) {
  1434. case E1000_DEV_ID_82543GC_FIBER:
  1435. case E1000_DEV_ID_82543GC_COPPER:
  1436. case E1000_DEV_ID_82544EI_FIBER:
  1437. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1438. case E1000_DEV_ID_82545EM_FIBER:
  1439. case E1000_DEV_ID_82545EM_COPPER:
  1440. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1441. case E1000_DEV_ID_82546GB_PCIE:
  1442. /* these don't support WoL at all */
  1443. wol->supported = 0;
  1444. break;
  1445. case E1000_DEV_ID_82546EB_FIBER:
  1446. case E1000_DEV_ID_82546GB_FIBER:
  1447. case E1000_DEV_ID_82571EB_FIBER:
  1448. case E1000_DEV_ID_82571EB_SERDES:
  1449. case E1000_DEV_ID_82571EB_COPPER:
  1450. /* Wake events not supported on port B */
  1451. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1452. wol->supported = 0;
  1453. break;
  1454. }
  1455. /* return success for non excluded adapter ports */
  1456. retval = 0;
  1457. break;
  1458. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  1459. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1460. /* quad port adapters only support WoL on port A */
  1461. if (!adapter->quad_port_a) {
  1462. wol->supported = 0;
  1463. break;
  1464. }
  1465. /* return success for non excluded adapter ports */
  1466. retval = 0;
  1467. break;
  1468. default:
  1469. /* dual port cards only support WoL on port A from now on
  1470. * unless it was enabled in the eeprom for port B
  1471. * so exclude FUNC_1 ports from having WoL enabled */
  1472. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
  1473. !adapter->eeprom_wol) {
  1474. wol->supported = 0;
  1475. break;
  1476. }
  1477. retval = 0;
  1478. }
  1479. return retval;
  1480. }
  1481. static void
  1482. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1483. {
  1484. struct e1000_adapter *adapter = netdev_priv(netdev);
  1485. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1486. WAKE_BCAST | WAKE_MAGIC;
  1487. wol->wolopts = 0;
  1488. /* this function will set ->supported = 0 and return 1 if wol is not
  1489. * supported by this hardware */
  1490. if (e1000_wol_exclusion(adapter, wol))
  1491. return;
  1492. /* apply any specific unsupported masks here */
  1493. switch (adapter->hw.device_id) {
  1494. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1495. /* KSP3 does not suppport UCAST wake-ups */
  1496. wol->supported &= ~WAKE_UCAST;
  1497. if (adapter->wol & E1000_WUFC_EX)
  1498. DPRINTK(DRV, ERR, "Interface does not support "
  1499. "directed (unicast) frame wake-up packets\n");
  1500. break;
  1501. default:
  1502. break;
  1503. }
  1504. if (adapter->wol & E1000_WUFC_EX)
  1505. wol->wolopts |= WAKE_UCAST;
  1506. if (adapter->wol & E1000_WUFC_MC)
  1507. wol->wolopts |= WAKE_MCAST;
  1508. if (adapter->wol & E1000_WUFC_BC)
  1509. wol->wolopts |= WAKE_BCAST;
  1510. if (adapter->wol & E1000_WUFC_MAG)
  1511. wol->wolopts |= WAKE_MAGIC;
  1512. return;
  1513. }
  1514. static int
  1515. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1516. {
  1517. struct e1000_adapter *adapter = netdev_priv(netdev);
  1518. struct e1000_hw *hw = &adapter->hw;
  1519. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1520. return -EOPNOTSUPP;
  1521. if (e1000_wol_exclusion(adapter, wol))
  1522. return wol->wolopts ? -EOPNOTSUPP : 0;
  1523. switch (hw->device_id) {
  1524. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1525. if (wol->wolopts & WAKE_UCAST) {
  1526. DPRINTK(DRV, ERR, "Interface does not support "
  1527. "directed (unicast) frame wake-up packets\n");
  1528. return -EOPNOTSUPP;
  1529. }
  1530. break;
  1531. default:
  1532. break;
  1533. }
  1534. /* these settings will always override what we currently have */
  1535. adapter->wol = 0;
  1536. if (wol->wolopts & WAKE_UCAST)
  1537. adapter->wol |= E1000_WUFC_EX;
  1538. if (wol->wolopts & WAKE_MCAST)
  1539. adapter->wol |= E1000_WUFC_MC;
  1540. if (wol->wolopts & WAKE_BCAST)
  1541. adapter->wol |= E1000_WUFC_BC;
  1542. if (wol->wolopts & WAKE_MAGIC)
  1543. adapter->wol |= E1000_WUFC_MAG;
  1544. return 0;
  1545. }
  1546. /* toggle LED 4 times per second = 2 "blinks" per second */
  1547. #define E1000_ID_INTERVAL (HZ/4)
  1548. /* bit defines for adapter->led_status */
  1549. #define E1000_LED_ON 0
  1550. static void
  1551. e1000_led_blink_callback(unsigned long data)
  1552. {
  1553. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1554. if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1555. e1000_led_off(&adapter->hw);
  1556. else
  1557. e1000_led_on(&adapter->hw);
  1558. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1559. }
  1560. static int
  1561. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1562. {
  1563. struct e1000_adapter *adapter = netdev_priv(netdev);
  1564. if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1565. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1566. if (adapter->hw.mac_type < e1000_82571) {
  1567. if (!adapter->blink_timer.function) {
  1568. init_timer(&adapter->blink_timer);
  1569. adapter->blink_timer.function = e1000_led_blink_callback;
  1570. adapter->blink_timer.data = (unsigned long) adapter;
  1571. }
  1572. e1000_setup_led(&adapter->hw);
  1573. mod_timer(&adapter->blink_timer, jiffies);
  1574. msleep_interruptible(data * 1000);
  1575. del_timer_sync(&adapter->blink_timer);
  1576. } else if (adapter->hw.phy_type == e1000_phy_ife) {
  1577. if (!adapter->blink_timer.function) {
  1578. init_timer(&adapter->blink_timer);
  1579. adapter->blink_timer.function = e1000_led_blink_callback;
  1580. adapter->blink_timer.data = (unsigned long) adapter;
  1581. }
  1582. mod_timer(&adapter->blink_timer, jiffies);
  1583. msleep_interruptible(data * 1000);
  1584. del_timer_sync(&adapter->blink_timer);
  1585. e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
  1586. } else {
  1587. e1000_blink_led_start(&adapter->hw);
  1588. msleep_interruptible(data * 1000);
  1589. }
  1590. e1000_led_off(&adapter->hw);
  1591. clear_bit(E1000_LED_ON, &adapter->led_status);
  1592. e1000_cleanup_led(&adapter->hw);
  1593. return 0;
  1594. }
  1595. static int
  1596. e1000_nway_reset(struct net_device *netdev)
  1597. {
  1598. struct e1000_adapter *adapter = netdev_priv(netdev);
  1599. if (netif_running(netdev))
  1600. e1000_reinit_locked(adapter);
  1601. return 0;
  1602. }
  1603. static int
  1604. e1000_get_stats_count(struct net_device *netdev)
  1605. {
  1606. return E1000_STATS_LEN;
  1607. }
  1608. static void
  1609. e1000_get_ethtool_stats(struct net_device *netdev,
  1610. struct ethtool_stats *stats, uint64_t *data)
  1611. {
  1612. struct e1000_adapter *adapter = netdev_priv(netdev);
  1613. int i;
  1614. e1000_update_stats(adapter);
  1615. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1616. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1617. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1618. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1619. }
  1620. /* BUG_ON(i != E1000_STATS_LEN); */
  1621. }
  1622. static void
  1623. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1624. {
  1625. uint8_t *p = data;
  1626. int i;
  1627. switch (stringset) {
  1628. case ETH_SS_TEST:
  1629. memcpy(data, *e1000_gstrings_test,
  1630. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1631. break;
  1632. case ETH_SS_STATS:
  1633. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1634. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1635. ETH_GSTRING_LEN);
  1636. p += ETH_GSTRING_LEN;
  1637. }
  1638. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1639. break;
  1640. }
  1641. }
  1642. static const struct ethtool_ops e1000_ethtool_ops = {
  1643. .get_settings = e1000_get_settings,
  1644. .set_settings = e1000_set_settings,
  1645. .get_drvinfo = e1000_get_drvinfo,
  1646. .get_regs_len = e1000_get_regs_len,
  1647. .get_regs = e1000_get_regs,
  1648. .get_wol = e1000_get_wol,
  1649. .set_wol = e1000_set_wol,
  1650. .get_msglevel = e1000_get_msglevel,
  1651. .set_msglevel = e1000_set_msglevel,
  1652. .nway_reset = e1000_nway_reset,
  1653. .get_link = ethtool_op_get_link,
  1654. .get_eeprom_len = e1000_get_eeprom_len,
  1655. .get_eeprom = e1000_get_eeprom,
  1656. .set_eeprom = e1000_set_eeprom,
  1657. .get_ringparam = e1000_get_ringparam,
  1658. .set_ringparam = e1000_set_ringparam,
  1659. .get_pauseparam = e1000_get_pauseparam,
  1660. .set_pauseparam = e1000_set_pauseparam,
  1661. .get_rx_csum = e1000_get_rx_csum,
  1662. .set_rx_csum = e1000_set_rx_csum,
  1663. .get_tx_csum = e1000_get_tx_csum,
  1664. .set_tx_csum = e1000_set_tx_csum,
  1665. .get_sg = ethtool_op_get_sg,
  1666. .set_sg = ethtool_op_set_sg,
  1667. #ifdef NETIF_F_TSO
  1668. .get_tso = ethtool_op_get_tso,
  1669. .set_tso = e1000_set_tso,
  1670. #endif
  1671. .self_test_count = e1000_diag_test_count,
  1672. .self_test = e1000_diag_test,
  1673. .get_strings = e1000_get_strings,
  1674. .phys_id = e1000_phys_id,
  1675. .get_stats_count = e1000_get_stats_count,
  1676. .get_ethtool_stats = e1000_get_ethtool_stats,
  1677. .get_perm_addr = ethtool_op_get_perm_addr,
  1678. };
  1679. void e1000_set_ethtool_ops(struct net_device *netdev)
  1680. {
  1681. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1682. }