f71805f.c 24 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated
  3. * hardware monitoring features
  4. * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. #include <asm/io.h>
  34. static struct platform_device *pdev;
  35. #define DRVNAME "f71805f"
  36. /*
  37. * Super-I/O constants and functions
  38. */
  39. #define F71805F_LD_HWM 0x04
  40. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  41. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  42. #define SIO_REG_DEVREV 0x22 /* Device revision */
  43. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  44. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  45. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  46. #define SIO_FINTEK_ID 0x1934
  47. #define SIO_F71805F_ID 0x0406
  48. static inline int
  49. superio_inb(int base, int reg)
  50. {
  51. outb(reg, base);
  52. return inb(base + 1);
  53. }
  54. static int
  55. superio_inw(int base, int reg)
  56. {
  57. int val;
  58. outb(reg++, base);
  59. val = inb(base + 1) << 8;
  60. outb(reg, base);
  61. val |= inb(base + 1);
  62. return val;
  63. }
  64. static inline void
  65. superio_select(int base, int ld)
  66. {
  67. outb(SIO_REG_LDSEL, base);
  68. outb(ld, base + 1);
  69. }
  70. static inline void
  71. superio_enter(int base)
  72. {
  73. outb(0x87, base);
  74. outb(0x87, base);
  75. }
  76. static inline void
  77. superio_exit(int base)
  78. {
  79. outb(0xaa, base);
  80. }
  81. /*
  82. * ISA constants
  83. */
  84. #define REGION_LENGTH 2
  85. #define ADDR_REG_OFFSET 0
  86. #define DATA_REG_OFFSET 1
  87. /*
  88. * Registers
  89. */
  90. /* in nr from 0 to 8 (8-bit values) */
  91. #define F71805F_REG_IN(nr) (0x10 + (nr))
  92. #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr))
  93. #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr))
  94. /* fan nr from 0 to 2 (12-bit values, two registers) */
  95. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  96. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  97. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  98. /* temp nr from 0 to 2 (8-bit values) */
  99. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  100. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  101. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  102. #define F71805F_REG_TEMP_MODE 0x01
  103. #define F71805F_REG_START 0x00
  104. /* status nr from 0 to 2 */
  105. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  106. /*
  107. * Data structures and manipulation thereof
  108. */
  109. struct f71805f_data {
  110. unsigned short addr;
  111. const char *name;
  112. struct mutex lock;
  113. struct class_device *class_dev;
  114. struct mutex update_lock;
  115. char valid; /* !=0 if following fields are valid */
  116. unsigned long last_updated; /* In jiffies */
  117. unsigned long last_limits; /* In jiffies */
  118. /* Register values */
  119. u8 in[9];
  120. u8 in_high[9];
  121. u8 in_low[9];
  122. u16 fan[3];
  123. u16 fan_low[3];
  124. u8 fan_enabled; /* Read once at init time */
  125. u8 temp[3];
  126. u8 temp_high[3];
  127. u8 temp_hyst[3];
  128. u8 temp_mode;
  129. u8 alarms[3];
  130. };
  131. static inline long in_from_reg(u8 reg)
  132. {
  133. return (reg * 8);
  134. }
  135. /* The 2 least significant bits are not used */
  136. static inline u8 in_to_reg(long val)
  137. {
  138. if (val <= 0)
  139. return 0;
  140. if (val >= 2016)
  141. return 0xfc;
  142. return (((val + 16) / 32) << 2);
  143. }
  144. /* in0 is downscaled by a factor 2 internally */
  145. static inline long in0_from_reg(u8 reg)
  146. {
  147. return (reg * 16);
  148. }
  149. static inline u8 in0_to_reg(long val)
  150. {
  151. if (val <= 0)
  152. return 0;
  153. if (val >= 4032)
  154. return 0xfc;
  155. return (((val + 32) / 64) << 2);
  156. }
  157. /* The 4 most significant bits are not used */
  158. static inline long fan_from_reg(u16 reg)
  159. {
  160. reg &= 0xfff;
  161. if (!reg || reg == 0xfff)
  162. return 0;
  163. return (1500000 / reg);
  164. }
  165. static inline u16 fan_to_reg(long rpm)
  166. {
  167. /* If the low limit is set below what the chip can measure,
  168. store the largest possible 12-bit value in the registers,
  169. so that no alarm will ever trigger. */
  170. if (rpm < 367)
  171. return 0xfff;
  172. return (1500000 / rpm);
  173. }
  174. static inline long temp_from_reg(u8 reg)
  175. {
  176. return (reg * 1000);
  177. }
  178. static inline u8 temp_to_reg(long val)
  179. {
  180. if (val < 0)
  181. val = 0;
  182. else if (val > 1000 * 0xff)
  183. val = 0xff;
  184. return ((val + 500) / 1000);
  185. }
  186. /*
  187. * Device I/O access
  188. */
  189. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  190. {
  191. u8 val;
  192. mutex_lock(&data->lock);
  193. outb(reg, data->addr + ADDR_REG_OFFSET);
  194. val = inb(data->addr + DATA_REG_OFFSET);
  195. mutex_unlock(&data->lock);
  196. return val;
  197. }
  198. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  199. {
  200. mutex_lock(&data->lock);
  201. outb(reg, data->addr + ADDR_REG_OFFSET);
  202. outb(val, data->addr + DATA_REG_OFFSET);
  203. mutex_unlock(&data->lock);
  204. }
  205. /* It is important to read the MSB first, because doing so latches the
  206. value of the LSB, so we are sure both bytes belong to the same value. */
  207. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  208. {
  209. u16 val;
  210. mutex_lock(&data->lock);
  211. outb(reg, data->addr + ADDR_REG_OFFSET);
  212. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  213. outb(++reg, data->addr + ADDR_REG_OFFSET);
  214. val |= inb(data->addr + DATA_REG_OFFSET);
  215. mutex_unlock(&data->lock);
  216. return val;
  217. }
  218. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  219. {
  220. mutex_lock(&data->lock);
  221. outb(reg, data->addr + ADDR_REG_OFFSET);
  222. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  223. outb(++reg, data->addr + ADDR_REG_OFFSET);
  224. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  225. mutex_unlock(&data->lock);
  226. }
  227. static struct f71805f_data *f71805f_update_device(struct device *dev)
  228. {
  229. struct f71805f_data *data = dev_get_drvdata(dev);
  230. int nr;
  231. mutex_lock(&data->update_lock);
  232. /* Limit registers cache is refreshed after 60 seconds */
  233. if (time_after(jiffies, data->last_updated + 60 * HZ)
  234. || !data->valid) {
  235. for (nr = 0; nr < 9; nr++) {
  236. data->in_high[nr] = f71805f_read8(data,
  237. F71805F_REG_IN_HIGH(nr));
  238. data->in_low[nr] = f71805f_read8(data,
  239. F71805F_REG_IN_LOW(nr));
  240. }
  241. for (nr = 0; nr < 3; nr++) {
  242. if (data->fan_enabled & (1 << nr))
  243. data->fan_low[nr] = f71805f_read16(data,
  244. F71805F_REG_FAN_LOW(nr));
  245. }
  246. for (nr = 0; nr < 3; nr++) {
  247. data->temp_high[nr] = f71805f_read8(data,
  248. F71805F_REG_TEMP_HIGH(nr));
  249. data->temp_hyst[nr] = f71805f_read8(data,
  250. F71805F_REG_TEMP_HYST(nr));
  251. }
  252. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  253. data->last_limits = jiffies;
  254. }
  255. /* Measurement registers cache is refreshed after 1 second */
  256. if (time_after(jiffies, data->last_updated + HZ)
  257. || !data->valid) {
  258. for (nr = 0; nr < 9; nr++) {
  259. data->in[nr] = f71805f_read8(data,
  260. F71805F_REG_IN(nr));
  261. }
  262. for (nr = 0; nr < 3; nr++) {
  263. if (data->fan_enabled & (1 << nr))
  264. data->fan[nr] = f71805f_read16(data,
  265. F71805F_REG_FAN(nr));
  266. }
  267. for (nr = 0; nr < 3; nr++) {
  268. data->temp[nr] = f71805f_read8(data,
  269. F71805F_REG_TEMP(nr));
  270. }
  271. for (nr = 0; nr < 3; nr++) {
  272. data->alarms[nr] = f71805f_read8(data,
  273. F71805F_REG_STATUS(nr));
  274. }
  275. data->last_updated = jiffies;
  276. data->valid = 1;
  277. }
  278. mutex_unlock(&data->update_lock);
  279. return data;
  280. }
  281. /*
  282. * Sysfs interface
  283. */
  284. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  285. char *buf)
  286. {
  287. struct f71805f_data *data = f71805f_update_device(dev);
  288. return sprintf(buf, "%ld\n", in0_from_reg(data->in[0]));
  289. }
  290. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  291. *devattr, char *buf)
  292. {
  293. struct f71805f_data *data = f71805f_update_device(dev);
  294. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0]));
  295. }
  296. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  297. *devattr, char *buf)
  298. {
  299. struct f71805f_data *data = f71805f_update_device(dev);
  300. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0]));
  301. }
  302. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  303. *devattr, const char *buf, size_t count)
  304. {
  305. struct f71805f_data *data = dev_get_drvdata(dev);
  306. long val = simple_strtol(buf, NULL, 10);
  307. mutex_lock(&data->update_lock);
  308. data->in_high[0] = in0_to_reg(val);
  309. f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]);
  310. mutex_unlock(&data->update_lock);
  311. return count;
  312. }
  313. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  314. *devattr, const char *buf, size_t count)
  315. {
  316. struct f71805f_data *data = dev_get_drvdata(dev);
  317. long val = simple_strtol(buf, NULL, 10);
  318. mutex_lock(&data->update_lock);
  319. data->in_low[0] = in0_to_reg(val);
  320. f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]);
  321. mutex_unlock(&data->update_lock);
  322. return count;
  323. }
  324. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  325. char *buf)
  326. {
  327. struct f71805f_data *data = f71805f_update_device(dev);
  328. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  329. int nr = attr->index;
  330. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  331. }
  332. static ssize_t show_in_max(struct device *dev, struct device_attribute
  333. *devattr, char *buf)
  334. {
  335. struct f71805f_data *data = f71805f_update_device(dev);
  336. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  337. int nr = attr->index;
  338. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  339. }
  340. static ssize_t show_in_min(struct device *dev, struct device_attribute
  341. *devattr, char *buf)
  342. {
  343. struct f71805f_data *data = f71805f_update_device(dev);
  344. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  345. int nr = attr->index;
  346. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  347. }
  348. static ssize_t set_in_max(struct device *dev, struct device_attribute
  349. *devattr, const char *buf, size_t count)
  350. {
  351. struct f71805f_data *data = dev_get_drvdata(dev);
  352. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  353. int nr = attr->index;
  354. long val = simple_strtol(buf, NULL, 10);
  355. mutex_lock(&data->update_lock);
  356. data->in_high[nr] = in_to_reg(val);
  357. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  358. mutex_unlock(&data->update_lock);
  359. return count;
  360. }
  361. static ssize_t set_in_min(struct device *dev, struct device_attribute
  362. *devattr, const char *buf, size_t count)
  363. {
  364. struct f71805f_data *data = dev_get_drvdata(dev);
  365. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  366. int nr = attr->index;
  367. long val = simple_strtol(buf, NULL, 10);
  368. mutex_lock(&data->update_lock);
  369. data->in_low[nr] = in_to_reg(val);
  370. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  371. mutex_unlock(&data->update_lock);
  372. return count;
  373. }
  374. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  375. char *buf)
  376. {
  377. struct f71805f_data *data = f71805f_update_device(dev);
  378. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  379. int nr = attr->index;
  380. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  381. }
  382. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  383. *devattr, char *buf)
  384. {
  385. struct f71805f_data *data = f71805f_update_device(dev);
  386. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  387. int nr = attr->index;
  388. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  389. }
  390. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  391. *devattr, const char *buf, size_t count)
  392. {
  393. struct f71805f_data *data = dev_get_drvdata(dev);
  394. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  395. int nr = attr->index;
  396. long val = simple_strtol(buf, NULL, 10);
  397. mutex_lock(&data->update_lock);
  398. data->fan_low[nr] = fan_to_reg(val);
  399. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  400. mutex_unlock(&data->update_lock);
  401. return count;
  402. }
  403. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  404. char *buf)
  405. {
  406. struct f71805f_data *data = f71805f_update_device(dev);
  407. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  408. int nr = attr->index;
  409. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  410. }
  411. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  412. *devattr, char *buf)
  413. {
  414. struct f71805f_data *data = f71805f_update_device(dev);
  415. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  416. int nr = attr->index;
  417. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  418. }
  419. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  420. *devattr, char *buf)
  421. {
  422. struct f71805f_data *data = f71805f_update_device(dev);
  423. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  424. int nr = attr->index;
  425. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  426. }
  427. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  428. *devattr, char *buf)
  429. {
  430. struct f71805f_data *data = f71805f_update_device(dev);
  431. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  432. int nr = attr->index;
  433. /* 3 is diode, 4 is thermistor */
  434. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  435. }
  436. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  437. *devattr, const char *buf, size_t count)
  438. {
  439. struct f71805f_data *data = dev_get_drvdata(dev);
  440. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  441. int nr = attr->index;
  442. long val = simple_strtol(buf, NULL, 10);
  443. mutex_lock(&data->update_lock);
  444. data->temp_high[nr] = temp_to_reg(val);
  445. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  446. mutex_unlock(&data->update_lock);
  447. return count;
  448. }
  449. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  450. *devattr, const char *buf, size_t count)
  451. {
  452. struct f71805f_data *data = dev_get_drvdata(dev);
  453. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  454. int nr = attr->index;
  455. long val = simple_strtol(buf, NULL, 10);
  456. mutex_lock(&data->update_lock);
  457. data->temp_hyst[nr] = temp_to_reg(val);
  458. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  459. mutex_unlock(&data->update_lock);
  460. return count;
  461. }
  462. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  463. *devattr, char *buf)
  464. {
  465. struct f71805f_data *data = f71805f_update_device(dev);
  466. return sprintf(buf, "%d\n", data->alarms[0] |
  467. ((data->alarms[1] & 0x01) << 8));
  468. }
  469. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  470. *devattr, char *buf)
  471. {
  472. struct f71805f_data *data = f71805f_update_device(dev);
  473. return sprintf(buf, "%d\n", data->alarms[2] & 0x07);
  474. }
  475. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  476. *devattr, char *buf)
  477. {
  478. struct f71805f_data *data = f71805f_update_device(dev);
  479. return sprintf(buf, "%d\n", (data->alarms[1] >> 3) & 0x07);
  480. }
  481. static ssize_t show_name(struct device *dev, struct device_attribute
  482. *devattr, char *buf)
  483. {
  484. struct f71805f_data *data = dev_get_drvdata(dev);
  485. return sprintf(buf, "%s\n", data->name);
  486. }
  487. static struct device_attribute f71805f_dev_attr[] = {
  488. __ATTR(in0_input, S_IRUGO, show_in0, NULL),
  489. __ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max),
  490. __ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min),
  491. __ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL),
  492. __ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL),
  493. __ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL),
  494. __ATTR(name, S_IRUGO, show_name, NULL),
  495. };
  496. static struct sensor_device_attribute f71805f_sensor_attr[] = {
  497. SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
  498. SENSOR_ATTR(in1_max, S_IRUGO | S_IWUSR,
  499. show_in_max, set_in_max, 1),
  500. SENSOR_ATTR(in1_min, S_IRUGO | S_IWUSR,
  501. show_in_min, set_in_min, 1),
  502. SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
  503. SENSOR_ATTR(in2_max, S_IRUGO | S_IWUSR,
  504. show_in_max, set_in_max, 2),
  505. SENSOR_ATTR(in2_min, S_IRUGO | S_IWUSR,
  506. show_in_min, set_in_min, 2),
  507. SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
  508. SENSOR_ATTR(in3_max, S_IRUGO | S_IWUSR,
  509. show_in_max, set_in_max, 3),
  510. SENSOR_ATTR(in3_min, S_IRUGO | S_IWUSR,
  511. show_in_min, set_in_min, 3),
  512. SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
  513. SENSOR_ATTR(in4_max, S_IRUGO | S_IWUSR,
  514. show_in_max, set_in_max, 4),
  515. SENSOR_ATTR(in4_min, S_IRUGO | S_IWUSR,
  516. show_in_min, set_in_min, 4),
  517. SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
  518. SENSOR_ATTR(in5_max, S_IRUGO | S_IWUSR,
  519. show_in_max, set_in_max, 5),
  520. SENSOR_ATTR(in5_min, S_IRUGO | S_IWUSR,
  521. show_in_min, set_in_min, 5),
  522. SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
  523. SENSOR_ATTR(in6_max, S_IRUGO | S_IWUSR,
  524. show_in_max, set_in_max, 6),
  525. SENSOR_ATTR(in6_min, S_IRUGO | S_IWUSR,
  526. show_in_min, set_in_min, 6),
  527. SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
  528. SENSOR_ATTR(in7_max, S_IRUGO | S_IWUSR,
  529. show_in_max, set_in_max, 7),
  530. SENSOR_ATTR(in7_min, S_IRUGO | S_IWUSR,
  531. show_in_min, set_in_min, 7),
  532. SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
  533. SENSOR_ATTR(in8_max, S_IRUGO | S_IWUSR,
  534. show_in_max, set_in_max, 8),
  535. SENSOR_ATTR(in8_min, S_IRUGO | S_IWUSR,
  536. show_in_min, set_in_min, 8),
  537. SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
  538. SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  539. show_temp_max, set_temp_max, 0),
  540. SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  541. show_temp_hyst, set_temp_hyst, 0),
  542. SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
  543. SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
  544. SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  545. show_temp_max, set_temp_max, 1),
  546. SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  547. show_temp_hyst, set_temp_hyst, 1),
  548. SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
  549. SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
  550. SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  551. show_temp_max, set_temp_max, 2),
  552. SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  553. show_temp_hyst, set_temp_hyst, 2),
  554. SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
  555. };
  556. static struct sensor_device_attribute f71805f_fan_attr[] = {
  557. SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
  558. SENSOR_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  559. show_fan_min, set_fan_min, 0),
  560. SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
  561. SENSOR_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  562. show_fan_min, set_fan_min, 1),
  563. SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
  564. SENSOR_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  565. show_fan_min, set_fan_min, 2),
  566. };
  567. /*
  568. * Device registration and initialization
  569. */
  570. static void __devinit f71805f_init_device(struct f71805f_data *data)
  571. {
  572. u8 reg;
  573. int i;
  574. reg = f71805f_read8(data, F71805F_REG_START);
  575. if ((reg & 0x41) != 0x01) {
  576. printk(KERN_DEBUG DRVNAME ": Starting monitoring "
  577. "operations\n");
  578. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  579. }
  580. /* Fan monitoring can be disabled. If it is, we won't be polling
  581. the register values, and won't create the related sysfs files. */
  582. for (i = 0; i < 3; i++) {
  583. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(i));
  584. if (!(reg & 0x80))
  585. data->fan_enabled |= (1 << i);
  586. }
  587. }
  588. static int __devinit f71805f_probe(struct platform_device *pdev)
  589. {
  590. struct f71805f_data *data;
  591. struct resource *res;
  592. int i, err;
  593. if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
  594. err = -ENOMEM;
  595. printk(KERN_ERR DRVNAME ": Out of memory\n");
  596. goto exit;
  597. }
  598. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  599. data->addr = res->start;
  600. mutex_init(&data->lock);
  601. data->name = "f71805f";
  602. mutex_init(&data->update_lock);
  603. platform_set_drvdata(pdev, data);
  604. data->class_dev = hwmon_device_register(&pdev->dev);
  605. if (IS_ERR(data->class_dev)) {
  606. err = PTR_ERR(data->class_dev);
  607. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  608. goto exit_free;
  609. }
  610. /* Initialize the F71805F chip */
  611. f71805f_init_device(data);
  612. /* Register sysfs interface files */
  613. for (i = 0; i < ARRAY_SIZE(f71805f_dev_attr); i++) {
  614. err = device_create_file(&pdev->dev, &f71805f_dev_attr[i]);
  615. if (err)
  616. goto exit_class;
  617. }
  618. for (i = 0; i < ARRAY_SIZE(f71805f_sensor_attr); i++) {
  619. err = device_create_file(&pdev->dev,
  620. &f71805f_sensor_attr[i].dev_attr);
  621. if (err)
  622. goto exit_class;
  623. }
  624. for (i = 0; i < ARRAY_SIZE(f71805f_fan_attr); i++) {
  625. if (!(data->fan_enabled & (1 << (i / 2))))
  626. continue;
  627. err = device_create_file(&pdev->dev,
  628. &f71805f_fan_attr[i].dev_attr);
  629. if (err)
  630. goto exit_class;
  631. }
  632. return 0;
  633. exit_class:
  634. dev_err(&pdev->dev, "Sysfs interface creation failed\n");
  635. hwmon_device_unregister(data->class_dev);
  636. exit_free:
  637. kfree(data);
  638. exit:
  639. return err;
  640. }
  641. static int __devexit f71805f_remove(struct platform_device *pdev)
  642. {
  643. struct f71805f_data *data = platform_get_drvdata(pdev);
  644. platform_set_drvdata(pdev, NULL);
  645. hwmon_device_unregister(data->class_dev);
  646. kfree(data);
  647. return 0;
  648. }
  649. static struct platform_driver f71805f_driver = {
  650. .driver = {
  651. .owner = THIS_MODULE,
  652. .name = DRVNAME,
  653. },
  654. .probe = f71805f_probe,
  655. .remove = __devexit_p(f71805f_remove),
  656. };
  657. static int __init f71805f_device_add(unsigned short address)
  658. {
  659. struct resource res = {
  660. .start = address,
  661. .end = address + REGION_LENGTH - 1,
  662. .flags = IORESOURCE_IO,
  663. };
  664. int err;
  665. pdev = platform_device_alloc(DRVNAME, address);
  666. if (!pdev) {
  667. err = -ENOMEM;
  668. printk(KERN_ERR DRVNAME ": Device allocation failed\n");
  669. goto exit;
  670. }
  671. res.name = pdev->name;
  672. err = platform_device_add_resources(pdev, &res, 1);
  673. if (err) {
  674. printk(KERN_ERR DRVNAME ": Device resource addition failed "
  675. "(%d)\n", err);
  676. goto exit_device_put;
  677. }
  678. err = platform_device_add(pdev);
  679. if (err) {
  680. printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
  681. err);
  682. goto exit_device_put;
  683. }
  684. return 0;
  685. exit_device_put:
  686. platform_device_put(pdev);
  687. exit:
  688. return err;
  689. }
  690. static int __init f71805f_find(int sioaddr, unsigned short *address)
  691. {
  692. int err = -ENODEV;
  693. u16 devid;
  694. superio_enter(sioaddr);
  695. devid = superio_inw(sioaddr, SIO_REG_MANID);
  696. if (devid != SIO_FINTEK_ID)
  697. goto exit;
  698. devid = superio_inw(sioaddr, SIO_REG_DEVID);
  699. if (devid != SIO_F71805F_ID) {
  700. printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
  701. "skipping\n");
  702. goto exit;
  703. }
  704. superio_select(sioaddr, F71805F_LD_HWM);
  705. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  706. printk(KERN_WARNING DRVNAME ": Device not activated, "
  707. "skipping\n");
  708. goto exit;
  709. }
  710. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  711. if (*address == 0) {
  712. printk(KERN_WARNING DRVNAME ": Base address not set, "
  713. "skipping\n");
  714. goto exit;
  715. }
  716. err = 0;
  717. printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n",
  718. *address, superio_inb(sioaddr, SIO_REG_DEVREV));
  719. exit:
  720. superio_exit(sioaddr);
  721. return err;
  722. }
  723. static int __init f71805f_init(void)
  724. {
  725. int err;
  726. unsigned short address;
  727. if (f71805f_find(0x2e, &address)
  728. && f71805f_find(0x4e, &address))
  729. return -ENODEV;
  730. err = platform_driver_register(&f71805f_driver);
  731. if (err)
  732. goto exit;
  733. /* Sets global pdev as a side effect */
  734. err = f71805f_device_add(address);
  735. if (err)
  736. goto exit_driver;
  737. return 0;
  738. exit_driver:
  739. platform_driver_unregister(&f71805f_driver);
  740. exit:
  741. return err;
  742. }
  743. static void __exit f71805f_exit(void)
  744. {
  745. platform_device_unregister(pdev);
  746. platform_driver_unregister(&f71805f_driver);
  747. }
  748. MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
  749. MODULE_LICENSE("GPL");
  750. MODULE_DESCRIPTION("F71805F hardware monitoring driver");
  751. module_init(f71805f_init);
  752. module_exit(f71805f_exit);