pata_opti.c 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292
  1. /*
  2. * pata_opti.c - ATI PATA for new ATA layer
  3. * (C) 2005 Red Hat Inc
  4. * Alan Cox <alan@redhat.com>
  5. *
  6. * Based on
  7. * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
  8. *
  9. * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
  10. *
  11. * Authors:
  12. * Jaromir Koutek <miri@punknet.cz>,
  13. * Jan Harkes <jaharkes@cwi.nl>,
  14. * Mark Lord <mlord@pobox.com>
  15. * Some parts of code are from ali14xx.c and from rz1000.c.
  16. *
  17. * Also consulted the FreeBSD prototype driver by Kevin Day to try
  18. * and resolve some confusions. Further documentation can be found in
  19. * Ralf Brown's interrupt list
  20. *
  21. * If you have other variants of the Opti range (Viper/Vendetta) please
  22. * try this driver with those PCI idents and report back. For the later
  23. * chips see the pata_optidma driver
  24. *
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/init.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/delay.h>
  32. #include <scsi/scsi_host.h>
  33. #include <linux/libata.h>
  34. #define DRV_NAME "pata_opti"
  35. #define DRV_VERSION "0.2.4"
  36. enum {
  37. READ_REG = 0, /* index of Read cycle timing register */
  38. WRITE_REG = 1, /* index of Write cycle timing register */
  39. CNTRL_REG = 3, /* index of Control register */
  40. STRAP_REG = 5, /* index of Strap register */
  41. MISC_REG = 6 /* index of Miscellaneous register */
  42. };
  43. /**
  44. * opti_pre_reset - probe begin
  45. * @ap: ATA port
  46. *
  47. * Set up cable type and use generic probe init
  48. */
  49. static int opti_pre_reset(struct ata_port *ap)
  50. {
  51. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  52. static const struct pci_bits opti_enable_bits[] = {
  53. { 0x45, 1, 0x80, 0x00 },
  54. { 0x40, 1, 0x08, 0x00 }
  55. };
  56. if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) {
  57. ata_port_disable(ap);
  58. printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
  59. return 0;
  60. }
  61. ap->cbl = ATA_CBL_PATA40;
  62. return ata_std_prereset(ap);
  63. }
  64. /**
  65. * opti_probe_reset - probe reset
  66. * @ap: ATA port
  67. *
  68. * Perform the ATA probe and bus reset sequence plus specific handling
  69. * for this hardware. The Opti needs little handling - we have no UDMA66
  70. * capability that needs cable detection. All we must do is check the port
  71. * is enabled.
  72. */
  73. static void opti_error_handler(struct ata_port *ap)
  74. {
  75. ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  76. }
  77. /**
  78. * opti_write_reg - control register setup
  79. * @ap: ATA port
  80. * @value: value
  81. * @reg: control register number
  82. *
  83. * The Opti uses magic 'trapdoor' register accesses to do configuration
  84. * rather than using PCI space as other controllers do. The double inw
  85. * on the error register activates configuration mode. We can then write
  86. * the control register
  87. */
  88. static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
  89. {
  90. unsigned long regio = ap->ioaddr.cmd_addr;
  91. /* These 3 unlock the control register access */
  92. inw(regio + 1);
  93. inw(regio + 1);
  94. outb(3, regio + 2);
  95. /* Do the I/O */
  96. outb(val, regio + reg);
  97. /* Relock */
  98. outb(0x83, regio + 2);
  99. }
  100. #if 0
  101. /**
  102. * opti_read_reg - control register read
  103. * @ap: ATA port
  104. * @reg: control register number
  105. *
  106. * The Opti uses magic 'trapdoor' register accesses to do configuration
  107. * rather than using PCI space as other controllers do. The double inw
  108. * on the error register activates configuration mode. We can then read
  109. * the control register
  110. */
  111. static u8 opti_read_reg(struct ata_port *ap, int reg)
  112. {
  113. unsigned long regio = ap->ioaddr.cmd_addr;
  114. u8 ret;
  115. inw(regio + 1);
  116. inw(regio + 1);
  117. outb(3, regio + 2);
  118. ret = inb(regio + reg);
  119. outb(0x83, regio + 2);
  120. }
  121. #endif
  122. /**
  123. * opti_set_piomode - set initial PIO mode data
  124. * @ap: ATA interface
  125. * @adev: ATA device
  126. *
  127. * Called to do the PIO mode setup. Timing numbers are taken from
  128. * the FreeBSD driver then pre computed to keep the code clean. There
  129. * are two tables depending on the hardware clock speed.
  130. */
  131. static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
  132. {
  133. struct ata_device *pair = ata_dev_pair(adev);
  134. int clock;
  135. int pio = adev->pio_mode - XFER_PIO_0;
  136. unsigned long regio = ap->ioaddr.cmd_addr;
  137. u8 addr;
  138. /* Address table precomputed with prefetch off and a DCLK of 2 */
  139. static const u8 addr_timing[2][5] = {
  140. { 0x30, 0x20, 0x20, 0x10, 0x10 },
  141. { 0x20, 0x20, 0x10, 0x10, 0x10 }
  142. };
  143. static const u8 data_rec_timing[2][5] = {
  144. { 0x6B, 0x56, 0x42, 0x32, 0x31 },
  145. { 0x58, 0x44, 0x32, 0x22, 0x21 }
  146. };
  147. outb(0xff, regio + 5);
  148. clock = inw(regio + 5) & 1;
  149. /*
  150. * As with many controllers the address setup time is shared
  151. * and must suit both devices if present.
  152. */
  153. addr = addr_timing[clock][pio];
  154. if (pair) {
  155. /* Hardware constraint */
  156. u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
  157. if (pair_addr > addr)
  158. addr = pair_addr;
  159. }
  160. /* Commence primary programming sequence */
  161. opti_write_reg(ap, adev->devno, MISC_REG);
  162. opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
  163. opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
  164. opti_write_reg(ap, addr, MISC_REG);
  165. /* Programming sequence complete, override strapping */
  166. opti_write_reg(ap, 0x85, CNTRL_REG);
  167. }
  168. static struct scsi_host_template opti_sht = {
  169. .module = THIS_MODULE,
  170. .name = DRV_NAME,
  171. .ioctl = ata_scsi_ioctl,
  172. .queuecommand = ata_scsi_queuecmd,
  173. .can_queue = ATA_DEF_QUEUE,
  174. .this_id = ATA_SHT_THIS_ID,
  175. .sg_tablesize = LIBATA_MAX_PRD,
  176. .max_sectors = ATA_MAX_SECTORS,
  177. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  178. .emulated = ATA_SHT_EMULATED,
  179. .use_clustering = ATA_SHT_USE_CLUSTERING,
  180. .proc_name = DRV_NAME,
  181. .dma_boundary = ATA_DMA_BOUNDARY,
  182. .slave_configure = ata_scsi_slave_config,
  183. .bios_param = ata_std_bios_param,
  184. };
  185. static struct ata_port_operations opti_port_ops = {
  186. .port_disable = ata_port_disable,
  187. .set_piomode = opti_set_piomode,
  188. /* .set_dmamode = opti_set_dmamode, */
  189. .tf_load = ata_tf_load,
  190. .tf_read = ata_tf_read,
  191. .check_status = ata_check_status,
  192. .exec_command = ata_exec_command,
  193. .dev_select = ata_std_dev_select,
  194. .freeze = ata_bmdma_freeze,
  195. .thaw = ata_bmdma_thaw,
  196. .error_handler = opti_error_handler,
  197. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  198. .bmdma_setup = ata_bmdma_setup,
  199. .bmdma_start = ata_bmdma_start,
  200. .bmdma_stop = ata_bmdma_stop,
  201. .bmdma_status = ata_bmdma_status,
  202. .qc_prep = ata_qc_prep,
  203. .qc_issue = ata_qc_issue_prot,
  204. .eng_timeout = ata_eng_timeout,
  205. .data_xfer = ata_pio_data_xfer,
  206. .irq_handler = ata_interrupt,
  207. .irq_clear = ata_bmdma_irq_clear,
  208. .port_start = ata_port_start,
  209. .port_stop = ata_port_stop,
  210. .host_stop = ata_host_stop
  211. };
  212. static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  213. {
  214. static struct ata_port_info info = {
  215. .sht = &opti_sht,
  216. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  217. .pio_mask = 0x1f,
  218. .port_ops = &opti_port_ops
  219. };
  220. static struct ata_port_info *port_info[2] = { &info, &info };
  221. static int printed_version;
  222. if (!printed_version++)
  223. dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
  224. return ata_pci_init_one(dev, port_info, 2);
  225. }
  226. static const struct pci_device_id opti[] = {
  227. { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  228. { PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
  229. { 0, },
  230. };
  231. static struct pci_driver opti_pci_driver = {
  232. .name = DRV_NAME,
  233. .id_table = opti,
  234. .probe = opti_init_one,
  235. .remove = ata_pci_remove_one
  236. };
  237. static int __init opti_init(void)
  238. {
  239. return pci_register_driver(&opti_pci_driver);
  240. }
  241. static void __exit opti_exit(void)
  242. {
  243. pci_unregister_driver(&opti_pci_driver);
  244. }
  245. MODULE_AUTHOR("Alan Cox");
  246. MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
  247. MODULE_LICENSE("GPL");
  248. MODULE_DEVICE_TABLE(pci, opti);
  249. MODULE_VERSION(DRV_VERSION);
  250. module_init(opti_init);
  251. module_exit(opti_exit);