pata_atiixp.c 8.3 KB

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  1. /*
  2. * pata_atiixp.c - ATI PATA for new ATA layer
  3. * (C) 2005 Red Hat Inc
  4. * Alan Cox <alan@redhat.com>
  5. *
  6. * Based on
  7. *
  8. * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
  9. *
  10. * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  11. * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <scsi/scsi_host.h>
  21. #include <linux/libata.h>
  22. #define DRV_NAME "pata_atiixp"
  23. #define DRV_VERSION "0.4.2"
  24. enum {
  25. ATIIXP_IDE_PIO_TIMING = 0x40,
  26. ATIIXP_IDE_MWDMA_TIMING = 0x44,
  27. ATIIXP_IDE_PIO_CONTROL = 0x48,
  28. ATIIXP_IDE_PIO_MODE = 0x4a,
  29. ATIIXP_IDE_UDMA_CONTROL = 0x54,
  30. ATIIXP_IDE_UDMA_MODE = 0x56
  31. };
  32. static int atiixp_pre_reset(struct ata_port *ap)
  33. {
  34. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  35. static struct pci_bits atiixp_enable_bits[] = {
  36. { 0x48, 1, 0x01, 0x00 },
  37. { 0x48, 1, 0x08, 0x00 }
  38. };
  39. if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) {
  40. ata_port_disable(ap);
  41. printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
  42. return 0;
  43. }
  44. ap->cbl = ATA_CBL_PATA80;
  45. return ata_std_prereset(ap);
  46. }
  47. static void atiixp_error_handler(struct ata_port *ap)
  48. {
  49. ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  50. }
  51. /**
  52. * atiixp_set_pio_timing - set initial PIO mode data
  53. * @ap: ATA interface
  54. * @adev: ATA device
  55. *
  56. * Called by both the pio and dma setup functions to set the controller
  57. * timings for PIO transfers. We must load both the mode number and
  58. * timing values into the controller.
  59. */
  60. static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
  61. {
  62. static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
  63. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  64. int dn = 2 * ap->port_no + adev->devno;
  65. /* Check this is correct - the order is odd in both drivers */
  66. int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  67. u16 pio_mode_data, pio_timing_data;
  68. pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  69. pio_mode_data &= ~(0x7 << (4 * dn));
  70. pio_mode_data |= pio << (4 * dn);
  71. pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  72. pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  73. pio_mode_data &= ~(0xFF << timing_shift);
  74. pio_mode_data |= (pio_timings[pio] << timing_shift);
  75. pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  76. }
  77. /**
  78. * atiixp_set_piomode - set initial PIO mode data
  79. * @ap: ATA interface
  80. * @adev: ATA device
  81. *
  82. * Called to do the PIO mode setup. We use a shared helper for this
  83. * as the DMA setup must also adjust the PIO timing information.
  84. */
  85. static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
  86. {
  87. atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
  88. }
  89. /**
  90. * atiixp_set_dmamode - set initial DMA mode data
  91. * @ap: ATA interface
  92. * @adev: ATA device
  93. *
  94. * Called to do the DMA mode setup. We use timing tables for most
  95. * modes but must tune an appropriate PIO mode to match.
  96. */
  97. static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  98. {
  99. static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
  100. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  101. int dma = adev->dma_mode;
  102. int dn = 2 * ap->port_no + adev->devno;
  103. int wanted_pio;
  104. if (adev->dma_mode >= XFER_UDMA_0) {
  105. u16 udma_mode_data;
  106. dma -= XFER_UDMA_0;
  107. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
  108. udma_mode_data &= ~(0x7 << (4 * dn));
  109. udma_mode_data |= dma << (4 * dn);
  110. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
  111. } else {
  112. u16 mwdma_timing_data;
  113. /* Check this is correct - the order is odd in both drivers */
  114. int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  115. dma -= XFER_MW_DMA_0;
  116. pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
  117. mwdma_timing_data &= ~(0xFF << timing_shift);
  118. mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
  119. pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
  120. }
  121. /*
  122. * We must now look at the PIO mode situation. We may need to
  123. * adjust the PIO mode to keep the timings acceptable
  124. */
  125. if (adev->dma_mode >= XFER_MW_DMA_2)
  126. wanted_pio = 4;
  127. else if (adev->dma_mode == XFER_MW_DMA_1)
  128. wanted_pio = 3;
  129. else if (adev->dma_mode == XFER_MW_DMA_0)
  130. wanted_pio = 0;
  131. else BUG();
  132. if (adev->pio_mode != wanted_pio)
  133. atiixp_set_pio_timing(ap, adev, wanted_pio);
  134. }
  135. /**
  136. * atiixp_bmdma_start - DMA start callback
  137. * @qc: Command in progress
  138. *
  139. * When DMA begins we need to ensure that the UDMA control
  140. * register for the channel is correctly set.
  141. */
  142. static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
  143. {
  144. struct ata_port *ap = qc->ap;
  145. struct ata_device *adev = qc->dev;
  146. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  147. int dn = (2 * ap->port_no) + adev->devno;
  148. u16 tmp16;
  149. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
  150. if (adev->dma_mode >= XFER_UDMA_0)
  151. tmp16 |= (1 << dn);
  152. else
  153. tmp16 &= ~(1 << dn);
  154. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
  155. ata_bmdma_start(qc);
  156. }
  157. /**
  158. * atiixp_dma_stop - DMA stop callback
  159. * @qc: Command in progress
  160. *
  161. * DMA has completed. Clear the UDMA flag as the next operations will
  162. * be PIO ones not UDMA data transfer.
  163. */
  164. static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
  165. {
  166. struct ata_port *ap = qc->ap;
  167. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  168. int dn = (2 * ap->port_no) + qc->dev->devno;
  169. u16 tmp16;
  170. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
  171. tmp16 &= ~(1 << dn);
  172. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
  173. ata_bmdma_stop(qc);
  174. }
  175. static struct scsi_host_template atiixp_sht = {
  176. .module = THIS_MODULE,
  177. .name = DRV_NAME,
  178. .ioctl = ata_scsi_ioctl,
  179. .queuecommand = ata_scsi_queuecmd,
  180. .can_queue = ATA_DEF_QUEUE,
  181. .this_id = ATA_SHT_THIS_ID,
  182. .sg_tablesize = LIBATA_MAX_PRD,
  183. .max_sectors = ATA_MAX_SECTORS,
  184. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  185. .emulated = ATA_SHT_EMULATED,
  186. .use_clustering = ATA_SHT_USE_CLUSTERING,
  187. .proc_name = DRV_NAME,
  188. .dma_boundary = ATA_DMA_BOUNDARY,
  189. .slave_configure = ata_scsi_slave_config,
  190. .bios_param = ata_std_bios_param,
  191. };
  192. static struct ata_port_operations atiixp_port_ops = {
  193. .port_disable = ata_port_disable,
  194. .set_piomode = atiixp_set_piomode,
  195. .set_dmamode = atiixp_set_dmamode,
  196. .mode_filter = ata_pci_default_filter,
  197. .tf_load = ata_tf_load,
  198. .tf_read = ata_tf_read,
  199. .check_status = ata_check_status,
  200. .exec_command = ata_exec_command,
  201. .dev_select = ata_std_dev_select,
  202. .freeze = ata_bmdma_freeze,
  203. .thaw = ata_bmdma_thaw,
  204. .error_handler = atiixp_error_handler,
  205. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  206. .bmdma_setup = ata_bmdma_setup,
  207. .bmdma_start = atiixp_bmdma_start,
  208. .bmdma_stop = atiixp_bmdma_stop,
  209. .bmdma_status = ata_bmdma_status,
  210. .qc_prep = ata_qc_prep,
  211. .qc_issue = ata_qc_issue_prot,
  212. .eng_timeout = ata_eng_timeout,
  213. .data_xfer = ata_pio_data_xfer,
  214. .irq_handler = ata_interrupt,
  215. .irq_clear = ata_bmdma_irq_clear,
  216. .port_start = ata_port_start,
  217. .port_stop = ata_port_stop,
  218. .host_stop = ata_host_stop
  219. };
  220. static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  221. {
  222. static struct ata_port_info info = {
  223. .sht = &atiixp_sht,
  224. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  225. .pio_mask = 0x1f,
  226. .mwdma_mask = 0x06, /* No MWDMA0 support */
  227. .udma_mask = 0x3F,
  228. .port_ops = &atiixp_port_ops
  229. };
  230. static struct ata_port_info *port_info[2] = { &info, &info };
  231. return ata_pci_init_one(dev, port_info, 2);
  232. }
  233. static struct pci_device_id atiixp[] = {
  234. { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
  235. { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
  236. { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
  237. { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
  238. { 0, },
  239. };
  240. static struct pci_driver atiixp_pci_driver = {
  241. .name = DRV_NAME,
  242. .id_table = atiixp,
  243. .probe = atiixp_init_one,
  244. .remove = ata_pci_remove_one
  245. };
  246. static int __init atiixp_init(void)
  247. {
  248. return pci_register_driver(&atiixp_pci_driver);
  249. }
  250. static void __exit atiixp_exit(void)
  251. {
  252. pci_unregister_driver(&atiixp_pci_driver);
  253. }
  254. MODULE_AUTHOR("Alan Cox");
  255. MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
  256. MODULE_LICENSE("GPL");
  257. MODULE_DEVICE_TABLE(pci, atiixp);
  258. MODULE_VERSION(DRV_VERSION);
  259. module_init(atiixp_init);
  260. module_exit(atiixp_exit);