time.c 9.9 KB

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  1. /*
  2. * linux/arch/i386/kernel/time.c
  3. *
  4. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  5. *
  6. * This file contains the PC-specific time handling details:
  7. * reading the RTC at bootup, etc..
  8. * 1994-07-02 Alan Modra
  9. * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
  10. * 1995-03-26 Markus Kuhn
  11. * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
  12. * precision CMOS clock update
  13. * 1996-05-03 Ingo Molnar
  14. * fixed time warps in do_[slow|fast]_gettimeoffset()
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. * 1998-09-05 (Various)
  18. * More robust do_fast_gettimeoffset() algorithm implemented
  19. * (works with APM, Cyrix 6x86MX and Centaur C6),
  20. * monotonic gettimeofday() with fast_get_timeoffset(),
  21. * drift-proof precision TSC calibration on boot
  22. * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
  23. * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
  24. * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
  25. * 1998-12-16 Andrea Arcangeli
  26. * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
  27. * because was not accounting lost_ticks.
  28. * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
  29. * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
  30. * serialize accesses to xtime/lost_ticks).
  31. */
  32. #include <linux/errno.h>
  33. #include <linux/sched.h>
  34. #include <linux/kernel.h>
  35. #include <linux/param.h>
  36. #include <linux/string.h>
  37. #include <linux/mm.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/time.h>
  40. #include <linux/delay.h>
  41. #include <linux/init.h>
  42. #include <linux/smp.h>
  43. #include <linux/module.h>
  44. #include <linux/sysdev.h>
  45. #include <linux/bcd.h>
  46. #include <linux/efi.h>
  47. #include <linux/mca.h>
  48. #include <asm/io.h>
  49. #include <asm/smp.h>
  50. #include <asm/irq.h>
  51. #include <asm/msr.h>
  52. #include <asm/delay.h>
  53. #include <asm/mpspec.h>
  54. #include <asm/uaccess.h>
  55. #include <asm/processor.h>
  56. #include <asm/timer.h>
  57. #include "mach_time.h"
  58. #include <linux/timex.h>
  59. #include <asm/hpet.h>
  60. #include <asm/arch_hooks.h>
  61. #include "io_ports.h"
  62. #include <asm/i8259.h>
  63. int pit_latch_buggy; /* extern */
  64. #include "do_timer.h"
  65. unsigned int cpu_khz; /* Detected as we calibrate the TSC */
  66. EXPORT_SYMBOL(cpu_khz);
  67. extern unsigned long wall_jiffies;
  68. DEFINE_SPINLOCK(rtc_lock);
  69. EXPORT_SYMBOL(rtc_lock);
  70. /*
  71. * This is a special lock that is owned by the CPU and holds the index
  72. * register we are working with. It is required for NMI access to the
  73. * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
  74. */
  75. volatile unsigned long cmos_lock = 0;
  76. EXPORT_SYMBOL(cmos_lock);
  77. /* Routines for accessing the CMOS RAM/RTC. */
  78. unsigned char rtc_cmos_read(unsigned char addr)
  79. {
  80. unsigned char val;
  81. lock_cmos_prefix(addr);
  82. outb_p(addr, RTC_PORT(0));
  83. val = inb_p(RTC_PORT(1));
  84. lock_cmos_suffix(addr);
  85. return val;
  86. }
  87. EXPORT_SYMBOL(rtc_cmos_read);
  88. void rtc_cmos_write(unsigned char val, unsigned char addr)
  89. {
  90. lock_cmos_prefix(addr);
  91. outb_p(addr, RTC_PORT(0));
  92. outb_p(val, RTC_PORT(1));
  93. lock_cmos_suffix(addr);
  94. }
  95. EXPORT_SYMBOL(rtc_cmos_write);
  96. static int set_rtc_mmss(unsigned long nowtime)
  97. {
  98. int retval;
  99. unsigned long flags;
  100. /* gets recalled with irq locally disabled */
  101. /* XXX - does irqsave resolve this? -johnstul */
  102. spin_lock_irqsave(&rtc_lock, flags);
  103. if (efi_enabled)
  104. retval = efi_set_rtc_mmss(nowtime);
  105. else
  106. retval = mach_set_rtc_mmss(nowtime);
  107. spin_unlock_irqrestore(&rtc_lock, flags);
  108. return retval;
  109. }
  110. int timer_ack;
  111. unsigned long profile_pc(struct pt_regs *regs)
  112. {
  113. unsigned long pc = instruction_pointer(regs);
  114. #ifdef CONFIG_SMP
  115. if (!user_mode_vm(regs) && in_lock_functions(pc)) {
  116. #ifdef CONFIG_FRAME_POINTER
  117. return *(unsigned long *)(regs->ebp + 4);
  118. #else
  119. unsigned long *sp;
  120. if ((regs->xcs & 3) == 0)
  121. sp = (unsigned long *)&regs->esp;
  122. else
  123. sp = (unsigned long *)regs->esp;
  124. /* Return address is either directly at stack pointer
  125. or above a saved eflags. Eflags has bits 22-31 zero,
  126. kernel addresses don't. */
  127. if (sp[0] >> 22)
  128. return sp[0];
  129. if (sp[1] >> 22)
  130. return sp[1];
  131. #endif
  132. }
  133. #endif
  134. return pc;
  135. }
  136. EXPORT_SYMBOL(profile_pc);
  137. /*
  138. * This is the same as the above, except we _also_ save the current
  139. * Time Stamp Counter value at the time of the timer interrupt, so that
  140. * we later on can estimate the time of day more exactly.
  141. */
  142. irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  143. {
  144. /*
  145. * Here we are in the timer irq handler. We just have irqs locally
  146. * disabled but we don't know if the timer_bh is running on the other
  147. * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
  148. * the irq version of write_lock because as just said we have irq
  149. * locally disabled. -arca
  150. */
  151. write_seqlock(&xtime_lock);
  152. #ifdef CONFIG_X86_IO_APIC
  153. if (timer_ack) {
  154. /*
  155. * Subtle, when I/O APICs are used we have to ack timer IRQ
  156. * manually to reset the IRR bit for do_slow_gettimeoffset().
  157. * This will also deassert NMI lines for the watchdog if run
  158. * on an 82489DX-based system.
  159. */
  160. spin_lock(&i8259A_lock);
  161. outb(0x0c, PIC_MASTER_OCW3);
  162. /* Ack the IRQ; AEOI will end it automatically. */
  163. inb(PIC_MASTER_POLL);
  164. spin_unlock(&i8259A_lock);
  165. }
  166. #endif
  167. do_timer_interrupt_hook(regs);
  168. if (MCA_bus) {
  169. /* The PS/2 uses level-triggered interrupts. You can't
  170. turn them off, nor would you want to (any attempt to
  171. enable edge-triggered interrupts usually gets intercepted by a
  172. special hardware circuit). Hence we have to acknowledge
  173. the timer interrupt. Through some incredibly stupid
  174. design idea, the reset for IRQ 0 is done by setting the
  175. high bit of the PPI port B (0x61). Note that some PS/2s,
  176. notably the 55SX, work fine if this is removed. */
  177. irq = inb_p( 0x61 ); /* read the current state */
  178. outb_p( irq|0x80, 0x61 ); /* reset the IRQ */
  179. }
  180. write_sequnlock(&xtime_lock);
  181. #ifdef CONFIG_X86_LOCAL_APIC
  182. if (using_apic_timer)
  183. smp_send_timer_broadcast_ipi(regs);
  184. #endif
  185. return IRQ_HANDLED;
  186. }
  187. /* not static: needed by APM */
  188. unsigned long get_cmos_time(void)
  189. {
  190. unsigned long retval;
  191. unsigned long flags;
  192. spin_lock_irqsave(&rtc_lock, flags);
  193. if (efi_enabled)
  194. retval = efi_get_time();
  195. else
  196. retval = mach_get_cmos_time();
  197. spin_unlock_irqrestore(&rtc_lock, flags);
  198. return retval;
  199. }
  200. EXPORT_SYMBOL(get_cmos_time);
  201. static void sync_cmos_clock(unsigned long dummy);
  202. static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
  203. static void sync_cmos_clock(unsigned long dummy)
  204. {
  205. struct timeval now, next;
  206. int fail = 1;
  207. /*
  208. * If we have an externally synchronized Linux clock, then update
  209. * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
  210. * called as close as possible to 500 ms before the new second starts.
  211. * This code is run on a timer. If the clock is set, that timer
  212. * may not expire at the correct time. Thus, we adjust...
  213. */
  214. if (!ntp_synced())
  215. /*
  216. * Not synced, exit, do not restart a timer (if one is
  217. * running, let it run out).
  218. */
  219. return;
  220. do_gettimeofday(&now);
  221. if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
  222. now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
  223. fail = set_rtc_mmss(now.tv_sec);
  224. next.tv_usec = USEC_AFTER - now.tv_usec;
  225. if (next.tv_usec <= 0)
  226. next.tv_usec += USEC_PER_SEC;
  227. if (!fail)
  228. next.tv_sec = 659;
  229. else
  230. next.tv_sec = 0;
  231. if (next.tv_usec >= USEC_PER_SEC) {
  232. next.tv_sec++;
  233. next.tv_usec -= USEC_PER_SEC;
  234. }
  235. mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
  236. }
  237. void notify_arch_cmos_timer(void)
  238. {
  239. mod_timer(&sync_cmos_timer, jiffies + 1);
  240. }
  241. static long clock_cmos_diff;
  242. static unsigned long sleep_start;
  243. static int timer_suspend(struct sys_device *dev, pm_message_t state)
  244. {
  245. /*
  246. * Estimate time zone so that set_time can update the clock
  247. */
  248. unsigned long ctime = get_cmos_time();
  249. clock_cmos_diff = -ctime;
  250. clock_cmos_diff += get_seconds();
  251. sleep_start = ctime;
  252. return 0;
  253. }
  254. static int timer_resume(struct sys_device *dev)
  255. {
  256. unsigned long flags;
  257. unsigned long sec;
  258. unsigned long ctime = get_cmos_time();
  259. long sleep_length = (ctime - sleep_start) * HZ;
  260. struct timespec ts;
  261. if (sleep_length < 0) {
  262. printk(KERN_WARNING "CMOS clock skew detected in timer resume!\n");
  263. /* The time after the resume must not be earlier than the time
  264. * before the suspend or some nasty things will happen
  265. */
  266. sleep_length = 0;
  267. ctime = sleep_start;
  268. }
  269. #ifdef CONFIG_HPET_TIMER
  270. if (is_hpet_enabled())
  271. hpet_reenable();
  272. #endif
  273. setup_pit_timer();
  274. sec = ctime + clock_cmos_diff;
  275. ts.tv_sec = sec;
  276. ts.tv_nsec = 0;
  277. do_settimeofday(&ts);
  278. write_seqlock_irqsave(&xtime_lock, flags);
  279. jiffies_64 += sleep_length;
  280. wall_jiffies += sleep_length;
  281. write_sequnlock_irqrestore(&xtime_lock, flags);
  282. touch_softlockup_watchdog();
  283. return 0;
  284. }
  285. static struct sysdev_class timer_sysclass = {
  286. .resume = timer_resume,
  287. .suspend = timer_suspend,
  288. set_kset_name("timer"),
  289. };
  290. /* XXX this driverfs stuff should probably go elsewhere later -john */
  291. static struct sys_device device_timer = {
  292. .id = 0,
  293. .cls = &timer_sysclass,
  294. };
  295. static int time_init_device(void)
  296. {
  297. int error = sysdev_class_register(&timer_sysclass);
  298. if (!error)
  299. error = sysdev_register(&device_timer);
  300. return error;
  301. }
  302. device_initcall(time_init_device);
  303. #ifdef CONFIG_HPET_TIMER
  304. extern void (*late_time_init)(void);
  305. /* Duplicate of time_init() below, with hpet_enable part added */
  306. static void __init hpet_time_init(void)
  307. {
  308. struct timespec ts;
  309. ts.tv_sec = get_cmos_time();
  310. ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  311. do_settimeofday(&ts);
  312. if ((hpet_enable() >= 0) && hpet_use_timer) {
  313. printk("Using HPET for base-timer\n");
  314. }
  315. time_init_hook();
  316. }
  317. #endif
  318. void __init time_init(void)
  319. {
  320. struct timespec ts;
  321. #ifdef CONFIG_HPET_TIMER
  322. if (is_hpet_capable()) {
  323. /*
  324. * HPET initialization needs to do memory-mapped io. So, let
  325. * us do a late initialization after mem_init().
  326. */
  327. late_time_init = hpet_time_init;
  328. return;
  329. }
  330. #endif
  331. ts.tv_sec = get_cmos_time();
  332. ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  333. do_settimeofday(&ts);
  334. time_init_hook();
  335. }