s3c2412.c 5.5 KB

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  1. /* linux/arch/arm/mach-s3c2410/s3c2412.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * http://armlinux.simtec.co.uk/.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Modifications:
  13. * 16-May-2003 BJD Created initial version
  14. * 16-Aug-2003 BJD Fixed header files and copyright, added URL
  15. * 05-Sep-2003 BJD Moved to kernel v2.6
  16. * 18-Jan-2004 BJD Added serial port configuration
  17. * 21-Aug-2004 BJD Added new struct s3c2410_board handler
  18. * 28-Sep-2004 BJD Updates for new serial port bits
  19. * 04-Nov-2004 BJD Updated UART configuration process
  20. * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
  21. * 13-Aug-2005 DA Removed UART from initial I/O mappings
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/types.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/list.h>
  27. #include <linux/timer.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/platform_device.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/map.h>
  33. #include <asm/mach/irq.h>
  34. #include <asm/hardware.h>
  35. #include <asm/proc-fns.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/arch/idle.h>
  39. #include <asm/arch/regs-clock.h>
  40. #include <asm/arch/regs-serial.h>
  41. #include <asm/arch/regs-power.h>
  42. #include <asm/arch/regs-gpio.h>
  43. #include <asm/arch/regs-gpioj.h>
  44. #include <asm/arch/regs-dsc.h>
  45. #include "s3c2412.h"
  46. #include "cpu.h"
  47. #include "devs.h"
  48. #include "clock.h"
  49. #include "pm.h"
  50. #ifndef CONFIG_CPU_S3C2412_ONLY
  51. void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
  52. #endif
  53. /* Initial IO mappings */
  54. static struct map_desc s3c2412_iodesc[] __initdata = {
  55. IODESC_ENT(CLKPWR),
  56. IODESC_ENT(LCD),
  57. IODESC_ENT(TIMER),
  58. IODESC_ENT(ADC),
  59. IODESC_ENT(WATCHDOG),
  60. };
  61. /* uart registration process */
  62. void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  63. {
  64. s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
  65. /* rename devices that are s3c2412/s3c2413 specific */
  66. s3c_device_sdi.name = "s3c2412-sdi";
  67. s3c_device_nand.name = "s3c2412-nand";
  68. }
  69. /* s3c2412_idle
  70. *
  71. * use the standard idle call by ensuring the idle mode
  72. * in power config, then issuing the idle co-processor
  73. * instruction
  74. */
  75. static void s3c2412_idle(void)
  76. {
  77. unsigned long tmp;
  78. /* ensure our idle mode is to go to idle */
  79. tmp = __raw_readl(S3C2412_PWRCFG);
  80. tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
  81. tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
  82. __raw_writel(tmp, S3C2412_PWRCFG);
  83. cpu_do_idle();
  84. }
  85. /* s3c2412_map_io
  86. *
  87. * register the standard cpu IO areas, and any passed in from the
  88. * machine specific initialisation.
  89. */
  90. void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
  91. {
  92. /* move base of IO */
  93. s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
  94. /* set our idle function */
  95. s3c24xx_idle = s3c2412_idle;
  96. /* register our io-tables */
  97. iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
  98. iotable_init(mach_desc, mach_size);
  99. }
  100. void __init s3c2412_init_clocks(int xtal)
  101. {
  102. unsigned long tmp;
  103. unsigned long fclk;
  104. unsigned long hclk;
  105. unsigned long pclk;
  106. /* now we've got our machine bits initialised, work out what
  107. * clocks we've got */
  108. fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
  109. tmp = __raw_readl(S3C2410_CLKDIVN);
  110. /* work out clock scalings */
  111. hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
  112. hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
  113. pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
  114. /* print brieft summary of clocks, etc */
  115. printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  116. print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
  117. /* initialise the clocks here, to allow other things like the
  118. * console to use them
  119. */
  120. s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
  121. s3c2412_baseclk_add();
  122. }
  123. /* need to register class before we actually register the device, and
  124. * we also need to ensure that it has been initialised before any of the
  125. * drivers even try to use it (even if not on an s3c2412 based system)
  126. * as a driver which may support both 2410 and 2440 may try and use it.
  127. */
  128. #ifdef CONFIG_PM
  129. static struct sleep_save s3c2412_sleep[] = {
  130. SAVE_ITEM(S3C2412_DSC0),
  131. SAVE_ITEM(S3C2412_DSC1),
  132. SAVE_ITEM(S3C2413_GPJDAT),
  133. SAVE_ITEM(S3C2413_GPJCON),
  134. SAVE_ITEM(S3C2413_GPJUP),
  135. /* save the sleep configuration anyway, just in case these
  136. * get damaged during wakeup */
  137. SAVE_ITEM(S3C2412_GPBSLPCON),
  138. SAVE_ITEM(S3C2412_GPCSLPCON),
  139. SAVE_ITEM(S3C2412_GPDSLPCON),
  140. SAVE_ITEM(S3C2412_GPESLPCON),
  141. SAVE_ITEM(S3C2412_GPFSLPCON),
  142. SAVE_ITEM(S3C2412_GPGSLPCON),
  143. SAVE_ITEM(S3C2412_GPHSLPCON),
  144. SAVE_ITEM(S3C2413_GPJSLPCON),
  145. };
  146. static int s3c2412_suspend(struct sys_device *dev, pm_message_t state)
  147. {
  148. s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
  149. return 0;
  150. }
  151. static int s3c2412_resume(struct sys_device *dev)
  152. {
  153. s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
  154. return 0;
  155. }
  156. #else
  157. #define s3c2412_suspend NULL
  158. #define s3c2412_resume NULL
  159. #endif
  160. struct sysdev_class s3c2412_sysclass = {
  161. set_kset_name("s3c2412-core"),
  162. .suspend = s3c2412_suspend,
  163. .resume = s3c2412_resume
  164. };
  165. static int __init s3c2412_core_init(void)
  166. {
  167. return sysdev_class_register(&s3c2412_sysclass);
  168. }
  169. core_initcall(s3c2412_core_init);
  170. static struct sys_device s3c2412_sysdev = {
  171. .cls = &s3c2412_sysclass,
  172. };
  173. int __init s3c2412_init(void)
  174. {
  175. printk("S3C2412: Initialising architecture\n");
  176. return sysdev_register(&s3c2412_sysdev);
  177. }