main.c 40 KB

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  1. /*
  2. * Copyright (c) 2008 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. /* mac80211 and PCI callbacks */
  17. #include <linux/nl80211.h>
  18. #include "core.h"
  19. #define ATH_PCI_VERSION "0.1"
  20. #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
  21. static char *dev_info = "ath9k";
  22. MODULE_AUTHOR("Atheros Communications");
  23. MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
  24. MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
  25. MODULE_LICENSE("Dual BSD/GPL");
  26. static struct pci_device_id ath_pci_id_table[] __devinitdata = {
  27. { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
  28. { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
  29. { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
  30. { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
  31. { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
  32. { 0 }
  33. };
  34. static int ath_get_channel(struct ath_softc *sc,
  35. struct ieee80211_channel *chan)
  36. {
  37. int i;
  38. for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
  39. if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
  40. return i;
  41. }
  42. return -1;
  43. }
  44. static u32 ath_get_extchanmode(struct ath_softc *sc,
  45. struct ieee80211_channel *chan)
  46. {
  47. u32 chanmode = 0;
  48. u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
  49. enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
  50. switch (chan->band) {
  51. case IEEE80211_BAND_2GHZ:
  52. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
  53. (tx_chan_width == ATH9K_HT_MACMODE_20))
  54. chanmode = CHANNEL_G_HT20;
  55. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
  56. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  57. chanmode = CHANNEL_G_HT40PLUS;
  58. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
  59. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  60. chanmode = CHANNEL_G_HT40MINUS;
  61. break;
  62. case IEEE80211_BAND_5GHZ:
  63. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
  64. (tx_chan_width == ATH9K_HT_MACMODE_20))
  65. chanmode = CHANNEL_A_HT20;
  66. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
  67. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  68. chanmode = CHANNEL_A_HT40PLUS;
  69. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
  70. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  71. chanmode = CHANNEL_A_HT40MINUS;
  72. break;
  73. default:
  74. break;
  75. }
  76. return chanmode;
  77. }
  78. static int ath_setkey_tkip(struct ath_softc *sc,
  79. struct ieee80211_key_conf *key,
  80. struct ath9k_keyval *hk,
  81. const u8 *addr)
  82. {
  83. u8 *key_rxmic = NULL;
  84. u8 *key_txmic = NULL;
  85. key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
  86. key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
  87. if (addr == NULL) {
  88. /* Group key installation */
  89. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  90. return ath_keyset(sc, key->keyidx, hk, addr);
  91. }
  92. if (!sc->sc_splitmic) {
  93. /*
  94. * data key goes at first index,
  95. * the hal handles the MIC keys at index+64.
  96. */
  97. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  98. memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
  99. return ath_keyset(sc, key->keyidx, hk, addr);
  100. }
  101. /*
  102. * TX key goes at first index, RX key at +32.
  103. * The hal handles the MIC keys at index+64.
  104. */
  105. memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
  106. if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
  107. /* Txmic entry failed. No need to proceed further */
  108. DPRINTF(sc, ATH_DBG_KEYCACHE,
  109. "%s Setting TX MIC Key Failed\n", __func__);
  110. return 0;
  111. }
  112. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  113. /* XXX delete tx key on failure? */
  114. return ath_keyset(sc, key->keyidx+32, hk, addr);
  115. }
  116. static int ath_key_config(struct ath_softc *sc,
  117. const u8 *addr,
  118. struct ieee80211_key_conf *key)
  119. {
  120. struct ieee80211_vif *vif;
  121. struct ath9k_keyval hk;
  122. const u8 *mac = NULL;
  123. int ret = 0;
  124. enum ieee80211_if_types opmode;
  125. memset(&hk, 0, sizeof(hk));
  126. switch (key->alg) {
  127. case ALG_WEP:
  128. hk.kv_type = ATH9K_CIPHER_WEP;
  129. break;
  130. case ALG_TKIP:
  131. hk.kv_type = ATH9K_CIPHER_TKIP;
  132. break;
  133. case ALG_CCMP:
  134. hk.kv_type = ATH9K_CIPHER_AES_CCM;
  135. break;
  136. default:
  137. return -EINVAL;
  138. }
  139. hk.kv_len = key->keylen;
  140. memcpy(hk.kv_val, key->key, key->keylen);
  141. if (!sc->sc_vaps[0])
  142. return -EIO;
  143. vif = sc->sc_vaps[0]->av_if_data;
  144. opmode = vif->type;
  145. /*
  146. * Strategy:
  147. * For _M_STA mc tx, we will not setup a key at all since we never
  148. * tx mc.
  149. * _M_STA mc rx, we will use the keyID.
  150. * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
  151. * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
  152. * peer node. BUT we will plumb a cleartext key so that we can do
  153. * perSta default key table lookup in software.
  154. */
  155. if (is_broadcast_ether_addr(addr)) {
  156. switch (opmode) {
  157. case IEEE80211_IF_TYPE_STA:
  158. /* default key: could be group WPA key
  159. * or could be static WEP key */
  160. mac = NULL;
  161. break;
  162. case IEEE80211_IF_TYPE_IBSS:
  163. break;
  164. case IEEE80211_IF_TYPE_AP:
  165. break;
  166. default:
  167. ASSERT(0);
  168. break;
  169. }
  170. } else {
  171. mac = addr;
  172. }
  173. if (key->alg == ALG_TKIP)
  174. ret = ath_setkey_tkip(sc, key, &hk, mac);
  175. else
  176. ret = ath_keyset(sc, key->keyidx, &hk, mac);
  177. if (!ret)
  178. return -EIO;
  179. if (mac)
  180. sc->sc_keytype = hk.kv_type;
  181. return 0;
  182. }
  183. static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
  184. {
  185. int freeslot;
  186. freeslot = (key->keyidx >= 4) ? 1 : 0;
  187. ath_key_reset(sc, key->keyidx, freeslot);
  188. }
  189. static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
  190. {
  191. #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
  192. #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
  193. ht_info->ht_supported = 1;
  194. ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
  195. |(u16)IEEE80211_HT_CAP_SM_PS
  196. |(u16)IEEE80211_HT_CAP_SGI_40
  197. |(u16)IEEE80211_HT_CAP_DSSSCCK40;
  198. ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
  199. ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
  200. /* setup supported mcs set */
  201. memset(ht_info->supp_mcs_set, 0, 16);
  202. ht_info->supp_mcs_set[0] = 0xff;
  203. ht_info->supp_mcs_set[1] = 0xff;
  204. ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
  205. }
  206. static int ath_rate2idx(struct ath_softc *sc, int rate)
  207. {
  208. int i = 0, cur_band, n_rates;
  209. struct ieee80211_hw *hw = sc->hw;
  210. cur_band = hw->conf.channel->band;
  211. n_rates = sc->sbands[cur_band].n_bitrates;
  212. for (i = 0; i < n_rates; i++) {
  213. if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
  214. break;
  215. }
  216. /*
  217. * NB:mac80211 validates rx rate index against the supported legacy rate
  218. * index only (should be done against ht rates also), return the highest
  219. * legacy rate index for rx rate which does not match any one of the
  220. * supported basic and extended rates to make mac80211 happy.
  221. * The following hack will be cleaned up once the issue with
  222. * the rx rate index validation in mac80211 is fixed.
  223. */
  224. if (i == n_rates)
  225. return n_rates - 1;
  226. return i;
  227. }
  228. static void ath9k_rx_prepare(struct ath_softc *sc,
  229. struct sk_buff *skb,
  230. struct ath_recv_status *status,
  231. struct ieee80211_rx_status *rx_status)
  232. {
  233. struct ieee80211_hw *hw = sc->hw;
  234. struct ieee80211_channel *curchan = hw->conf.channel;
  235. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  236. rx_status->mactime = status->tsf;
  237. rx_status->band = curchan->band;
  238. rx_status->freq = curchan->center_freq;
  239. rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
  240. rx_status->signal = rx_status->noise + status->rssi;
  241. rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
  242. rx_status->antenna = status->antenna;
  243. rx_status->qual = status->rssi * 100 / 64;
  244. if (status->flags & ATH_RX_MIC_ERROR)
  245. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  246. if (status->flags & ATH_RX_FCS_ERROR)
  247. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  248. rx_status->flag |= RX_FLAG_TSFT;
  249. }
  250. static u8 parse_mpdudensity(u8 mpdudensity)
  251. {
  252. /*
  253. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  254. * 0 for no restriction
  255. * 1 for 1/4 us
  256. * 2 for 1/2 us
  257. * 3 for 1 us
  258. * 4 for 2 us
  259. * 5 for 4 us
  260. * 6 for 8 us
  261. * 7 for 16 us
  262. */
  263. switch (mpdudensity) {
  264. case 0:
  265. return 0;
  266. case 1:
  267. case 2:
  268. case 3:
  269. /* Our lower layer calculations limit our precision to
  270. 1 microsecond */
  271. return 1;
  272. case 4:
  273. return 2;
  274. case 5:
  275. return 4;
  276. case 6:
  277. return 8;
  278. case 7:
  279. return 16;
  280. default:
  281. return 0;
  282. }
  283. }
  284. static void ath9k_ht_conf(struct ath_softc *sc,
  285. struct ieee80211_bss_conf *bss_conf)
  286. {
  287. #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
  288. struct ath_ht_info *ht_info = &sc->sc_ht_info;
  289. if (bss_conf->assoc_ht) {
  290. ht_info->ext_chan_offset =
  291. bss_conf->ht_bss_conf->bss_cap &
  292. IEEE80211_HT_IE_CHA_SEC_OFFSET;
  293. if (!(bss_conf->ht_conf->cap &
  294. IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
  295. (bss_conf->ht_bss_conf->bss_cap &
  296. IEEE80211_HT_IE_CHA_WIDTH))
  297. ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
  298. else
  299. ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
  300. ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
  301. ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
  302. bss_conf->ht_conf->ampdu_factor);
  303. ht_info->mpdudensity =
  304. parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
  305. }
  306. #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
  307. }
  308. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  309. struct ieee80211_bss_conf *bss_conf)
  310. {
  311. struct ieee80211_hw *hw = sc->hw;
  312. struct ieee80211_channel *curchan = hw->conf.channel;
  313. struct ath_vap *avp;
  314. int pos;
  315. DECLARE_MAC_BUF(mac);
  316. if (bss_conf->assoc) {
  317. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
  318. __func__,
  319. bss_conf->aid);
  320. avp = sc->sc_vaps[0];
  321. if (avp == NULL) {
  322. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  323. __func__);
  324. return;
  325. }
  326. /* New association, store aid */
  327. if (avp->av_opmode == ATH9K_M_STA) {
  328. sc->sc_curaid = bss_conf->aid;
  329. ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
  330. sc->sc_curaid);
  331. }
  332. /* Configure the beacon */
  333. ath_beacon_config(sc, 0);
  334. sc->sc_flags |= SC_OP_BEACONS;
  335. /* Reset rssi stats */
  336. sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
  337. sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
  338. sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
  339. sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
  340. /* Update chainmask */
  341. ath_update_chainmask(sc, bss_conf->assoc_ht);
  342. DPRINTF(sc, ATH_DBG_CONFIG,
  343. "%s: bssid %s aid 0x%x\n",
  344. __func__,
  345. print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
  346. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
  347. __func__,
  348. curchan->center_freq);
  349. pos = ath_get_channel(sc, curchan);
  350. if (pos == -1) {
  351. DPRINTF(sc, ATH_DBG_FATAL,
  352. "%s: Invalid channel\n", __func__);
  353. return;
  354. }
  355. if (hw->conf.ht_conf.ht_supported)
  356. sc->sc_ah->ah_channels[pos].chanmode =
  357. ath_get_extchanmode(sc, curchan);
  358. else
  359. sc->sc_ah->ah_channels[pos].chanmode =
  360. (curchan->band == IEEE80211_BAND_2GHZ) ?
  361. CHANNEL_G : CHANNEL_A;
  362. /* set h/w channel */
  363. if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
  364. DPRINTF(sc, ATH_DBG_FATAL,
  365. "%s: Unable to set channel\n",
  366. __func__);
  367. ath_rate_newstate(sc, avp);
  368. /* Update ratectrl about the new state */
  369. ath_rc_node_update(hw, avp->rc_node);
  370. } else {
  371. DPRINTF(sc, ATH_DBG_CONFIG,
  372. "%s: Bss Info DISSOC\n", __func__);
  373. sc->sc_curaid = 0;
  374. }
  375. }
  376. void ath_get_beaconconfig(struct ath_softc *sc,
  377. int if_id,
  378. struct ath_beacon_config *conf)
  379. {
  380. struct ieee80211_hw *hw = sc->hw;
  381. /* fill in beacon config data */
  382. conf->beacon_interval = hw->conf.beacon_int;
  383. conf->listen_interval = 100;
  384. conf->dtim_count = 1;
  385. conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
  386. }
  387. void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
  388. struct ath_xmit_status *tx_status, struct ath_node *an)
  389. {
  390. struct ieee80211_hw *hw = sc->hw;
  391. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  392. DPRINTF(sc, ATH_DBG_XMIT,
  393. "%s: TX complete: skb: %p\n", __func__, skb);
  394. if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
  395. tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
  396. /* free driver's private data area of tx_info */
  397. if (tx_info->driver_data[0] != NULL)
  398. kfree(tx_info->driver_data[0]);
  399. tx_info->driver_data[0] = NULL;
  400. }
  401. if (tx_status->flags & ATH_TX_BAR) {
  402. tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
  403. tx_status->flags &= ~ATH_TX_BAR;
  404. }
  405. if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
  406. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  407. /* Frame was not ACKed, but an ACK was expected */
  408. tx_info->status.excessive_retries = 1;
  409. }
  410. } else {
  411. /* Frame was ACKed */
  412. tx_info->flags |= IEEE80211_TX_STAT_ACK;
  413. }
  414. tx_info->status.retry_count = tx_status->retries;
  415. ieee80211_tx_status(hw, skb);
  416. if (an)
  417. ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
  418. }
  419. int _ath_rx_indicate(struct ath_softc *sc,
  420. struct sk_buff *skb,
  421. struct ath_recv_status *status,
  422. u16 keyix)
  423. {
  424. struct ieee80211_hw *hw = sc->hw;
  425. struct ath_node *an = NULL;
  426. struct ieee80211_rx_status rx_status;
  427. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  428. int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  429. int padsize;
  430. enum ATH_RX_TYPE st;
  431. /* see if any padding is done by the hw and remove it */
  432. if (hdrlen & 3) {
  433. padsize = hdrlen % 4;
  434. memmove(skb->data + padsize, skb->data, hdrlen);
  435. skb_pull(skb, padsize);
  436. }
  437. /* Prepare rx status */
  438. ath9k_rx_prepare(sc, skb, status, &rx_status);
  439. if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
  440. !(status->flags & ATH_RX_DECRYPT_ERROR)) {
  441. rx_status.flag |= RX_FLAG_DECRYPTED;
  442. } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
  443. && !(status->flags & ATH_RX_DECRYPT_ERROR)
  444. && skb->len >= hdrlen + 4) {
  445. keyix = skb->data[hdrlen + 3] >> 6;
  446. if (test_bit(keyix, sc->sc_keymap))
  447. rx_status.flag |= RX_FLAG_DECRYPTED;
  448. }
  449. spin_lock_bh(&sc->node_lock);
  450. an = ath_node_find(sc, hdr->addr2);
  451. spin_unlock_bh(&sc->node_lock);
  452. if (an) {
  453. ath_rx_input(sc, an,
  454. hw->conf.ht_conf.ht_supported,
  455. skb, status, &st);
  456. }
  457. if (!an || (st != ATH_RX_CONSUMED))
  458. __ieee80211_rx(hw, skb, &rx_status);
  459. return 0;
  460. }
  461. int ath_rx_subframe(struct ath_node *an,
  462. struct sk_buff *skb,
  463. struct ath_recv_status *status)
  464. {
  465. struct ath_softc *sc = an->an_sc;
  466. struct ieee80211_hw *hw = sc->hw;
  467. struct ieee80211_rx_status rx_status;
  468. /* Prepare rx status */
  469. ath9k_rx_prepare(sc, skb, status, &rx_status);
  470. if (!(status->flags & ATH_RX_DECRYPT_ERROR))
  471. rx_status.flag |= RX_FLAG_DECRYPTED;
  472. __ieee80211_rx(hw, skb, &rx_status);
  473. return 0;
  474. }
  475. /********************************/
  476. /* LED functions */
  477. /********************************/
  478. static void ath_led_brightness(struct led_classdev *led_cdev,
  479. enum led_brightness brightness)
  480. {
  481. struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
  482. struct ath_softc *sc = led->sc;
  483. switch (brightness) {
  484. case LED_OFF:
  485. if (led->led_type == ATH_LED_ASSOC ||
  486. led->led_type == ATH_LED_RADIO)
  487. sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
  488. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
  489. (led->led_type == ATH_LED_RADIO) ? 1 :
  490. !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
  491. break;
  492. case LED_FULL:
  493. if (led->led_type == ATH_LED_ASSOC)
  494. sc->sc_flags |= SC_OP_LED_ASSOCIATED;
  495. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
  496. break;
  497. default:
  498. break;
  499. }
  500. }
  501. static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
  502. char *trigger)
  503. {
  504. int ret;
  505. led->sc = sc;
  506. led->led_cdev.name = led->name;
  507. led->led_cdev.default_trigger = trigger;
  508. led->led_cdev.brightness_set = ath_led_brightness;
  509. ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
  510. if (ret)
  511. DPRINTF(sc, ATH_DBG_FATAL,
  512. "Failed to register led:%s", led->name);
  513. else
  514. led->registered = 1;
  515. return ret;
  516. }
  517. static void ath_unregister_led(struct ath_led *led)
  518. {
  519. if (led->registered) {
  520. led_classdev_unregister(&led->led_cdev);
  521. led->registered = 0;
  522. }
  523. }
  524. static void ath_deinit_leds(struct ath_softc *sc)
  525. {
  526. ath_unregister_led(&sc->assoc_led);
  527. sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
  528. ath_unregister_led(&sc->tx_led);
  529. ath_unregister_led(&sc->rx_led);
  530. ath_unregister_led(&sc->radio_led);
  531. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
  532. }
  533. static void ath_init_leds(struct ath_softc *sc)
  534. {
  535. char *trigger;
  536. int ret;
  537. /* Configure gpio 1 for output */
  538. ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
  539. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  540. /* LED off, active low */
  541. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
  542. trigger = ieee80211_get_radio_led_name(sc->hw);
  543. snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
  544. "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
  545. ret = ath_register_led(sc, &sc->radio_led, trigger);
  546. sc->radio_led.led_type = ATH_LED_RADIO;
  547. if (ret)
  548. goto fail;
  549. trigger = ieee80211_get_assoc_led_name(sc->hw);
  550. snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
  551. "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
  552. ret = ath_register_led(sc, &sc->assoc_led, trigger);
  553. sc->assoc_led.led_type = ATH_LED_ASSOC;
  554. if (ret)
  555. goto fail;
  556. trigger = ieee80211_get_tx_led_name(sc->hw);
  557. snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
  558. "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
  559. ret = ath_register_led(sc, &sc->tx_led, trigger);
  560. sc->tx_led.led_type = ATH_LED_TX;
  561. if (ret)
  562. goto fail;
  563. trigger = ieee80211_get_rx_led_name(sc->hw);
  564. snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
  565. "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
  566. ret = ath_register_led(sc, &sc->rx_led, trigger);
  567. sc->rx_led.led_type = ATH_LED_RX;
  568. if (ret)
  569. goto fail;
  570. return;
  571. fail:
  572. ath_deinit_leds(sc);
  573. }
  574. static int ath_detach(struct ath_softc *sc)
  575. {
  576. struct ieee80211_hw *hw = sc->hw;
  577. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
  578. /* Deinit LED control */
  579. ath_deinit_leds(sc);
  580. /* Unregister hw */
  581. ieee80211_unregister_hw(hw);
  582. /* unregister Rate control */
  583. ath_rate_control_unregister();
  584. /* tx/rx cleanup */
  585. ath_rx_cleanup(sc);
  586. ath_tx_cleanup(sc);
  587. /* Deinit */
  588. ath_deinit(sc);
  589. return 0;
  590. }
  591. static int ath_attach(u16 devid,
  592. struct ath_softc *sc)
  593. {
  594. struct ieee80211_hw *hw = sc->hw;
  595. int error = 0;
  596. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
  597. error = ath_init(devid, sc);
  598. if (error != 0)
  599. return error;
  600. /* Init nodes */
  601. INIT_LIST_HEAD(&sc->node_list);
  602. spin_lock_init(&sc->node_lock);
  603. /* get mac address from hardware and set in mac80211 */
  604. SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
  605. /* setup channels and rates */
  606. sc->sbands[IEEE80211_BAND_2GHZ].channels =
  607. sc->channels[IEEE80211_BAND_2GHZ];
  608. sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
  609. sc->rates[IEEE80211_BAND_2GHZ];
  610. sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
  611. if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
  612. /* Setup HT capabilities for 2.4Ghz*/
  613. setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
  614. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  615. &sc->sbands[IEEE80211_BAND_2GHZ];
  616. if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
  617. sc->sbands[IEEE80211_BAND_5GHZ].channels =
  618. sc->channels[IEEE80211_BAND_5GHZ];
  619. sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
  620. sc->rates[IEEE80211_BAND_5GHZ];
  621. sc->sbands[IEEE80211_BAND_5GHZ].band =
  622. IEEE80211_BAND_5GHZ;
  623. if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
  624. /* Setup HT capabilities for 5Ghz*/
  625. setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
  626. hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  627. &sc->sbands[IEEE80211_BAND_5GHZ];
  628. }
  629. /* FIXME: Have to figure out proper hw init values later */
  630. hw->queues = 4;
  631. hw->ampdu_queues = 1;
  632. /* Register rate control */
  633. hw->rate_control_algorithm = "ath9k_rate_control";
  634. error = ath_rate_control_register();
  635. if (error != 0) {
  636. DPRINTF(sc, ATH_DBG_FATAL,
  637. "%s: Unable to register rate control "
  638. "algorithm:%d\n", __func__, error);
  639. ath_rate_control_unregister();
  640. goto bad;
  641. }
  642. error = ieee80211_register_hw(hw);
  643. if (error != 0) {
  644. ath_rate_control_unregister();
  645. goto bad;
  646. }
  647. /* Initialize LED control */
  648. ath_init_leds(sc);
  649. /* initialize tx/rx engine */
  650. error = ath_tx_init(sc, ATH_TXBUF);
  651. if (error != 0)
  652. goto detach;
  653. error = ath_rx_init(sc, ATH_RXBUF);
  654. if (error != 0)
  655. goto detach;
  656. return 0;
  657. detach:
  658. ath_detach(sc);
  659. bad:
  660. return error;
  661. }
  662. static int ath9k_start(struct ieee80211_hw *hw)
  663. {
  664. struct ath_softc *sc = hw->priv;
  665. struct ieee80211_channel *curchan = hw->conf.channel;
  666. int error = 0, pos;
  667. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
  668. "initial channel: %d MHz\n", __func__, curchan->center_freq);
  669. /* setup initial channel */
  670. pos = ath_get_channel(sc, curchan);
  671. if (pos == -1) {
  672. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
  673. return -EINVAL;
  674. }
  675. sc->sc_ah->ah_channels[pos].chanmode =
  676. (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
  677. /* open ath_dev */
  678. error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
  679. if (error) {
  680. DPRINTF(sc, ATH_DBG_FATAL,
  681. "%s: Unable to complete ath_open\n", __func__);
  682. return error;
  683. }
  684. ieee80211_wake_queues(hw);
  685. return 0;
  686. }
  687. static int ath9k_tx(struct ieee80211_hw *hw,
  688. struct sk_buff *skb)
  689. {
  690. struct ath_softc *sc = hw->priv;
  691. int hdrlen, padsize;
  692. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  693. /*
  694. * As a temporary workaround, assign seq# here; this will likely need
  695. * to be cleaned up to work better with Beacon transmission and virtual
  696. * BSSes.
  697. */
  698. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  699. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  700. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  701. sc->seq_no += 0x10;
  702. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  703. hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
  704. }
  705. /* Add the padding after the header if this is not already done */
  706. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  707. if (hdrlen & 3) {
  708. padsize = hdrlen % 4;
  709. if (skb_headroom(skb) < padsize)
  710. return -1;
  711. skb_push(skb, padsize);
  712. memmove(skb->data, skb->data + padsize, hdrlen);
  713. }
  714. DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
  715. __func__,
  716. skb);
  717. if (ath_tx_start(sc, skb) != 0) {
  718. DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
  719. dev_kfree_skb_any(skb);
  720. /* FIXME: Check for proper return value from ATH_DEV */
  721. return 0;
  722. }
  723. return 0;
  724. }
  725. static void ath9k_stop(struct ieee80211_hw *hw)
  726. {
  727. struct ath_softc *sc = hw->priv;
  728. int error;
  729. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
  730. error = ath_suspend(sc);
  731. if (error)
  732. DPRINTF(sc, ATH_DBG_CONFIG,
  733. "%s: Device is no longer present\n", __func__);
  734. ieee80211_stop_queues(hw);
  735. }
  736. static int ath9k_add_interface(struct ieee80211_hw *hw,
  737. struct ieee80211_if_init_conf *conf)
  738. {
  739. struct ath_softc *sc = hw->priv;
  740. int error, ic_opmode = 0;
  741. /* Support only vap for now */
  742. if (sc->sc_nvaps)
  743. return -ENOBUFS;
  744. switch (conf->type) {
  745. case IEEE80211_IF_TYPE_STA:
  746. ic_opmode = ATH9K_M_STA;
  747. break;
  748. case IEEE80211_IF_TYPE_IBSS:
  749. ic_opmode = ATH9K_M_IBSS;
  750. break;
  751. case IEEE80211_IF_TYPE_AP:
  752. ic_opmode = ATH9K_M_HOSTAP;
  753. break;
  754. default:
  755. DPRINTF(sc, ATH_DBG_FATAL,
  756. "%s: Interface type %d not yet supported\n",
  757. __func__, conf->type);
  758. return -EOPNOTSUPP;
  759. }
  760. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
  761. __func__,
  762. ic_opmode);
  763. error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
  764. if (error) {
  765. DPRINTF(sc, ATH_DBG_FATAL,
  766. "%s: Unable to attach vap, error: %d\n",
  767. __func__, error);
  768. return error;
  769. }
  770. return 0;
  771. }
  772. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  773. struct ieee80211_if_init_conf *conf)
  774. {
  775. struct ath_softc *sc = hw->priv;
  776. struct ath_vap *avp;
  777. int error;
  778. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
  779. avp = sc->sc_vaps[0];
  780. if (avp == NULL) {
  781. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  782. __func__);
  783. return;
  784. }
  785. #ifdef CONFIG_SLOW_ANT_DIV
  786. ath_slow_ant_div_stop(&sc->sc_antdiv);
  787. #endif
  788. /* Update ratectrl */
  789. ath_rate_newstate(sc, avp);
  790. /* Reclaim beacon resources */
  791. if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
  792. sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
  793. ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
  794. ath_beacon_return(sc, avp);
  795. }
  796. /* Set interrupt mask */
  797. sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  798. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
  799. sc->sc_flags &= ~SC_OP_BEACONS;
  800. error = ath_vap_detach(sc, 0);
  801. if (error)
  802. DPRINTF(sc, ATH_DBG_FATAL,
  803. "%s: Unable to detach vap, error: %d\n",
  804. __func__, error);
  805. }
  806. static int ath9k_config(struct ieee80211_hw *hw,
  807. struct ieee80211_conf *conf)
  808. {
  809. struct ath_softc *sc = hw->priv;
  810. struct ieee80211_channel *curchan = hw->conf.channel;
  811. int pos;
  812. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
  813. __func__,
  814. curchan->center_freq);
  815. pos = ath_get_channel(sc, curchan);
  816. if (pos == -1) {
  817. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
  818. return -EINVAL;
  819. }
  820. sc->sc_ah->ah_channels[pos].chanmode =
  821. (curchan->band == IEEE80211_BAND_2GHZ) ?
  822. CHANNEL_G : CHANNEL_A;
  823. if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
  824. sc->sc_ah->ah_channels[pos].chanmode =
  825. ath_get_extchanmode(sc, curchan);
  826. sc->sc_config.txpowlimit = 2 * conf->power_level;
  827. /* set h/w channel */
  828. if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
  829. DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
  830. __func__);
  831. return 0;
  832. }
  833. static int ath9k_config_interface(struct ieee80211_hw *hw,
  834. struct ieee80211_vif *vif,
  835. struct ieee80211_if_conf *conf)
  836. {
  837. struct ath_softc *sc = hw->priv;
  838. struct ath_hal *ah = sc->sc_ah;
  839. struct ath_vap *avp;
  840. u32 rfilt = 0;
  841. int error, i;
  842. DECLARE_MAC_BUF(mac);
  843. avp = sc->sc_vaps[0];
  844. if (avp == NULL) {
  845. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  846. __func__);
  847. return -EINVAL;
  848. }
  849. /* TODO: Need to decide which hw opmode to use for multi-interface
  850. * cases */
  851. if (vif->type == IEEE80211_IF_TYPE_AP &&
  852. ah->ah_opmode != ATH9K_M_HOSTAP) {
  853. ah->ah_opmode = ATH9K_M_HOSTAP;
  854. ath9k_hw_setopmode(ah);
  855. ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
  856. /* Request full reset to get hw opmode changed properly */
  857. sc->sc_flags |= SC_OP_FULL_RESET;
  858. }
  859. if ((conf->changed & IEEE80211_IFCC_BSSID) &&
  860. !is_zero_ether_addr(conf->bssid)) {
  861. switch (vif->type) {
  862. case IEEE80211_IF_TYPE_STA:
  863. case IEEE80211_IF_TYPE_IBSS:
  864. /* Update ratectrl about the new state */
  865. ath_rate_newstate(sc, avp);
  866. /* Set BSSID */
  867. memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
  868. sc->sc_curaid = 0;
  869. ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
  870. sc->sc_curaid);
  871. /* Set aggregation protection mode parameters */
  872. sc->sc_config.ath_aggr_prot = 0;
  873. /*
  874. * Reset our TSF so that its value is lower than the
  875. * beacon that we are trying to catch.
  876. * Only then hw will update its TSF register with the
  877. * new beacon. Reset the TSF before setting the BSSID
  878. * to avoid allowing in any frames that would update
  879. * our TSF only to have us clear it
  880. * immediately thereafter.
  881. */
  882. ath9k_hw_reset_tsf(sc->sc_ah);
  883. /* Disable BMISS interrupt when we're not associated */
  884. ath9k_hw_set_interrupts(sc->sc_ah,
  885. sc->sc_imask &
  886. ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
  887. sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  888. DPRINTF(sc, ATH_DBG_CONFIG,
  889. "%s: RX filter 0x%x bssid %s aid 0x%x\n",
  890. __func__, rfilt,
  891. print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
  892. /* need to reconfigure the beacon */
  893. sc->sc_flags &= ~SC_OP_BEACONS ;
  894. break;
  895. default:
  896. break;
  897. }
  898. }
  899. if ((conf->changed & IEEE80211_IFCC_BEACON) &&
  900. ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
  901. (vif->type == IEEE80211_IF_TYPE_AP))) {
  902. /*
  903. * Allocate and setup the beacon frame.
  904. *
  905. * Stop any previous beacon DMA. This may be
  906. * necessary, for example, when an ibss merge
  907. * causes reconfiguration; we may be called
  908. * with beacon transmission active.
  909. */
  910. ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
  911. error = ath_beacon_alloc(sc, 0);
  912. if (error != 0)
  913. return error;
  914. ath_beacon_sync(sc, 0);
  915. }
  916. /* Check for WLAN_CAPABILITY_PRIVACY ? */
  917. if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
  918. for (i = 0; i < IEEE80211_WEP_NKID; i++)
  919. if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
  920. ath9k_hw_keysetmac(sc->sc_ah,
  921. (u16)i,
  922. sc->sc_curbssid);
  923. }
  924. /* Only legacy IBSS for now */
  925. if (vif->type == IEEE80211_IF_TYPE_IBSS)
  926. ath_update_chainmask(sc, 0);
  927. return 0;
  928. }
  929. #define SUPPORTED_FILTERS \
  930. (FIF_PROMISC_IN_BSS | \
  931. FIF_ALLMULTI | \
  932. FIF_CONTROL | \
  933. FIF_OTHER_BSS | \
  934. FIF_BCN_PRBRESP_PROMISC | \
  935. FIF_FCSFAIL)
  936. /* FIXME: sc->sc_full_reset ? */
  937. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  938. unsigned int changed_flags,
  939. unsigned int *total_flags,
  940. int mc_count,
  941. struct dev_mc_list *mclist)
  942. {
  943. struct ath_softc *sc = hw->priv;
  944. u32 rfilt;
  945. changed_flags &= SUPPORTED_FILTERS;
  946. *total_flags &= SUPPORTED_FILTERS;
  947. sc->rx_filter = *total_flags;
  948. rfilt = ath_calcrxfilter(sc);
  949. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  950. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  951. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  952. ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
  953. }
  954. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
  955. __func__, sc->rx_filter);
  956. }
  957. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  958. struct ieee80211_vif *vif,
  959. enum sta_notify_cmd cmd,
  960. const u8 *addr)
  961. {
  962. struct ath_softc *sc = hw->priv;
  963. struct ath_node *an;
  964. unsigned long flags;
  965. DECLARE_MAC_BUF(mac);
  966. spin_lock_irqsave(&sc->node_lock, flags);
  967. an = ath_node_find(sc, (u8 *) addr);
  968. spin_unlock_irqrestore(&sc->node_lock, flags);
  969. switch (cmd) {
  970. case STA_NOTIFY_ADD:
  971. spin_lock_irqsave(&sc->node_lock, flags);
  972. if (!an) {
  973. ath_node_attach(sc, (u8 *)addr, 0);
  974. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
  975. __func__,
  976. print_mac(mac, addr));
  977. } else {
  978. ath_node_get(sc, (u8 *)addr);
  979. }
  980. spin_unlock_irqrestore(&sc->node_lock, flags);
  981. break;
  982. case STA_NOTIFY_REMOVE:
  983. if (!an)
  984. DPRINTF(sc, ATH_DBG_FATAL,
  985. "%s: Removal of a non-existent node\n",
  986. __func__);
  987. else {
  988. ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
  989. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
  990. __func__,
  991. print_mac(mac, addr));
  992. }
  993. break;
  994. default:
  995. break;
  996. }
  997. }
  998. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  999. u16 queue,
  1000. const struct ieee80211_tx_queue_params *params)
  1001. {
  1002. struct ath_softc *sc = hw->priv;
  1003. struct ath9k_tx_queue_info qi;
  1004. int ret = 0, qnum;
  1005. if (queue >= WME_NUM_AC)
  1006. return 0;
  1007. qi.tqi_aifs = params->aifs;
  1008. qi.tqi_cwmin = params->cw_min;
  1009. qi.tqi_cwmax = params->cw_max;
  1010. qi.tqi_burstTime = params->txop;
  1011. qnum = ath_get_hal_qnum(queue, sc);
  1012. DPRINTF(sc, ATH_DBG_CONFIG,
  1013. "%s: Configure tx [queue/halq] [%d/%d], "
  1014. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1015. __func__,
  1016. queue,
  1017. qnum,
  1018. params->aifs,
  1019. params->cw_min,
  1020. params->cw_max,
  1021. params->txop);
  1022. ret = ath_txq_update(sc, qnum, &qi);
  1023. if (ret)
  1024. DPRINTF(sc, ATH_DBG_FATAL,
  1025. "%s: TXQ Update failed\n", __func__);
  1026. return ret;
  1027. }
  1028. static int ath9k_set_key(struct ieee80211_hw *hw,
  1029. enum set_key_cmd cmd,
  1030. const u8 *local_addr,
  1031. const u8 *addr,
  1032. struct ieee80211_key_conf *key)
  1033. {
  1034. struct ath_softc *sc = hw->priv;
  1035. int ret = 0;
  1036. DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
  1037. switch (cmd) {
  1038. case SET_KEY:
  1039. ret = ath_key_config(sc, addr, key);
  1040. if (!ret) {
  1041. set_bit(key->keyidx, sc->sc_keymap);
  1042. key->hw_key_idx = key->keyidx;
  1043. /* push IV and Michael MIC generation to stack */
  1044. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1045. if (key->alg == ALG_TKIP)
  1046. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1047. }
  1048. break;
  1049. case DISABLE_KEY:
  1050. ath_key_delete(sc, key);
  1051. clear_bit(key->keyidx, sc->sc_keymap);
  1052. sc->sc_keytype = ATH9K_CIPHER_CLR;
  1053. break;
  1054. default:
  1055. ret = -EINVAL;
  1056. }
  1057. return ret;
  1058. }
  1059. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1060. struct ieee80211_vif *vif,
  1061. struct ieee80211_bss_conf *bss_conf,
  1062. u32 changed)
  1063. {
  1064. struct ath_softc *sc = hw->priv;
  1065. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1066. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
  1067. __func__,
  1068. bss_conf->use_short_preamble);
  1069. if (bss_conf->use_short_preamble)
  1070. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1071. else
  1072. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1073. }
  1074. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1075. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
  1076. __func__,
  1077. bss_conf->use_cts_prot);
  1078. if (bss_conf->use_cts_prot &&
  1079. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1080. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1081. else
  1082. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1083. }
  1084. if (changed & BSS_CHANGED_HT) {
  1085. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
  1086. __func__,
  1087. bss_conf->assoc_ht);
  1088. ath9k_ht_conf(sc, bss_conf);
  1089. }
  1090. if (changed & BSS_CHANGED_ASSOC) {
  1091. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
  1092. __func__,
  1093. bss_conf->assoc);
  1094. ath9k_bss_assoc_info(sc, bss_conf);
  1095. }
  1096. }
  1097. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1098. {
  1099. u64 tsf;
  1100. struct ath_softc *sc = hw->priv;
  1101. struct ath_hal *ah = sc->sc_ah;
  1102. tsf = ath9k_hw_gettsf64(ah);
  1103. return tsf;
  1104. }
  1105. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1106. {
  1107. struct ath_softc *sc = hw->priv;
  1108. struct ath_hal *ah = sc->sc_ah;
  1109. ath9k_hw_reset_tsf(ah);
  1110. }
  1111. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1112. enum ieee80211_ampdu_mlme_action action,
  1113. const u8 *addr,
  1114. u16 tid,
  1115. u16 *ssn)
  1116. {
  1117. struct ath_softc *sc = hw->priv;
  1118. int ret = 0;
  1119. switch (action) {
  1120. case IEEE80211_AMPDU_RX_START:
  1121. ret = ath_rx_aggr_start(sc, addr, tid, ssn);
  1122. if (ret < 0)
  1123. DPRINTF(sc, ATH_DBG_FATAL,
  1124. "%s: Unable to start RX aggregation\n",
  1125. __func__);
  1126. break;
  1127. case IEEE80211_AMPDU_RX_STOP:
  1128. ret = ath_rx_aggr_stop(sc, addr, tid);
  1129. if (ret < 0)
  1130. DPRINTF(sc, ATH_DBG_FATAL,
  1131. "%s: Unable to stop RX aggregation\n",
  1132. __func__);
  1133. break;
  1134. case IEEE80211_AMPDU_TX_START:
  1135. ret = ath_tx_aggr_start(sc, addr, tid, ssn);
  1136. if (ret < 0)
  1137. DPRINTF(sc, ATH_DBG_FATAL,
  1138. "%s: Unable to start TX aggregation\n",
  1139. __func__);
  1140. else
  1141. ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
  1142. break;
  1143. case IEEE80211_AMPDU_TX_STOP:
  1144. ret = ath_tx_aggr_stop(sc, addr, tid);
  1145. if (ret < 0)
  1146. DPRINTF(sc, ATH_DBG_FATAL,
  1147. "%s: Unable to stop TX aggregation\n",
  1148. __func__);
  1149. ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
  1150. break;
  1151. default:
  1152. DPRINTF(sc, ATH_DBG_FATAL,
  1153. "%s: Unknown AMPDU action\n", __func__);
  1154. }
  1155. return ret;
  1156. }
  1157. static struct ieee80211_ops ath9k_ops = {
  1158. .tx = ath9k_tx,
  1159. .start = ath9k_start,
  1160. .stop = ath9k_stop,
  1161. .add_interface = ath9k_add_interface,
  1162. .remove_interface = ath9k_remove_interface,
  1163. .config = ath9k_config,
  1164. .config_interface = ath9k_config_interface,
  1165. .configure_filter = ath9k_configure_filter,
  1166. .get_stats = NULL,
  1167. .sta_notify = ath9k_sta_notify,
  1168. .conf_tx = ath9k_conf_tx,
  1169. .get_tx_stats = NULL,
  1170. .bss_info_changed = ath9k_bss_info_changed,
  1171. .set_tim = NULL,
  1172. .set_key = ath9k_set_key,
  1173. .hw_scan = NULL,
  1174. .get_tkip_seq = NULL,
  1175. .set_rts_threshold = NULL,
  1176. .set_frag_threshold = NULL,
  1177. .set_retry_limit = NULL,
  1178. .get_tsf = ath9k_get_tsf,
  1179. .reset_tsf = ath9k_reset_tsf,
  1180. .tx_last_beacon = NULL,
  1181. .ampdu_action = ath9k_ampdu_action
  1182. };
  1183. static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  1184. {
  1185. void __iomem *mem;
  1186. struct ath_softc *sc;
  1187. struct ieee80211_hw *hw;
  1188. const char *athname;
  1189. u8 csz;
  1190. u32 val;
  1191. int ret = 0;
  1192. if (pci_enable_device(pdev))
  1193. return -EIO;
  1194. /* XXX 32-bit addressing only */
  1195. if (pci_set_dma_mask(pdev, 0xffffffff)) {
  1196. printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
  1197. ret = -ENODEV;
  1198. goto bad;
  1199. }
  1200. /*
  1201. * Cache line size is used to size and align various
  1202. * structures used to communicate with the hardware.
  1203. */
  1204. pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
  1205. if (csz == 0) {
  1206. /*
  1207. * Linux 2.4.18 (at least) writes the cache line size
  1208. * register as a 16-bit wide register which is wrong.
  1209. * We must have this setup properly for rx buffer
  1210. * DMA to work so force a reasonable value here if it
  1211. * comes up zero.
  1212. */
  1213. csz = L1_CACHE_BYTES / sizeof(u32);
  1214. pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
  1215. }
  1216. /*
  1217. * The default setting of latency timer yields poor results,
  1218. * set it to the value used by other systems. It may be worth
  1219. * tweaking this setting more.
  1220. */
  1221. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
  1222. pci_set_master(pdev);
  1223. /*
  1224. * Disable the RETRY_TIMEOUT register (0x41) to keep
  1225. * PCI Tx retries from interfering with C3 CPU state.
  1226. */
  1227. pci_read_config_dword(pdev, 0x40, &val);
  1228. if ((val & 0x0000ff00) != 0)
  1229. pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
  1230. ret = pci_request_region(pdev, 0, "ath9k");
  1231. if (ret) {
  1232. dev_err(&pdev->dev, "PCI memory region reserve error\n");
  1233. ret = -ENODEV;
  1234. goto bad;
  1235. }
  1236. mem = pci_iomap(pdev, 0, 0);
  1237. if (!mem) {
  1238. printk(KERN_ERR "PCI memory map error\n") ;
  1239. ret = -EIO;
  1240. goto bad1;
  1241. }
  1242. hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
  1243. if (hw == NULL) {
  1244. printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
  1245. goto bad2;
  1246. }
  1247. hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
  1248. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  1249. IEEE80211_HW_SIGNAL_DBM |
  1250. IEEE80211_HW_NOISE_DBM;
  1251. hw->wiphy->interface_modes =
  1252. BIT(NL80211_IFTYPE_AP) |
  1253. BIT(NL80211_IFTYPE_STATION) |
  1254. BIT(NL80211_IFTYPE_ADHOC);
  1255. SET_IEEE80211_DEV(hw, &pdev->dev);
  1256. pci_set_drvdata(pdev, hw);
  1257. sc = hw->priv;
  1258. sc->hw = hw;
  1259. sc->pdev = pdev;
  1260. sc->mem = mem;
  1261. if (ath_attach(id->device, sc) != 0) {
  1262. ret = -ENODEV;
  1263. goto bad3;
  1264. }
  1265. /* setup interrupt service routine */
  1266. if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
  1267. printk(KERN_ERR "%s: request_irq failed\n",
  1268. wiphy_name(hw->wiphy));
  1269. ret = -EIO;
  1270. goto bad4;
  1271. }
  1272. athname = ath9k_hw_probe(id->vendor, id->device);
  1273. printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
  1274. wiphy_name(hw->wiphy),
  1275. athname ? athname : "Atheros ???",
  1276. (unsigned long)mem, pdev->irq);
  1277. return 0;
  1278. bad4:
  1279. ath_detach(sc);
  1280. bad3:
  1281. ieee80211_free_hw(hw);
  1282. bad2:
  1283. pci_iounmap(pdev, mem);
  1284. bad1:
  1285. pci_release_region(pdev, 0);
  1286. bad:
  1287. pci_disable_device(pdev);
  1288. return ret;
  1289. }
  1290. static void ath_pci_remove(struct pci_dev *pdev)
  1291. {
  1292. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  1293. struct ath_softc *sc = hw->priv;
  1294. if (pdev->irq)
  1295. free_irq(pdev->irq, sc);
  1296. ath_detach(sc);
  1297. pci_iounmap(pdev, sc->mem);
  1298. pci_release_region(pdev, 0);
  1299. pci_disable_device(pdev);
  1300. ieee80211_free_hw(hw);
  1301. }
  1302. #ifdef CONFIG_PM
  1303. static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  1304. {
  1305. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  1306. struct ath_softc *sc = hw->priv;
  1307. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
  1308. pci_save_state(pdev);
  1309. pci_disable_device(pdev);
  1310. pci_set_power_state(pdev, 3);
  1311. return 0;
  1312. }
  1313. static int ath_pci_resume(struct pci_dev *pdev)
  1314. {
  1315. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  1316. struct ath_softc *sc = hw->priv;
  1317. u32 val;
  1318. int err;
  1319. err = pci_enable_device(pdev);
  1320. if (err)
  1321. return err;
  1322. pci_restore_state(pdev);
  1323. /*
  1324. * Suspend/Resume resets the PCI configuration space, so we have to
  1325. * re-disable the RETRY_TIMEOUT register (0x41) to keep
  1326. * PCI Tx retries from interfering with C3 CPU state
  1327. */
  1328. pci_read_config_dword(pdev, 0x40, &val);
  1329. if ((val & 0x0000ff00) != 0)
  1330. pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
  1331. /* Enable LED */
  1332. ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
  1333. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  1334. ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
  1335. return 0;
  1336. }
  1337. #endif /* CONFIG_PM */
  1338. MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
  1339. static struct pci_driver ath_pci_driver = {
  1340. .name = "ath9k",
  1341. .id_table = ath_pci_id_table,
  1342. .probe = ath_pci_probe,
  1343. .remove = ath_pci_remove,
  1344. #ifdef CONFIG_PM
  1345. .suspend = ath_pci_suspend,
  1346. .resume = ath_pci_resume,
  1347. #endif /* CONFIG_PM */
  1348. };
  1349. static int __init init_ath_pci(void)
  1350. {
  1351. printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
  1352. if (pci_register_driver(&ath_pci_driver) < 0) {
  1353. printk(KERN_ERR
  1354. "ath_pci: No devices found, driver not installed.\n");
  1355. pci_unregister_driver(&ath_pci_driver);
  1356. return -ENODEV;
  1357. }
  1358. return 0;
  1359. }
  1360. module_init(init_ath_pci);
  1361. static void __exit exit_ath_pci(void)
  1362. {
  1363. pci_unregister_driver(&ath_pci_driver);
  1364. printk(KERN_INFO "%s: driver unloaded\n", dev_info);
  1365. }
  1366. module_exit(exit_ath_pci);