gpio-tc3589x.c 11 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License, version 2
  5. * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
  6. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  7. */
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/slab.h>
  12. #include <linux/gpio.h>
  13. #include <linux/of.h>
  14. #include <linux/irq.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/mfd/tc3589x.h>
  18. /*
  19. * These registers are modified under the irq bus lock and cached to avoid
  20. * unnecessary writes in bus_sync_unlock.
  21. */
  22. enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
  23. #define CACHE_NR_REGS 4
  24. #define CACHE_NR_BANKS 3
  25. struct tc3589x_gpio {
  26. struct gpio_chip chip;
  27. struct tc3589x *tc3589x;
  28. struct device *dev;
  29. struct mutex irq_lock;
  30. struct irq_domain *domain;
  31. int irq_base;
  32. /* Caches of interrupt control registers for bus_lock */
  33. u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
  34. u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
  35. };
  36. static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip)
  37. {
  38. return container_of(chip, struct tc3589x_gpio, chip);
  39. }
  40. static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
  41. {
  42. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  43. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  44. u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
  45. u8 mask = 1 << (offset % 8);
  46. int ret;
  47. ret = tc3589x_reg_read(tc3589x, reg);
  48. if (ret < 0)
  49. return ret;
  50. return ret & mask;
  51. }
  52. static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  53. {
  54. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  55. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  56. u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
  57. unsigned pos = offset % 8;
  58. u8 data[] = {!!val << pos, 1 << pos};
  59. tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
  60. }
  61. static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
  62. unsigned offset, int val)
  63. {
  64. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  65. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  66. u8 reg = TC3589x_GPIODIR0 + offset / 8;
  67. unsigned pos = offset % 8;
  68. tc3589x_gpio_set(chip, offset, val);
  69. return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
  70. }
  71. static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
  72. unsigned offset)
  73. {
  74. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  75. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  76. u8 reg = TC3589x_GPIODIR0 + offset / 8;
  77. unsigned pos = offset % 8;
  78. return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
  79. }
  80. /**
  81. * tc3589x_gpio_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
  82. *
  83. * @tc3589x_gpio: tc3589x_gpio_irq controller to operate on.
  84. * @irq: index of the interrupt requested in the chip IRQs
  85. *
  86. * Useful for drivers to request their own IRQs.
  87. */
  88. static int tc3589x_gpio_irq_get_virq(struct tc3589x_gpio *tc3589x_gpio,
  89. int irq)
  90. {
  91. if (!tc3589x_gpio)
  92. return -EINVAL;
  93. return irq_create_mapping(tc3589x_gpio->domain, irq);
  94. }
  95. static int tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  96. {
  97. struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip);
  98. return tc3589x_gpio_irq_get_virq(tc3589x_gpio, offset);
  99. }
  100. static struct gpio_chip template_chip = {
  101. .label = "tc3589x",
  102. .owner = THIS_MODULE,
  103. .direction_input = tc3589x_gpio_direction_input,
  104. .get = tc3589x_gpio_get,
  105. .direction_output = tc3589x_gpio_direction_output,
  106. .set = tc3589x_gpio_set,
  107. .to_irq = tc3589x_gpio_to_irq,
  108. .can_sleep = 1,
  109. };
  110. static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
  111. {
  112. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  113. int offset = d->hwirq;
  114. int regoffset = offset / 8;
  115. int mask = 1 << (offset % 8);
  116. if (type == IRQ_TYPE_EDGE_BOTH) {
  117. tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
  118. return 0;
  119. }
  120. tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
  121. if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
  122. tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
  123. else
  124. tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
  125. if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
  126. tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
  127. else
  128. tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
  129. return 0;
  130. }
  131. static void tc3589x_gpio_irq_lock(struct irq_data *d)
  132. {
  133. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  134. mutex_lock(&tc3589x_gpio->irq_lock);
  135. }
  136. static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
  137. {
  138. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  139. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  140. static const u8 regmap[] = {
  141. [REG_IBE] = TC3589x_GPIOIBE0,
  142. [REG_IEV] = TC3589x_GPIOIEV0,
  143. [REG_IS] = TC3589x_GPIOIS0,
  144. [REG_IE] = TC3589x_GPIOIE0,
  145. };
  146. int i, j;
  147. for (i = 0; i < CACHE_NR_REGS; i++) {
  148. for (j = 0; j < CACHE_NR_BANKS; j++) {
  149. u8 old = tc3589x_gpio->oldregs[i][j];
  150. u8 new = tc3589x_gpio->regs[i][j];
  151. if (new == old)
  152. continue;
  153. tc3589x_gpio->oldregs[i][j] = new;
  154. tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
  155. }
  156. }
  157. mutex_unlock(&tc3589x_gpio->irq_lock);
  158. }
  159. static void tc3589x_gpio_irq_mask(struct irq_data *d)
  160. {
  161. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  162. int offset = d->hwirq;
  163. int regoffset = offset / 8;
  164. int mask = 1 << (offset % 8);
  165. tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
  166. }
  167. static void tc3589x_gpio_irq_unmask(struct irq_data *d)
  168. {
  169. struct tc3589x_gpio *tc3589x_gpio = irq_data_get_irq_chip_data(d);
  170. int offset = d->hwirq;
  171. int regoffset = offset / 8;
  172. int mask = 1 << (offset % 8);
  173. tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
  174. }
  175. static struct irq_chip tc3589x_gpio_irq_chip = {
  176. .name = "tc3589x-gpio",
  177. .irq_bus_lock = tc3589x_gpio_irq_lock,
  178. .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
  179. .irq_mask = tc3589x_gpio_irq_mask,
  180. .irq_unmask = tc3589x_gpio_irq_unmask,
  181. .irq_set_type = tc3589x_gpio_irq_set_type,
  182. };
  183. static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
  184. {
  185. struct tc3589x_gpio *tc3589x_gpio = dev;
  186. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  187. u8 status[CACHE_NR_BANKS];
  188. int ret;
  189. int i;
  190. ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
  191. ARRAY_SIZE(status), status);
  192. if (ret < 0)
  193. return IRQ_NONE;
  194. for (i = 0; i < ARRAY_SIZE(status); i++) {
  195. unsigned int stat = status[i];
  196. if (!stat)
  197. continue;
  198. while (stat) {
  199. int bit = __ffs(stat);
  200. int line = i * 8 + bit;
  201. int virq = tc3589x_gpio_irq_get_virq(tc3589x_gpio, line);
  202. handle_nested_irq(virq);
  203. stat &= ~(1 << bit);
  204. }
  205. tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
  206. }
  207. return IRQ_HANDLED;
  208. }
  209. static int tc3589x_gpio_irq_map(struct irq_domain *d, unsigned int virq,
  210. irq_hw_number_t hwirq)
  211. {
  212. struct tc3589x *tc3589x_gpio = d->host_data;
  213. irq_set_chip_data(virq, tc3589x_gpio);
  214. irq_set_chip_and_handler(virq, &tc3589x_gpio_irq_chip,
  215. handle_simple_irq);
  216. irq_set_nested_thread(virq, 1);
  217. #ifdef CONFIG_ARM
  218. set_irq_flags(virq, IRQF_VALID);
  219. #else
  220. irq_set_noprobe(virq);
  221. #endif
  222. return 0;
  223. }
  224. static void tc3589x_gpio_irq_unmap(struct irq_domain *d, unsigned int virq)
  225. {
  226. #ifdef CONFIG_ARM
  227. set_irq_flags(virq, 0);
  228. #endif
  229. irq_set_chip_and_handler(virq, NULL, NULL);
  230. irq_set_chip_data(virq, NULL);
  231. }
  232. static struct irq_domain_ops tc3589x_irq_ops = {
  233. .map = tc3589x_gpio_irq_map,
  234. .unmap = tc3589x_gpio_irq_unmap,
  235. .xlate = irq_domain_xlate_twocell,
  236. };
  237. static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio,
  238. struct device_node *np)
  239. {
  240. int base = tc3589x_gpio->irq_base;
  241. if (base) {
  242. tc3589x_gpio->domain = irq_domain_add_legacy(
  243. NULL, tc3589x_gpio->chip.ngpio, base,
  244. 0, &tc3589x_irq_ops, tc3589x_gpio);
  245. }
  246. else {
  247. tc3589x_gpio->domain = irq_domain_add_linear(
  248. np, tc3589x_gpio->chip.ngpio,
  249. &tc3589x_irq_ops, tc3589x_gpio);
  250. }
  251. if (!tc3589x_gpio->domain) {
  252. dev_err(tc3589x_gpio->dev, "Failed to create irqdomain\n");
  253. return -ENOSYS;
  254. }
  255. return 0;
  256. }
  257. static int __devinit tc3589x_gpio_probe(struct platform_device *pdev)
  258. {
  259. struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
  260. struct tc3589x_gpio_platform_data *pdata;
  261. struct device_node *np = pdev->dev.of_node;
  262. struct tc3589x_gpio *tc3589x_gpio;
  263. int ret;
  264. int irq;
  265. pdata = tc3589x->pdata->gpio;
  266. if (!(pdata || np)) {
  267. dev_err(&pdev->dev, "No platform data or Device Tree found\n");
  268. return -EINVAL;
  269. }
  270. irq = platform_get_irq(pdev, 0);
  271. if (irq < 0)
  272. return irq;
  273. tc3589x_gpio = kzalloc(sizeof(struct tc3589x_gpio), GFP_KERNEL);
  274. if (!tc3589x_gpio)
  275. return -ENOMEM;
  276. mutex_init(&tc3589x_gpio->irq_lock);
  277. tc3589x_gpio->dev = &pdev->dev;
  278. tc3589x_gpio->tc3589x = tc3589x;
  279. tc3589x_gpio->chip = template_chip;
  280. tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
  281. tc3589x_gpio->chip.dev = &pdev->dev;
  282. tc3589x_gpio->chip.base = (pdata) ? pdata->gpio_base : -1;
  283. #ifdef CONFIG_OF_GPIO
  284. tc3589x_gpio->chip.of_node = np;
  285. #endif
  286. tc3589x_gpio->irq_base = tc3589x->irq_base ?
  287. tc3589x->irq_base + TC3589x_INT_GPIO(0) : 0;
  288. /* Bring the GPIO module out of reset */
  289. ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
  290. TC3589x_RSTCTRL_GPIRST, 0);
  291. if (ret < 0)
  292. goto out_free;
  293. ret = tc3589x_gpio_irq_init(tc3589x_gpio, np);
  294. if (ret)
  295. goto out_free;
  296. ret = request_threaded_irq(irq, NULL, tc3589x_gpio_irq, IRQF_ONESHOT,
  297. "tc3589x-gpio", tc3589x_gpio);
  298. if (ret) {
  299. dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
  300. goto out_free;
  301. }
  302. ret = gpiochip_add(&tc3589x_gpio->chip);
  303. if (ret) {
  304. dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
  305. goto out_freeirq;
  306. }
  307. if (pdata && pdata->setup)
  308. pdata->setup(tc3589x, tc3589x_gpio->chip.base);
  309. platform_set_drvdata(pdev, tc3589x_gpio);
  310. return 0;
  311. out_freeirq:
  312. free_irq(irq, tc3589x_gpio);
  313. out_free:
  314. kfree(tc3589x_gpio);
  315. return ret;
  316. }
  317. static int __devexit tc3589x_gpio_remove(struct platform_device *pdev)
  318. {
  319. struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
  320. struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
  321. struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio;
  322. int irq = platform_get_irq(pdev, 0);
  323. int ret;
  324. if (pdata && pdata->remove)
  325. pdata->remove(tc3589x, tc3589x_gpio->chip.base);
  326. ret = gpiochip_remove(&tc3589x_gpio->chip);
  327. if (ret < 0) {
  328. dev_err(tc3589x_gpio->dev,
  329. "unable to remove gpiochip: %d\n", ret);
  330. return ret;
  331. }
  332. free_irq(irq, tc3589x_gpio);
  333. platform_set_drvdata(pdev, NULL);
  334. kfree(tc3589x_gpio);
  335. return 0;
  336. }
  337. static struct platform_driver tc3589x_gpio_driver = {
  338. .driver.name = "tc3589x-gpio",
  339. .driver.owner = THIS_MODULE,
  340. .probe = tc3589x_gpio_probe,
  341. .remove = __devexit_p(tc3589x_gpio_remove),
  342. };
  343. static int __init tc3589x_gpio_init(void)
  344. {
  345. return platform_driver_register(&tc3589x_gpio_driver);
  346. }
  347. subsys_initcall(tc3589x_gpio_init);
  348. static void __exit tc3589x_gpio_exit(void)
  349. {
  350. platform_driver_unregister(&tc3589x_gpio_driver);
  351. }
  352. module_exit(tc3589x_gpio_exit);
  353. MODULE_LICENSE("GPL v2");
  354. MODULE_DESCRIPTION("TC3589x GPIO driver");
  355. MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");