gpio-sx150x.c 15 KB

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  1. /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15. * 02110-1301, USA.
  16. */
  17. #include <linux/gpio.h>
  18. #include <linux/i2c.h>
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/irq.h>
  22. #include <linux/module.h>
  23. #include <linux/mutex.h>
  24. #include <linux/slab.h>
  25. #include <linux/workqueue.h>
  26. #include <linux/i2c/sx150x.h>
  27. #define NO_UPDATE_PENDING -1
  28. struct sx150x_device_data {
  29. u8 reg_pullup;
  30. u8 reg_pulldn;
  31. u8 reg_drain;
  32. u8 reg_polarity;
  33. u8 reg_dir;
  34. u8 reg_data;
  35. u8 reg_irq_mask;
  36. u8 reg_irq_src;
  37. u8 reg_sense;
  38. u8 reg_clock;
  39. u8 reg_misc;
  40. u8 reg_reset;
  41. u8 ngpios;
  42. };
  43. struct sx150x_chip {
  44. struct gpio_chip gpio_chip;
  45. struct i2c_client *client;
  46. const struct sx150x_device_data *dev_cfg;
  47. int irq_summary;
  48. int irq_base;
  49. int irq_update;
  50. u32 irq_sense;
  51. u32 irq_masked;
  52. u32 dev_sense;
  53. u32 dev_masked;
  54. struct irq_chip irq_chip;
  55. struct mutex lock;
  56. };
  57. static const struct sx150x_device_data sx150x_devices[] = {
  58. [0] = { /* sx1508q */
  59. .reg_pullup = 0x03,
  60. .reg_pulldn = 0x04,
  61. .reg_drain = 0x05,
  62. .reg_polarity = 0x06,
  63. .reg_dir = 0x07,
  64. .reg_data = 0x08,
  65. .reg_irq_mask = 0x09,
  66. .reg_irq_src = 0x0c,
  67. .reg_sense = 0x0b,
  68. .reg_clock = 0x0f,
  69. .reg_misc = 0x10,
  70. .reg_reset = 0x7d,
  71. .ngpios = 8
  72. },
  73. [1] = { /* sx1509q */
  74. .reg_pullup = 0x07,
  75. .reg_pulldn = 0x09,
  76. .reg_drain = 0x0b,
  77. .reg_polarity = 0x0d,
  78. .reg_dir = 0x0f,
  79. .reg_data = 0x11,
  80. .reg_irq_mask = 0x13,
  81. .reg_irq_src = 0x19,
  82. .reg_sense = 0x17,
  83. .reg_clock = 0x1e,
  84. .reg_misc = 0x1f,
  85. .reg_reset = 0x7d,
  86. .ngpios = 16
  87. },
  88. };
  89. static const struct i2c_device_id sx150x_id[] = {
  90. {"sx1508q", 0},
  91. {"sx1509q", 1},
  92. {}
  93. };
  94. MODULE_DEVICE_TABLE(i2c, sx150x_id);
  95. static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
  96. {
  97. s32 err = i2c_smbus_write_byte_data(client, reg, val);
  98. if (err < 0)
  99. dev_warn(&client->dev,
  100. "i2c write fail: can't write %02x to %02x: %d\n",
  101. val, reg, err);
  102. return err;
  103. }
  104. static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
  105. {
  106. s32 err = i2c_smbus_read_byte_data(client, reg);
  107. if (err >= 0)
  108. *val = err;
  109. else
  110. dev_warn(&client->dev,
  111. "i2c read fail: can't read from %02x: %d\n",
  112. reg, err);
  113. return err;
  114. }
  115. static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
  116. {
  117. return (chip->dev_cfg->ngpios == offset);
  118. }
  119. /*
  120. * These utility functions solve the common problem of locating and setting
  121. * configuration bits. Configuration bits are grouped into registers
  122. * whose indexes increase downwards. For example, with eight-bit registers,
  123. * sixteen gpios would have their config bits grouped in the following order:
  124. * REGISTER N-1 [ f e d c b a 9 8 ]
  125. * N [ 7 6 5 4 3 2 1 0 ]
  126. *
  127. * For multi-bit configurations, the pattern gets wider:
  128. * REGISTER N-3 [ f f e e d d c c ]
  129. * N-2 [ b b a a 9 9 8 8 ]
  130. * N-1 [ 7 7 6 6 5 5 4 4 ]
  131. * N [ 3 3 2 2 1 1 0 0 ]
  132. *
  133. * Given the address of the starting register 'N', the index of the gpio
  134. * whose configuration we seek to change, and the width in bits of that
  135. * configuration, these functions allow us to locate the correct
  136. * register and mask the correct bits.
  137. */
  138. static inline void sx150x_find_cfg(u8 offset, u8 width,
  139. u8 *reg, u8 *mask, u8 *shift)
  140. {
  141. *reg -= offset * width / 8;
  142. *mask = (1 << width) - 1;
  143. *shift = (offset * width) % 8;
  144. *mask <<= *shift;
  145. }
  146. static s32 sx150x_write_cfg(struct sx150x_chip *chip,
  147. u8 offset, u8 width, u8 reg, u8 val)
  148. {
  149. u8 mask;
  150. u8 data;
  151. u8 shift;
  152. s32 err;
  153. sx150x_find_cfg(offset, width, &reg, &mask, &shift);
  154. err = sx150x_i2c_read(chip->client, reg, &data);
  155. if (err < 0)
  156. return err;
  157. data &= ~mask;
  158. data |= (val << shift) & mask;
  159. return sx150x_i2c_write(chip->client, reg, data);
  160. }
  161. static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
  162. {
  163. u8 reg = chip->dev_cfg->reg_data;
  164. u8 mask;
  165. u8 data;
  166. u8 shift;
  167. s32 err;
  168. sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
  169. err = sx150x_i2c_read(chip->client, reg, &data);
  170. if (err >= 0)
  171. err = (data & mask) != 0 ? 1 : 0;
  172. return err;
  173. }
  174. static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
  175. {
  176. sx150x_i2c_write(chip->client,
  177. chip->dev_cfg->reg_clock,
  178. (val ? 0x1f : 0x10));
  179. }
  180. static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
  181. {
  182. sx150x_write_cfg(chip,
  183. offset,
  184. 1,
  185. chip->dev_cfg->reg_data,
  186. (val ? 1 : 0));
  187. }
  188. static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
  189. {
  190. return sx150x_write_cfg(chip,
  191. offset,
  192. 1,
  193. chip->dev_cfg->reg_dir,
  194. 1);
  195. }
  196. static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
  197. {
  198. int err;
  199. err = sx150x_write_cfg(chip,
  200. offset,
  201. 1,
  202. chip->dev_cfg->reg_data,
  203. (val ? 1 : 0));
  204. if (err >= 0)
  205. err = sx150x_write_cfg(chip,
  206. offset,
  207. 1,
  208. chip->dev_cfg->reg_dir,
  209. 0);
  210. return err;
  211. }
  212. static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
  213. {
  214. struct sx150x_chip *chip;
  215. int status = -EINVAL;
  216. chip = container_of(gc, struct sx150x_chip, gpio_chip);
  217. if (!offset_is_oscio(chip, offset)) {
  218. mutex_lock(&chip->lock);
  219. status = sx150x_get_io(chip, offset);
  220. mutex_unlock(&chip->lock);
  221. }
  222. return status;
  223. }
  224. static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
  225. {
  226. struct sx150x_chip *chip;
  227. chip = container_of(gc, struct sx150x_chip, gpio_chip);
  228. mutex_lock(&chip->lock);
  229. if (offset_is_oscio(chip, offset))
  230. sx150x_set_oscio(chip, val);
  231. else
  232. sx150x_set_io(chip, offset, val);
  233. mutex_unlock(&chip->lock);
  234. }
  235. static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
  236. {
  237. struct sx150x_chip *chip;
  238. int status = -EINVAL;
  239. chip = container_of(gc, struct sx150x_chip, gpio_chip);
  240. if (!offset_is_oscio(chip, offset)) {
  241. mutex_lock(&chip->lock);
  242. status = sx150x_io_input(chip, offset);
  243. mutex_unlock(&chip->lock);
  244. }
  245. return status;
  246. }
  247. static int sx150x_gpio_direction_output(struct gpio_chip *gc,
  248. unsigned offset,
  249. int val)
  250. {
  251. struct sx150x_chip *chip;
  252. int status = 0;
  253. chip = container_of(gc, struct sx150x_chip, gpio_chip);
  254. if (!offset_is_oscio(chip, offset)) {
  255. mutex_lock(&chip->lock);
  256. status = sx150x_io_output(chip, offset, val);
  257. mutex_unlock(&chip->lock);
  258. }
  259. return status;
  260. }
  261. static int sx150x_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
  262. {
  263. struct sx150x_chip *chip;
  264. chip = container_of(gc, struct sx150x_chip, gpio_chip);
  265. if (offset >= chip->dev_cfg->ngpios)
  266. return -EINVAL;
  267. if (chip->irq_base < 0)
  268. return -EINVAL;
  269. return chip->irq_base + offset;
  270. }
  271. static void sx150x_irq_mask(struct irq_data *d)
  272. {
  273. struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
  274. unsigned n;
  275. n = d->irq - chip->irq_base;
  276. chip->irq_masked |= (1 << n);
  277. chip->irq_update = n;
  278. }
  279. static void sx150x_irq_unmask(struct irq_data *d)
  280. {
  281. struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
  282. unsigned n;
  283. n = d->irq - chip->irq_base;
  284. chip->irq_masked &= ~(1 << n);
  285. chip->irq_update = n;
  286. }
  287. static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
  288. {
  289. struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
  290. unsigned n, val = 0;
  291. if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
  292. return -EINVAL;
  293. n = d->irq - chip->irq_base;
  294. if (flow_type & IRQ_TYPE_EDGE_RISING)
  295. val |= 0x1;
  296. if (flow_type & IRQ_TYPE_EDGE_FALLING)
  297. val |= 0x2;
  298. chip->irq_sense &= ~(3UL << (n * 2));
  299. chip->irq_sense |= val << (n * 2);
  300. chip->irq_update = n;
  301. return 0;
  302. }
  303. static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
  304. {
  305. struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
  306. unsigned nhandled = 0;
  307. unsigned sub_irq;
  308. unsigned n;
  309. s32 err;
  310. u8 val;
  311. int i;
  312. for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
  313. err = sx150x_i2c_read(chip->client,
  314. chip->dev_cfg->reg_irq_src - i,
  315. &val);
  316. if (err < 0)
  317. continue;
  318. sx150x_i2c_write(chip->client,
  319. chip->dev_cfg->reg_irq_src - i,
  320. val);
  321. for (n = 0; n < 8; ++n) {
  322. if (val & (1 << n)) {
  323. sub_irq = chip->irq_base + (i * 8) + n;
  324. handle_nested_irq(sub_irq);
  325. ++nhandled;
  326. }
  327. }
  328. }
  329. return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
  330. }
  331. static void sx150x_irq_bus_lock(struct irq_data *d)
  332. {
  333. struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
  334. mutex_lock(&chip->lock);
  335. }
  336. static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
  337. {
  338. struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
  339. unsigned n;
  340. if (chip->irq_update == NO_UPDATE_PENDING)
  341. goto out;
  342. n = chip->irq_update;
  343. chip->irq_update = NO_UPDATE_PENDING;
  344. /* Avoid updates if nothing changed */
  345. if (chip->dev_sense == chip->irq_sense &&
  346. chip->dev_sense == chip->irq_masked)
  347. goto out;
  348. chip->dev_sense = chip->irq_sense;
  349. chip->dev_masked = chip->irq_masked;
  350. if (chip->irq_masked & (1 << n)) {
  351. sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
  352. sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
  353. } else {
  354. sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
  355. sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
  356. chip->irq_sense >> (n * 2));
  357. }
  358. out:
  359. mutex_unlock(&chip->lock);
  360. }
  361. static void sx150x_init_chip(struct sx150x_chip *chip,
  362. struct i2c_client *client,
  363. kernel_ulong_t driver_data,
  364. struct sx150x_platform_data *pdata)
  365. {
  366. mutex_init(&chip->lock);
  367. chip->client = client;
  368. chip->dev_cfg = &sx150x_devices[driver_data];
  369. chip->gpio_chip.label = client->name;
  370. chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
  371. chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
  372. chip->gpio_chip.get = sx150x_gpio_get;
  373. chip->gpio_chip.set = sx150x_gpio_set;
  374. chip->gpio_chip.to_irq = sx150x_gpio_to_irq;
  375. chip->gpio_chip.base = pdata->gpio_base;
  376. chip->gpio_chip.can_sleep = 1;
  377. chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
  378. if (pdata->oscio_is_gpo)
  379. ++chip->gpio_chip.ngpio;
  380. chip->irq_chip.name = client->name;
  381. chip->irq_chip.irq_mask = sx150x_irq_mask;
  382. chip->irq_chip.irq_unmask = sx150x_irq_unmask;
  383. chip->irq_chip.irq_set_type = sx150x_irq_set_type;
  384. chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
  385. chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
  386. chip->irq_summary = -1;
  387. chip->irq_base = -1;
  388. chip->irq_masked = ~0;
  389. chip->irq_sense = 0;
  390. chip->dev_masked = ~0;
  391. chip->dev_sense = 0;
  392. chip->irq_update = NO_UPDATE_PENDING;
  393. }
  394. static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
  395. {
  396. int err = 0;
  397. unsigned n;
  398. for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
  399. err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
  400. return err;
  401. }
  402. static int sx150x_reset(struct sx150x_chip *chip)
  403. {
  404. int err;
  405. err = i2c_smbus_write_byte_data(chip->client,
  406. chip->dev_cfg->reg_reset,
  407. 0x12);
  408. if (err < 0)
  409. return err;
  410. err = i2c_smbus_write_byte_data(chip->client,
  411. chip->dev_cfg->reg_reset,
  412. 0x34);
  413. return err;
  414. }
  415. static int sx150x_init_hw(struct sx150x_chip *chip,
  416. struct sx150x_platform_data *pdata)
  417. {
  418. int err = 0;
  419. if (pdata->reset_during_probe) {
  420. err = sx150x_reset(chip);
  421. if (err < 0)
  422. return err;
  423. }
  424. err = sx150x_i2c_write(chip->client,
  425. chip->dev_cfg->reg_misc,
  426. 0x01);
  427. if (err < 0)
  428. return err;
  429. err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
  430. pdata->io_pullup_ena);
  431. if (err < 0)
  432. return err;
  433. err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
  434. pdata->io_pulldn_ena);
  435. if (err < 0)
  436. return err;
  437. err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
  438. pdata->io_open_drain_ena);
  439. if (err < 0)
  440. return err;
  441. err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
  442. pdata->io_polarity);
  443. if (err < 0)
  444. return err;
  445. if (pdata->oscio_is_gpo)
  446. sx150x_set_oscio(chip, 0);
  447. return err;
  448. }
  449. static int sx150x_install_irq_chip(struct sx150x_chip *chip,
  450. int irq_summary,
  451. int irq_base)
  452. {
  453. int err;
  454. unsigned n;
  455. unsigned irq;
  456. chip->irq_summary = irq_summary;
  457. chip->irq_base = irq_base;
  458. for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
  459. irq = irq_base + n;
  460. irq_set_chip_data(irq, chip);
  461. irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
  462. irq_set_nested_thread(irq, 1);
  463. #ifdef CONFIG_ARM
  464. set_irq_flags(irq, IRQF_VALID);
  465. #else
  466. irq_set_noprobe(irq);
  467. #endif
  468. }
  469. err = request_threaded_irq(irq_summary,
  470. NULL,
  471. sx150x_irq_thread_fn,
  472. IRQF_SHARED | IRQF_TRIGGER_FALLING,
  473. chip->irq_chip.name,
  474. chip);
  475. if (err < 0) {
  476. chip->irq_summary = -1;
  477. chip->irq_base = -1;
  478. }
  479. return err;
  480. }
  481. static void sx150x_remove_irq_chip(struct sx150x_chip *chip)
  482. {
  483. unsigned n;
  484. unsigned irq;
  485. free_irq(chip->irq_summary, chip);
  486. for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
  487. irq = chip->irq_base + n;
  488. irq_set_chip_and_handler(irq, NULL, NULL);
  489. }
  490. }
  491. static int __devinit sx150x_probe(struct i2c_client *client,
  492. const struct i2c_device_id *id)
  493. {
  494. static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
  495. I2C_FUNC_SMBUS_WRITE_WORD_DATA;
  496. struct sx150x_platform_data *pdata;
  497. struct sx150x_chip *chip;
  498. int rc;
  499. pdata = client->dev.platform_data;
  500. if (!pdata)
  501. return -EINVAL;
  502. if (!i2c_check_functionality(client->adapter, i2c_funcs))
  503. return -ENOSYS;
  504. chip = kzalloc(sizeof(struct sx150x_chip), GFP_KERNEL);
  505. if (!chip)
  506. return -ENOMEM;
  507. sx150x_init_chip(chip, client, id->driver_data, pdata);
  508. rc = sx150x_init_hw(chip, pdata);
  509. if (rc < 0)
  510. goto probe_fail_pre_gpiochip_add;
  511. rc = gpiochip_add(&chip->gpio_chip);
  512. if (rc < 0)
  513. goto probe_fail_pre_gpiochip_add;
  514. if (pdata->irq_summary >= 0) {
  515. rc = sx150x_install_irq_chip(chip,
  516. pdata->irq_summary,
  517. pdata->irq_base);
  518. if (rc < 0)
  519. goto probe_fail_post_gpiochip_add;
  520. }
  521. i2c_set_clientdata(client, chip);
  522. return 0;
  523. probe_fail_post_gpiochip_add:
  524. WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0);
  525. probe_fail_pre_gpiochip_add:
  526. kfree(chip);
  527. return rc;
  528. }
  529. static int __devexit sx150x_remove(struct i2c_client *client)
  530. {
  531. struct sx150x_chip *chip;
  532. int rc;
  533. chip = i2c_get_clientdata(client);
  534. rc = gpiochip_remove(&chip->gpio_chip);
  535. if (rc < 0)
  536. return rc;
  537. if (chip->irq_summary >= 0)
  538. sx150x_remove_irq_chip(chip);
  539. kfree(chip);
  540. return 0;
  541. }
  542. static struct i2c_driver sx150x_driver = {
  543. .driver = {
  544. .name = "sx150x",
  545. .owner = THIS_MODULE
  546. },
  547. .probe = sx150x_probe,
  548. .remove = __devexit_p(sx150x_remove),
  549. .id_table = sx150x_id,
  550. };
  551. static int __init sx150x_init(void)
  552. {
  553. return i2c_add_driver(&sx150x_driver);
  554. }
  555. subsys_initcall(sx150x_init);
  556. static void __exit sx150x_exit(void)
  557. {
  558. return i2c_del_driver(&sx150x_driver);
  559. }
  560. module_exit(sx150x_exit);
  561. MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
  562. MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
  563. MODULE_LICENSE("GPL v2");
  564. MODULE_ALIAS("i2c:sx150x");