gpio-pcf857x.c 12 KB

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  1. /*
  2. * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
  3. *
  4. * Copyright (C) 2007 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/slab.h>
  22. #include <linux/gpio.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/pcf857x.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/irqdomain.h>
  28. #include <linux/module.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/workqueue.h>
  31. static const struct i2c_device_id pcf857x_id[] = {
  32. { "pcf8574", 8 },
  33. { "pcf8574a", 8 },
  34. { "pca8574", 8 },
  35. { "pca9670", 8 },
  36. { "pca9672", 8 },
  37. { "pca9674", 8 },
  38. { "pcf8575", 16 },
  39. { "pca8575", 16 },
  40. { "pca9671", 16 },
  41. { "pca9673", 16 },
  42. { "pca9675", 16 },
  43. { "max7328", 8 },
  44. { "max7329", 8 },
  45. { }
  46. };
  47. MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  48. /*
  49. * The pcf857x, pca857x, and pca967x chips only expose one read and one
  50. * write register. Writing a "one" bit (to match the reset state) lets
  51. * that pin be used as an input; it's not an open-drain model, but acts
  52. * a bit like one. This is described as "quasi-bidirectional"; read the
  53. * chip documentation for details.
  54. *
  55. * Many other I2C GPIO expander chips (like the pca953x models) have
  56. * more complex register models and more conventional circuitry using
  57. * push/pull drivers. They often use the same 0x20..0x27 addresses as
  58. * pcf857x parts, making the "legacy" I2C driver model problematic.
  59. */
  60. struct pcf857x {
  61. struct gpio_chip chip;
  62. struct i2c_client *client;
  63. struct mutex lock; /* protect 'out' */
  64. struct work_struct work; /* irq demux work */
  65. struct irq_domain *irq_domain; /* for irq demux */
  66. spinlock_t slock; /* protect irq demux */
  67. unsigned out; /* software latch */
  68. unsigned status; /* current status */
  69. int irq; /* real irq number */
  70. int (*write)(struct i2c_client *client, unsigned data);
  71. int (*read)(struct i2c_client *client);
  72. };
  73. /*-------------------------------------------------------------------------*/
  74. /* Talk to 8-bit I/O expander */
  75. static int i2c_write_le8(struct i2c_client *client, unsigned data)
  76. {
  77. return i2c_smbus_write_byte(client, data);
  78. }
  79. static int i2c_read_le8(struct i2c_client *client)
  80. {
  81. return (int)i2c_smbus_read_byte(client);
  82. }
  83. /* Talk to 16-bit I/O expander */
  84. static int i2c_write_le16(struct i2c_client *client, unsigned word)
  85. {
  86. u8 buf[2] = { word & 0xff, word >> 8, };
  87. int status;
  88. status = i2c_master_send(client, buf, 2);
  89. return (status < 0) ? status : 0;
  90. }
  91. static int i2c_read_le16(struct i2c_client *client)
  92. {
  93. u8 buf[2];
  94. int status;
  95. status = i2c_master_recv(client, buf, 2);
  96. if (status < 0)
  97. return status;
  98. return (buf[1] << 8) | buf[0];
  99. }
  100. /*-------------------------------------------------------------------------*/
  101. static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
  102. {
  103. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  104. int status;
  105. mutex_lock(&gpio->lock);
  106. gpio->out |= (1 << offset);
  107. status = gpio->write(gpio->client, gpio->out);
  108. mutex_unlock(&gpio->lock);
  109. return status;
  110. }
  111. static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
  112. {
  113. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  114. int value;
  115. value = gpio->read(gpio->client);
  116. return (value < 0) ? 0 : (value & (1 << offset));
  117. }
  118. static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
  119. {
  120. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  121. unsigned bit = 1 << offset;
  122. int status;
  123. mutex_lock(&gpio->lock);
  124. if (value)
  125. gpio->out |= bit;
  126. else
  127. gpio->out &= ~bit;
  128. status = gpio->write(gpio->client, gpio->out);
  129. mutex_unlock(&gpio->lock);
  130. return status;
  131. }
  132. static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
  133. {
  134. pcf857x_output(chip, offset, value);
  135. }
  136. /*-------------------------------------------------------------------------*/
  137. static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
  138. {
  139. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  140. return irq_create_mapping(gpio->irq_domain, offset);
  141. }
  142. static void pcf857x_irq_demux_work(struct work_struct *work)
  143. {
  144. struct pcf857x *gpio = container_of(work,
  145. struct pcf857x,
  146. work);
  147. unsigned long change, i, status, flags;
  148. status = gpio->read(gpio->client);
  149. spin_lock_irqsave(&gpio->slock, flags);
  150. change = gpio->status ^ status;
  151. for_each_set_bit(i, &change, gpio->chip.ngpio)
  152. generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
  153. gpio->status = status;
  154. spin_unlock_irqrestore(&gpio->slock, flags);
  155. }
  156. static irqreturn_t pcf857x_irq_demux(int irq, void *data)
  157. {
  158. struct pcf857x *gpio = data;
  159. /*
  160. * pcf857x can't read/write data here,
  161. * since i2c data access might go to sleep.
  162. */
  163. schedule_work(&gpio->work);
  164. return IRQ_HANDLED;
  165. }
  166. static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
  167. irq_hw_number_t hw)
  168. {
  169. irq_set_chip_and_handler(virq,
  170. &dummy_irq_chip,
  171. handle_level_irq);
  172. return 0;
  173. }
  174. static struct irq_domain_ops pcf857x_irq_domain_ops = {
  175. .map = pcf857x_irq_domain_map,
  176. };
  177. static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
  178. {
  179. if (gpio->irq_domain)
  180. irq_domain_remove(gpio->irq_domain);
  181. if (gpio->irq)
  182. free_irq(gpio->irq, gpio);
  183. }
  184. static int pcf857x_irq_domain_init(struct pcf857x *gpio,
  185. struct pcf857x_platform_data *pdata,
  186. struct device *dev)
  187. {
  188. int status;
  189. gpio->irq_domain = irq_domain_add_linear(dev->of_node,
  190. gpio->chip.ngpio,
  191. &pcf857x_irq_domain_ops,
  192. NULL);
  193. if (!gpio->irq_domain)
  194. goto fail;
  195. /* enable real irq */
  196. status = request_irq(pdata->irq, pcf857x_irq_demux, 0,
  197. dev_name(dev), gpio);
  198. if (status)
  199. goto fail;
  200. /* enable gpio_to_irq() */
  201. INIT_WORK(&gpio->work, pcf857x_irq_demux_work);
  202. gpio->chip.to_irq = pcf857x_to_irq;
  203. gpio->irq = pdata->irq;
  204. return 0;
  205. fail:
  206. pcf857x_irq_domain_cleanup(gpio);
  207. return -EINVAL;
  208. }
  209. /*-------------------------------------------------------------------------*/
  210. static int pcf857x_probe(struct i2c_client *client,
  211. const struct i2c_device_id *id)
  212. {
  213. struct pcf857x_platform_data *pdata;
  214. struct pcf857x *gpio;
  215. int status;
  216. pdata = client->dev.platform_data;
  217. if (!pdata) {
  218. dev_dbg(&client->dev, "no platform data\n");
  219. }
  220. /* Allocate, initialize, and register this gpio_chip. */
  221. gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
  222. if (!gpio)
  223. return -ENOMEM;
  224. mutex_init(&gpio->lock);
  225. spin_lock_init(&gpio->slock);
  226. gpio->chip.base = pdata ? pdata->gpio_base : -1;
  227. gpio->chip.can_sleep = 1;
  228. gpio->chip.dev = &client->dev;
  229. gpio->chip.owner = THIS_MODULE;
  230. gpio->chip.get = pcf857x_get;
  231. gpio->chip.set = pcf857x_set;
  232. gpio->chip.direction_input = pcf857x_input;
  233. gpio->chip.direction_output = pcf857x_output;
  234. gpio->chip.ngpio = id->driver_data;
  235. /* enable gpio_to_irq() if platform has settings */
  236. if (pdata && pdata->irq) {
  237. status = pcf857x_irq_domain_init(gpio, pdata, &client->dev);
  238. if (status < 0) {
  239. dev_err(&client->dev, "irq_domain init failed\n");
  240. goto fail;
  241. }
  242. }
  243. /* NOTE: the OnSemi jlc1562b is also largely compatible with
  244. * these parts, notably for output. It has a low-resolution
  245. * DAC instead of pin change IRQs; and its inputs can be the
  246. * result of comparators.
  247. */
  248. /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
  249. * 9670, 9672, 9764, and 9764a use quite a variety.
  250. *
  251. * NOTE: we don't distinguish here between *4 and *4a parts.
  252. */
  253. if (gpio->chip.ngpio == 8) {
  254. gpio->write = i2c_write_le8;
  255. gpio->read = i2c_read_le8;
  256. if (!i2c_check_functionality(client->adapter,
  257. I2C_FUNC_SMBUS_BYTE))
  258. status = -EIO;
  259. /* fail if there's no chip present */
  260. else
  261. status = i2c_smbus_read_byte(client);
  262. /* '75/'75c addresses are 0x20..0x27, just like the '74;
  263. * the '75c doesn't have a current source pulling high.
  264. * 9671, 9673, and 9765 use quite a variety of addresses.
  265. *
  266. * NOTE: we don't distinguish here between '75 and '75c parts.
  267. */
  268. } else if (gpio->chip.ngpio == 16) {
  269. gpio->write = i2c_write_le16;
  270. gpio->read = i2c_read_le16;
  271. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  272. status = -EIO;
  273. /* fail if there's no chip present */
  274. else
  275. status = i2c_read_le16(client);
  276. } else {
  277. dev_dbg(&client->dev, "unsupported number of gpios\n");
  278. status = -EINVAL;
  279. }
  280. if (status < 0)
  281. goto fail;
  282. gpio->chip.label = client->name;
  283. gpio->client = client;
  284. i2c_set_clientdata(client, gpio);
  285. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  286. * We can't actually know whether a pin is configured (a) as output
  287. * and driving the signal low, or (b) as input and reporting a low
  288. * value ... without knowing the last value written since the chip
  289. * came out of reset (if any). We can't read the latched output.
  290. *
  291. * In short, the only reliable solution for setting up pin direction
  292. * is to do it explicitly. The setup() method can do that, but it
  293. * may cause transient glitching since it can't know the last value
  294. * written (some pins may need to be driven low).
  295. *
  296. * Using pdata->n_latch avoids that trouble. When left initialized
  297. * to zero, our software copy of the "latch" then matches the chip's
  298. * all-ones reset state. Otherwise it flags pins to be driven low.
  299. */
  300. gpio->out = pdata ? ~pdata->n_latch : ~0;
  301. gpio->status = gpio->out;
  302. status = gpiochip_add(&gpio->chip);
  303. if (status < 0)
  304. goto fail;
  305. /* NOTE: these chips can issue "some pin-changed" IRQs, which we
  306. * don't yet even try to use. Among other issues, the relevant
  307. * genirq state isn't available to modular drivers; and most irq
  308. * methods can't be called from sleeping contexts.
  309. */
  310. dev_info(&client->dev, "%s\n",
  311. client->irq ? " (irq ignored)" : "");
  312. /* Let platform code set up the GPIOs and their users.
  313. * Now is the first time anyone could use them.
  314. */
  315. if (pdata && pdata->setup) {
  316. status = pdata->setup(client,
  317. gpio->chip.base, gpio->chip.ngpio,
  318. pdata->context);
  319. if (status < 0)
  320. dev_warn(&client->dev, "setup --> %d\n", status);
  321. }
  322. return 0;
  323. fail:
  324. dev_dbg(&client->dev, "probe error %d for '%s'\n",
  325. status, client->name);
  326. if (pdata && pdata->irq)
  327. pcf857x_irq_domain_cleanup(gpio);
  328. kfree(gpio);
  329. return status;
  330. }
  331. static int pcf857x_remove(struct i2c_client *client)
  332. {
  333. struct pcf857x_platform_data *pdata = client->dev.platform_data;
  334. struct pcf857x *gpio = i2c_get_clientdata(client);
  335. int status = 0;
  336. if (pdata && pdata->teardown) {
  337. status = pdata->teardown(client,
  338. gpio->chip.base, gpio->chip.ngpio,
  339. pdata->context);
  340. if (status < 0) {
  341. dev_err(&client->dev, "%s --> %d\n",
  342. "teardown", status);
  343. return status;
  344. }
  345. }
  346. if (pdata && pdata->irq)
  347. pcf857x_irq_domain_cleanup(gpio);
  348. status = gpiochip_remove(&gpio->chip);
  349. if (status == 0)
  350. kfree(gpio);
  351. else
  352. dev_err(&client->dev, "%s --> %d\n", "remove", status);
  353. return status;
  354. }
  355. static struct i2c_driver pcf857x_driver = {
  356. .driver = {
  357. .name = "pcf857x",
  358. .owner = THIS_MODULE,
  359. },
  360. .probe = pcf857x_probe,
  361. .remove = pcf857x_remove,
  362. .id_table = pcf857x_id,
  363. };
  364. static int __init pcf857x_init(void)
  365. {
  366. return i2c_add_driver(&pcf857x_driver);
  367. }
  368. /* register after i2c postcore initcall and before
  369. * subsys initcalls that may rely on these GPIOs
  370. */
  371. subsys_initcall(pcf857x_init);
  372. static void __exit pcf857x_exit(void)
  373. {
  374. i2c_del_driver(&pcf857x_driver);
  375. }
  376. module_exit(pcf857x_exit);
  377. MODULE_LICENSE("GPL");
  378. MODULE_AUTHOR("David Brownell");