gpio-pca953x.c 17 KB

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  1. /*
  2. * PCA953x 4/8/16 bit I/O ports
  3. *
  4. * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
  5. * Copyright (C) 2007 Marvell International Ltd.
  6. *
  7. * Derived from drivers/i2c/chips/pca9539.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; version 2 of the License.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/gpio.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/irq.h>
  18. #include <linux/i2c.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/slab.h>
  21. #ifdef CONFIG_OF_GPIO
  22. #include <linux/of_platform.h>
  23. #endif
  24. #define PCA953X_INPUT 0
  25. #define PCA953X_OUTPUT 1
  26. #define PCA953X_INVERT 2
  27. #define PCA953X_DIRECTION 3
  28. #define REG_ADDR_AI 0x80
  29. #define PCA957X_IN 0
  30. #define PCA957X_INVRT 1
  31. #define PCA957X_BKEN 2
  32. #define PCA957X_PUPD 3
  33. #define PCA957X_CFG 4
  34. #define PCA957X_OUT 5
  35. #define PCA957X_MSK 6
  36. #define PCA957X_INTS 7
  37. #define PCA_GPIO_MASK 0x00FF
  38. #define PCA_INT 0x0100
  39. #define PCA953X_TYPE 0x1000
  40. #define PCA957X_TYPE 0x2000
  41. static const struct i2c_device_id pca953x_id[] = {
  42. { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
  43. { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  44. { "pca9536", 4 | PCA953X_TYPE, },
  45. { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
  46. { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
  47. { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  48. { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
  49. { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  50. { "pca9556", 8 | PCA953X_TYPE, },
  51. { "pca9557", 8 | PCA953X_TYPE, },
  52. { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
  53. { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  54. { "max7310", 8 | PCA953X_TYPE, },
  55. { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  56. { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  57. { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
  58. { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
  59. { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
  60. { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
  61. { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
  62. { }
  63. };
  64. MODULE_DEVICE_TABLE(i2c, pca953x_id);
  65. struct pca953x_chip {
  66. unsigned gpio_start;
  67. u32 reg_output;
  68. u32 reg_direction;
  69. struct mutex i2c_lock;
  70. #ifdef CONFIG_GPIO_PCA953X_IRQ
  71. struct mutex irq_lock;
  72. u32 irq_mask;
  73. u32 irq_stat;
  74. u32 irq_trig_raise;
  75. u32 irq_trig_fall;
  76. int irq_base;
  77. #endif
  78. struct i2c_client *client;
  79. struct gpio_chip gpio_chip;
  80. const char *const *names;
  81. int chip_type;
  82. };
  83. static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
  84. {
  85. int ret = 0;
  86. if (chip->gpio_chip.ngpio <= 8)
  87. ret = i2c_smbus_write_byte_data(chip->client, reg, val);
  88. else if (chip->gpio_chip.ngpio == 24) {
  89. cpu_to_le32s(&val);
  90. ret = i2c_smbus_write_i2c_block_data(chip->client,
  91. (reg << 2) | REG_ADDR_AI,
  92. 3,
  93. (u8 *) &val);
  94. }
  95. else {
  96. switch (chip->chip_type) {
  97. case PCA953X_TYPE:
  98. ret = i2c_smbus_write_word_data(chip->client,
  99. reg << 1, val);
  100. break;
  101. case PCA957X_TYPE:
  102. ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
  103. val & 0xff);
  104. if (ret < 0)
  105. break;
  106. ret = i2c_smbus_write_byte_data(chip->client,
  107. (reg << 1) + 1,
  108. (val & 0xff00) >> 8);
  109. break;
  110. }
  111. }
  112. if (ret < 0) {
  113. dev_err(&chip->client->dev, "failed writing register\n");
  114. return ret;
  115. }
  116. return 0;
  117. }
  118. static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
  119. {
  120. int ret;
  121. if (chip->gpio_chip.ngpio <= 8) {
  122. ret = i2c_smbus_read_byte_data(chip->client, reg);
  123. *val = ret;
  124. }
  125. else if (chip->gpio_chip.ngpio == 24) {
  126. *val = 0;
  127. ret = i2c_smbus_read_i2c_block_data(chip->client,
  128. (reg << 2) | REG_ADDR_AI,
  129. 3,
  130. (u8 *) val);
  131. le32_to_cpus(val);
  132. } else {
  133. ret = i2c_smbus_read_word_data(chip->client, reg << 1);
  134. *val = ret;
  135. }
  136. if (ret < 0) {
  137. dev_err(&chip->client->dev, "failed reading register\n");
  138. return ret;
  139. }
  140. return 0;
  141. }
  142. static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
  143. {
  144. struct pca953x_chip *chip;
  145. uint reg_val;
  146. int ret, offset = 0;
  147. chip = container_of(gc, struct pca953x_chip, gpio_chip);
  148. mutex_lock(&chip->i2c_lock);
  149. reg_val = chip->reg_direction | (1u << off);
  150. switch (chip->chip_type) {
  151. case PCA953X_TYPE:
  152. offset = PCA953X_DIRECTION;
  153. break;
  154. case PCA957X_TYPE:
  155. offset = PCA957X_CFG;
  156. break;
  157. }
  158. ret = pca953x_write_reg(chip, offset, reg_val);
  159. if (ret)
  160. goto exit;
  161. chip->reg_direction = reg_val;
  162. ret = 0;
  163. exit:
  164. mutex_unlock(&chip->i2c_lock);
  165. return ret;
  166. }
  167. static int pca953x_gpio_direction_output(struct gpio_chip *gc,
  168. unsigned off, int val)
  169. {
  170. struct pca953x_chip *chip;
  171. uint reg_val;
  172. int ret, offset = 0;
  173. chip = container_of(gc, struct pca953x_chip, gpio_chip);
  174. mutex_lock(&chip->i2c_lock);
  175. /* set output level */
  176. if (val)
  177. reg_val = chip->reg_output | (1u << off);
  178. else
  179. reg_val = chip->reg_output & ~(1u << off);
  180. switch (chip->chip_type) {
  181. case PCA953X_TYPE:
  182. offset = PCA953X_OUTPUT;
  183. break;
  184. case PCA957X_TYPE:
  185. offset = PCA957X_OUT;
  186. break;
  187. }
  188. ret = pca953x_write_reg(chip, offset, reg_val);
  189. if (ret)
  190. goto exit;
  191. chip->reg_output = reg_val;
  192. /* then direction */
  193. reg_val = chip->reg_direction & ~(1u << off);
  194. switch (chip->chip_type) {
  195. case PCA953X_TYPE:
  196. offset = PCA953X_DIRECTION;
  197. break;
  198. case PCA957X_TYPE:
  199. offset = PCA957X_CFG;
  200. break;
  201. }
  202. ret = pca953x_write_reg(chip, offset, reg_val);
  203. if (ret)
  204. goto exit;
  205. chip->reg_direction = reg_val;
  206. ret = 0;
  207. exit:
  208. mutex_unlock(&chip->i2c_lock);
  209. return ret;
  210. }
  211. static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
  212. {
  213. struct pca953x_chip *chip;
  214. u32 reg_val;
  215. int ret, offset = 0;
  216. chip = container_of(gc, struct pca953x_chip, gpio_chip);
  217. mutex_lock(&chip->i2c_lock);
  218. switch (chip->chip_type) {
  219. case PCA953X_TYPE:
  220. offset = PCA953X_INPUT;
  221. break;
  222. case PCA957X_TYPE:
  223. offset = PCA957X_IN;
  224. break;
  225. }
  226. ret = pca953x_read_reg(chip, offset, &reg_val);
  227. mutex_unlock(&chip->i2c_lock);
  228. if (ret < 0) {
  229. /* NOTE: diagnostic already emitted; that's all we should
  230. * do unless gpio_*_value_cansleep() calls become different
  231. * from their nonsleeping siblings (and report faults).
  232. */
  233. return 0;
  234. }
  235. return (reg_val & (1u << off)) ? 1 : 0;
  236. }
  237. static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
  238. {
  239. struct pca953x_chip *chip;
  240. u32 reg_val;
  241. int ret, offset = 0;
  242. chip = container_of(gc, struct pca953x_chip, gpio_chip);
  243. mutex_lock(&chip->i2c_lock);
  244. if (val)
  245. reg_val = chip->reg_output | (1u << off);
  246. else
  247. reg_val = chip->reg_output & ~(1u << off);
  248. switch (chip->chip_type) {
  249. case PCA953X_TYPE:
  250. offset = PCA953X_OUTPUT;
  251. break;
  252. case PCA957X_TYPE:
  253. offset = PCA957X_OUT;
  254. break;
  255. }
  256. ret = pca953x_write_reg(chip, offset, reg_val);
  257. if (ret)
  258. goto exit;
  259. chip->reg_output = reg_val;
  260. exit:
  261. mutex_unlock(&chip->i2c_lock);
  262. }
  263. static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
  264. {
  265. struct gpio_chip *gc;
  266. gc = &chip->gpio_chip;
  267. gc->direction_input = pca953x_gpio_direction_input;
  268. gc->direction_output = pca953x_gpio_direction_output;
  269. gc->get = pca953x_gpio_get_value;
  270. gc->set = pca953x_gpio_set_value;
  271. gc->can_sleep = 1;
  272. gc->base = chip->gpio_start;
  273. gc->ngpio = gpios;
  274. gc->label = chip->client->name;
  275. gc->dev = &chip->client->dev;
  276. gc->owner = THIS_MODULE;
  277. gc->names = chip->names;
  278. }
  279. #ifdef CONFIG_GPIO_PCA953X_IRQ
  280. static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
  281. {
  282. struct pca953x_chip *chip;
  283. chip = container_of(gc, struct pca953x_chip, gpio_chip);
  284. return chip->irq_base + off;
  285. }
  286. static void pca953x_irq_mask(struct irq_data *d)
  287. {
  288. struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
  289. chip->irq_mask &= ~(1 << (d->irq - chip->irq_base));
  290. }
  291. static void pca953x_irq_unmask(struct irq_data *d)
  292. {
  293. struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
  294. chip->irq_mask |= 1 << (d->irq - chip->irq_base);
  295. }
  296. static void pca953x_irq_bus_lock(struct irq_data *d)
  297. {
  298. struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
  299. mutex_lock(&chip->irq_lock);
  300. }
  301. static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
  302. {
  303. struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
  304. u32 new_irqs;
  305. u32 level;
  306. /* Look for any newly setup interrupt */
  307. new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
  308. new_irqs &= ~chip->reg_direction;
  309. while (new_irqs) {
  310. level = __ffs(new_irqs);
  311. pca953x_gpio_direction_input(&chip->gpio_chip, level);
  312. new_irqs &= ~(1 << level);
  313. }
  314. mutex_unlock(&chip->irq_lock);
  315. }
  316. static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
  317. {
  318. struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
  319. u32 level = d->irq - chip->irq_base;
  320. u32 mask = 1 << level;
  321. if (!(type & IRQ_TYPE_EDGE_BOTH)) {
  322. dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
  323. d->irq, type);
  324. return -EINVAL;
  325. }
  326. if (type & IRQ_TYPE_EDGE_FALLING)
  327. chip->irq_trig_fall |= mask;
  328. else
  329. chip->irq_trig_fall &= ~mask;
  330. if (type & IRQ_TYPE_EDGE_RISING)
  331. chip->irq_trig_raise |= mask;
  332. else
  333. chip->irq_trig_raise &= ~mask;
  334. return 0;
  335. }
  336. static struct irq_chip pca953x_irq_chip = {
  337. .name = "pca953x",
  338. .irq_mask = pca953x_irq_mask,
  339. .irq_unmask = pca953x_irq_unmask,
  340. .irq_bus_lock = pca953x_irq_bus_lock,
  341. .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
  342. .irq_set_type = pca953x_irq_set_type,
  343. };
  344. static u32 pca953x_irq_pending(struct pca953x_chip *chip)
  345. {
  346. u32 cur_stat;
  347. u32 old_stat;
  348. u32 pending;
  349. u32 trigger;
  350. int ret, offset = 0;
  351. switch (chip->chip_type) {
  352. case PCA953X_TYPE:
  353. offset = PCA953X_INPUT;
  354. break;
  355. case PCA957X_TYPE:
  356. offset = PCA957X_IN;
  357. break;
  358. }
  359. ret = pca953x_read_reg(chip, offset, &cur_stat);
  360. if (ret)
  361. return 0;
  362. /* Remove output pins from the equation */
  363. cur_stat &= chip->reg_direction;
  364. old_stat = chip->irq_stat;
  365. trigger = (cur_stat ^ old_stat) & chip->irq_mask;
  366. if (!trigger)
  367. return 0;
  368. chip->irq_stat = cur_stat;
  369. pending = (old_stat & chip->irq_trig_fall) |
  370. (cur_stat & chip->irq_trig_raise);
  371. pending &= trigger;
  372. return pending;
  373. }
  374. static irqreturn_t pca953x_irq_handler(int irq, void *devid)
  375. {
  376. struct pca953x_chip *chip = devid;
  377. u32 pending;
  378. u32 level;
  379. pending = pca953x_irq_pending(chip);
  380. if (!pending)
  381. return IRQ_HANDLED;
  382. do {
  383. level = __ffs(pending);
  384. handle_nested_irq(level + chip->irq_base);
  385. pending &= ~(1 << level);
  386. } while (pending);
  387. return IRQ_HANDLED;
  388. }
  389. static int pca953x_irq_setup(struct pca953x_chip *chip,
  390. const struct i2c_device_id *id,
  391. int irq_base)
  392. {
  393. struct i2c_client *client = chip->client;
  394. int ret, offset = 0;
  395. u32 temporary;
  396. if (irq_base != -1
  397. && (id->driver_data & PCA_INT)) {
  398. int lvl;
  399. switch (chip->chip_type) {
  400. case PCA953X_TYPE:
  401. offset = PCA953X_INPUT;
  402. break;
  403. case PCA957X_TYPE:
  404. offset = PCA957X_IN;
  405. break;
  406. }
  407. ret = pca953x_read_reg(chip, offset, &temporary);
  408. chip->irq_stat = temporary;
  409. if (ret)
  410. goto out_failed;
  411. /*
  412. * There is no way to know which GPIO line generated the
  413. * interrupt. We have to rely on the previous read for
  414. * this purpose.
  415. */
  416. chip->irq_stat &= chip->reg_direction;
  417. mutex_init(&chip->irq_lock);
  418. chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1);
  419. if (chip->irq_base < 0)
  420. goto out_failed;
  421. for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) {
  422. int irq = lvl + chip->irq_base;
  423. irq_clear_status_flags(irq, IRQ_NOREQUEST);
  424. irq_set_chip_data(irq, chip);
  425. irq_set_chip(irq, &pca953x_irq_chip);
  426. irq_set_nested_thread(irq, true);
  427. #ifdef CONFIG_ARM
  428. set_irq_flags(irq, IRQF_VALID);
  429. #else
  430. irq_set_noprobe(irq);
  431. #endif
  432. }
  433. ret = request_threaded_irq(client->irq,
  434. NULL,
  435. pca953x_irq_handler,
  436. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  437. dev_name(&client->dev), chip);
  438. if (ret) {
  439. dev_err(&client->dev, "failed to request irq %d\n",
  440. client->irq);
  441. goto out_failed;
  442. }
  443. chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
  444. }
  445. return 0;
  446. out_failed:
  447. chip->irq_base = -1;
  448. return ret;
  449. }
  450. static void pca953x_irq_teardown(struct pca953x_chip *chip)
  451. {
  452. if (chip->irq_base != -1) {
  453. irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
  454. free_irq(chip->client->irq, chip);
  455. }
  456. }
  457. #else /* CONFIG_GPIO_PCA953X_IRQ */
  458. static int pca953x_irq_setup(struct pca953x_chip *chip,
  459. const struct i2c_device_id *id,
  460. int irq_base)
  461. {
  462. struct i2c_client *client = chip->client;
  463. if (irq_base != -1 && (id->driver_data & PCA_INT))
  464. dev_warn(&client->dev, "interrupt support not compiled in\n");
  465. return 0;
  466. }
  467. static void pca953x_irq_teardown(struct pca953x_chip *chip)
  468. {
  469. }
  470. #endif
  471. /*
  472. * Handlers for alternative sources of platform_data
  473. */
  474. #ifdef CONFIG_OF_GPIO
  475. /*
  476. * Translate OpenFirmware node properties into platform_data
  477. * WARNING: This is DEPRECATED and will be removed eventually!
  478. */
  479. static void
  480. pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
  481. {
  482. struct device_node *node;
  483. const __be32 *val;
  484. int size;
  485. node = client->dev.of_node;
  486. if (node == NULL)
  487. return;
  488. *gpio_base = -1;
  489. val = of_get_property(node, "linux,gpio-base", &size);
  490. WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
  491. if (val) {
  492. if (size != sizeof(*val))
  493. dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
  494. node->full_name);
  495. else
  496. *gpio_base = be32_to_cpup(val);
  497. }
  498. val = of_get_property(node, "polarity", NULL);
  499. WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
  500. if (val)
  501. *invert = *val;
  502. }
  503. #else
  504. static void
  505. pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
  506. {
  507. *gpio_base = -1;
  508. }
  509. #endif
  510. static int __devinit device_pca953x_init(struct pca953x_chip *chip, u32 invert)
  511. {
  512. int ret;
  513. ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output);
  514. if (ret)
  515. goto out;
  516. ret = pca953x_read_reg(chip, PCA953X_DIRECTION,
  517. &chip->reg_direction);
  518. if (ret)
  519. goto out;
  520. /* set platform specific polarity inversion */
  521. ret = pca953x_write_reg(chip, PCA953X_INVERT, invert);
  522. out:
  523. return ret;
  524. }
  525. static int __devinit device_pca957x_init(struct pca953x_chip *chip, u32 invert)
  526. {
  527. int ret;
  528. u32 val = 0;
  529. /* Let every port in proper state, that could save power */
  530. pca953x_write_reg(chip, PCA957X_PUPD, 0x0);
  531. pca953x_write_reg(chip, PCA957X_CFG, 0xffff);
  532. pca953x_write_reg(chip, PCA957X_OUT, 0x0);
  533. ret = pca953x_read_reg(chip, PCA957X_IN, &val);
  534. if (ret)
  535. goto out;
  536. ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output);
  537. if (ret)
  538. goto out;
  539. ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction);
  540. if (ret)
  541. goto out;
  542. /* set platform specific polarity inversion */
  543. pca953x_write_reg(chip, PCA957X_INVRT, invert);
  544. /* To enable register 6, 7 to controll pull up and pull down */
  545. pca953x_write_reg(chip, PCA957X_BKEN, 0x202);
  546. return 0;
  547. out:
  548. return ret;
  549. }
  550. static int __devinit pca953x_probe(struct i2c_client *client,
  551. const struct i2c_device_id *id)
  552. {
  553. struct pca953x_platform_data *pdata;
  554. struct pca953x_chip *chip;
  555. int irq_base = 0;
  556. int ret;
  557. u32 invert = 0;
  558. chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
  559. if (chip == NULL)
  560. return -ENOMEM;
  561. pdata = client->dev.platform_data;
  562. if (pdata) {
  563. irq_base = pdata->irq_base;
  564. chip->gpio_start = pdata->gpio_base;
  565. invert = pdata->invert;
  566. chip->names = pdata->names;
  567. } else {
  568. pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
  569. #ifdef CONFIG_OF_GPIO
  570. /* If I2C node has no interrupts property, disable GPIO interrupts */
  571. if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
  572. irq_base = -1;
  573. #endif
  574. }
  575. chip->client = client;
  576. chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
  577. mutex_init(&chip->i2c_lock);
  578. /* initialize cached registers from their original values.
  579. * we can't share this chip with another i2c master.
  580. */
  581. pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
  582. if (chip->chip_type == PCA953X_TYPE)
  583. ret = device_pca953x_init(chip, invert);
  584. else
  585. ret = device_pca957x_init(chip, invert);
  586. if (ret)
  587. goto out_failed;
  588. ret = pca953x_irq_setup(chip, id, irq_base);
  589. if (ret)
  590. goto out_failed;
  591. ret = gpiochip_add(&chip->gpio_chip);
  592. if (ret)
  593. goto out_failed_irq;
  594. if (pdata && pdata->setup) {
  595. ret = pdata->setup(client, chip->gpio_chip.base,
  596. chip->gpio_chip.ngpio, pdata->context);
  597. if (ret < 0)
  598. dev_warn(&client->dev, "setup failed, %d\n", ret);
  599. }
  600. i2c_set_clientdata(client, chip);
  601. return 0;
  602. out_failed_irq:
  603. pca953x_irq_teardown(chip);
  604. out_failed:
  605. kfree(chip);
  606. return ret;
  607. }
  608. static int pca953x_remove(struct i2c_client *client)
  609. {
  610. struct pca953x_platform_data *pdata = client->dev.platform_data;
  611. struct pca953x_chip *chip = i2c_get_clientdata(client);
  612. int ret = 0;
  613. if (pdata && pdata->teardown) {
  614. ret = pdata->teardown(client, chip->gpio_chip.base,
  615. chip->gpio_chip.ngpio, pdata->context);
  616. if (ret < 0) {
  617. dev_err(&client->dev, "%s failed, %d\n",
  618. "teardown", ret);
  619. return ret;
  620. }
  621. }
  622. ret = gpiochip_remove(&chip->gpio_chip);
  623. if (ret) {
  624. dev_err(&client->dev, "%s failed, %d\n",
  625. "gpiochip_remove()", ret);
  626. return ret;
  627. }
  628. pca953x_irq_teardown(chip);
  629. kfree(chip);
  630. return 0;
  631. }
  632. static struct i2c_driver pca953x_driver = {
  633. .driver = {
  634. .name = "pca953x",
  635. },
  636. .probe = pca953x_probe,
  637. .remove = pca953x_remove,
  638. .id_table = pca953x_id,
  639. };
  640. static int __init pca953x_init(void)
  641. {
  642. return i2c_add_driver(&pca953x_driver);
  643. }
  644. /* register after i2c postcore initcall and before
  645. * subsys initcalls that may rely on these GPIOs
  646. */
  647. subsys_initcall(pca953x_init);
  648. static void __exit pca953x_exit(void)
  649. {
  650. i2c_del_driver(&pca953x_driver);
  651. }
  652. module_exit(pca953x_exit);
  653. MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
  654. MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
  655. MODULE_LICENSE("GPL");