mmu.c 80 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include "x86.h"
  21. #include "kvm_cache_regs.h"
  22. #include <linux/kvm_host.h>
  23. #include <linux/types.h>
  24. #include <linux/string.h>
  25. #include <linux/mm.h>
  26. #include <linux/highmem.h>
  27. #include <linux/module.h>
  28. #include <linux/swap.h>
  29. #include <linux/hugetlb.h>
  30. #include <linux/compiler.h>
  31. #include <linux/srcu.h>
  32. #include <linux/slab.h>
  33. #include <asm/page.h>
  34. #include <asm/cmpxchg.h>
  35. #include <asm/io.h>
  36. #include <asm/vmx.h>
  37. /*
  38. * When setting this variable to true it enables Two-Dimensional-Paging
  39. * where the hardware walks 2 page tables:
  40. * 1. the guest-virtual to guest-physical
  41. * 2. while doing 1. it walks guest-physical to host-physical
  42. * If the hardware supports that we don't need to do shadow paging.
  43. */
  44. bool tdp_enabled = false;
  45. #undef MMU_DEBUG
  46. #undef AUDIT
  47. #ifdef AUDIT
  48. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  49. #else
  50. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  51. #endif
  52. #ifdef MMU_DEBUG
  53. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  54. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  55. #else
  56. #define pgprintk(x...) do { } while (0)
  57. #define rmap_printk(x...) do { } while (0)
  58. #endif
  59. #if defined(MMU_DEBUG) || defined(AUDIT)
  60. static int dbg = 0;
  61. module_param(dbg, bool, 0644);
  62. #endif
  63. static int oos_shadow = 1;
  64. module_param(oos_shadow, bool, 0644);
  65. #ifndef MMU_DEBUG
  66. #define ASSERT(x) do { } while (0)
  67. #else
  68. #define ASSERT(x) \
  69. if (!(x)) { \
  70. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  71. __FILE__, __LINE__, #x); \
  72. }
  73. #endif
  74. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  75. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  76. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  77. #define PT64_LEVEL_BITS 9
  78. #define PT64_LEVEL_SHIFT(level) \
  79. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  80. #define PT64_LEVEL_MASK(level) \
  81. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  82. #define PT64_INDEX(address, level)\
  83. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  84. #define PT32_LEVEL_BITS 10
  85. #define PT32_LEVEL_SHIFT(level) \
  86. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  87. #define PT32_LEVEL_MASK(level) \
  88. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  89. #define PT32_LVL_OFFSET_MASK(level) \
  90. (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
  91. * PT32_LEVEL_BITS))) - 1))
  92. #define PT32_INDEX(address, level)\
  93. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  94. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  95. #define PT64_DIR_BASE_ADDR_MASK \
  96. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  97. #define PT64_LVL_ADDR_MASK(level) \
  98. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
  99. * PT64_LEVEL_BITS))) - 1))
  100. #define PT64_LVL_OFFSET_MASK(level) \
  101. (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
  102. * PT64_LEVEL_BITS))) - 1))
  103. #define PT32_BASE_ADDR_MASK PAGE_MASK
  104. #define PT32_DIR_BASE_ADDR_MASK \
  105. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  106. #define PT32_LVL_ADDR_MASK(level) \
  107. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
  108. * PT32_LEVEL_BITS))) - 1))
  109. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  110. | PT64_NX_MASK)
  111. #define RMAP_EXT 4
  112. #define ACC_EXEC_MASK 1
  113. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  114. #define ACC_USER_MASK PT_USER_MASK
  115. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  116. #include <trace/events/kvm.h>
  117. #define CREATE_TRACE_POINTS
  118. #include "mmutrace.h"
  119. #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  120. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  121. struct kvm_rmap_desc {
  122. u64 *sptes[RMAP_EXT];
  123. struct kvm_rmap_desc *more;
  124. };
  125. struct kvm_shadow_walk_iterator {
  126. u64 addr;
  127. hpa_t shadow_addr;
  128. int level;
  129. u64 *sptep;
  130. unsigned index;
  131. };
  132. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  133. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  134. shadow_walk_okay(&(_walker)); \
  135. shadow_walk_next(&(_walker)))
  136. typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
  137. static struct kmem_cache *pte_chain_cache;
  138. static struct kmem_cache *rmap_desc_cache;
  139. static struct kmem_cache *mmu_page_header_cache;
  140. static u64 __read_mostly shadow_trap_nonpresent_pte;
  141. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  142. static u64 __read_mostly shadow_base_present_pte;
  143. static u64 __read_mostly shadow_nx_mask;
  144. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  145. static u64 __read_mostly shadow_user_mask;
  146. static u64 __read_mostly shadow_accessed_mask;
  147. static u64 __read_mostly shadow_dirty_mask;
  148. static inline u64 rsvd_bits(int s, int e)
  149. {
  150. return ((1ULL << (e - s + 1)) - 1) << s;
  151. }
  152. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  153. {
  154. shadow_trap_nonpresent_pte = trap_pte;
  155. shadow_notrap_nonpresent_pte = notrap_pte;
  156. }
  157. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  158. void kvm_mmu_set_base_ptes(u64 base_pte)
  159. {
  160. shadow_base_present_pte = base_pte;
  161. }
  162. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  163. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  164. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  165. {
  166. shadow_user_mask = user_mask;
  167. shadow_accessed_mask = accessed_mask;
  168. shadow_dirty_mask = dirty_mask;
  169. shadow_nx_mask = nx_mask;
  170. shadow_x_mask = x_mask;
  171. }
  172. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  173. static int is_write_protection(struct kvm_vcpu *vcpu)
  174. {
  175. return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
  176. }
  177. static int is_cpuid_PSE36(void)
  178. {
  179. return 1;
  180. }
  181. static int is_nx(struct kvm_vcpu *vcpu)
  182. {
  183. return vcpu->arch.efer & EFER_NX;
  184. }
  185. static int is_shadow_present_pte(u64 pte)
  186. {
  187. return pte != shadow_trap_nonpresent_pte
  188. && pte != shadow_notrap_nonpresent_pte;
  189. }
  190. static int is_large_pte(u64 pte)
  191. {
  192. return pte & PT_PAGE_SIZE_MASK;
  193. }
  194. static int is_writable_pte(unsigned long pte)
  195. {
  196. return pte & PT_WRITABLE_MASK;
  197. }
  198. static int is_dirty_gpte(unsigned long pte)
  199. {
  200. return pte & PT_DIRTY_MASK;
  201. }
  202. static int is_rmap_spte(u64 pte)
  203. {
  204. return is_shadow_present_pte(pte);
  205. }
  206. static int is_last_spte(u64 pte, int level)
  207. {
  208. if (level == PT_PAGE_TABLE_LEVEL)
  209. return 1;
  210. if (is_large_pte(pte))
  211. return 1;
  212. return 0;
  213. }
  214. static pfn_t spte_to_pfn(u64 pte)
  215. {
  216. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  217. }
  218. static gfn_t pse36_gfn_delta(u32 gpte)
  219. {
  220. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  221. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  222. }
  223. static void __set_spte(u64 *sptep, u64 spte)
  224. {
  225. #ifdef CONFIG_X86_64
  226. set_64bit((unsigned long *)sptep, spte);
  227. #else
  228. set_64bit((unsigned long long *)sptep, spte);
  229. #endif
  230. }
  231. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  232. struct kmem_cache *base_cache, int min)
  233. {
  234. void *obj;
  235. if (cache->nobjs >= min)
  236. return 0;
  237. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  238. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  239. if (!obj)
  240. return -ENOMEM;
  241. cache->objects[cache->nobjs++] = obj;
  242. }
  243. return 0;
  244. }
  245. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  246. {
  247. while (mc->nobjs)
  248. kfree(mc->objects[--mc->nobjs]);
  249. }
  250. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  251. int min)
  252. {
  253. struct page *page;
  254. if (cache->nobjs >= min)
  255. return 0;
  256. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  257. page = alloc_page(GFP_KERNEL);
  258. if (!page)
  259. return -ENOMEM;
  260. cache->objects[cache->nobjs++] = page_address(page);
  261. }
  262. return 0;
  263. }
  264. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  265. {
  266. while (mc->nobjs)
  267. free_page((unsigned long)mc->objects[--mc->nobjs]);
  268. }
  269. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  270. {
  271. int r;
  272. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  273. pte_chain_cache, 4);
  274. if (r)
  275. goto out;
  276. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  277. rmap_desc_cache, 4);
  278. if (r)
  279. goto out;
  280. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  281. if (r)
  282. goto out;
  283. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  284. mmu_page_header_cache, 4);
  285. out:
  286. return r;
  287. }
  288. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  289. {
  290. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  291. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  292. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  293. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  294. }
  295. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  296. size_t size)
  297. {
  298. void *p;
  299. BUG_ON(!mc->nobjs);
  300. p = mc->objects[--mc->nobjs];
  301. return p;
  302. }
  303. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  304. {
  305. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  306. sizeof(struct kvm_pte_chain));
  307. }
  308. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  309. {
  310. kfree(pc);
  311. }
  312. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  313. {
  314. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  315. sizeof(struct kvm_rmap_desc));
  316. }
  317. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  318. {
  319. kfree(rd);
  320. }
  321. /*
  322. * Return the pointer to the largepage write count for a given
  323. * gfn, handling slots that are not large page aligned.
  324. */
  325. static int *slot_largepage_idx(gfn_t gfn,
  326. struct kvm_memory_slot *slot,
  327. int level)
  328. {
  329. unsigned long idx;
  330. idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
  331. (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
  332. return &slot->lpage_info[level - 2][idx].write_count;
  333. }
  334. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  335. {
  336. struct kvm_memory_slot *slot;
  337. int *write_count;
  338. int i;
  339. gfn = unalias_gfn(kvm, gfn);
  340. slot = gfn_to_memslot_unaliased(kvm, gfn);
  341. for (i = PT_DIRECTORY_LEVEL;
  342. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  343. write_count = slot_largepage_idx(gfn, slot, i);
  344. *write_count += 1;
  345. }
  346. }
  347. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  348. {
  349. struct kvm_memory_slot *slot;
  350. int *write_count;
  351. int i;
  352. gfn = unalias_gfn(kvm, gfn);
  353. slot = gfn_to_memslot_unaliased(kvm, gfn);
  354. for (i = PT_DIRECTORY_LEVEL;
  355. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  356. write_count = slot_largepage_idx(gfn, slot, i);
  357. *write_count -= 1;
  358. WARN_ON(*write_count < 0);
  359. }
  360. }
  361. static int has_wrprotected_page(struct kvm *kvm,
  362. gfn_t gfn,
  363. int level)
  364. {
  365. struct kvm_memory_slot *slot;
  366. int *largepage_idx;
  367. gfn = unalias_gfn(kvm, gfn);
  368. slot = gfn_to_memslot_unaliased(kvm, gfn);
  369. if (slot) {
  370. largepage_idx = slot_largepage_idx(gfn, slot, level);
  371. return *largepage_idx;
  372. }
  373. return 1;
  374. }
  375. static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
  376. {
  377. unsigned long page_size;
  378. int i, ret = 0;
  379. page_size = kvm_host_page_size(kvm, gfn);
  380. for (i = PT_PAGE_TABLE_LEVEL;
  381. i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
  382. if (page_size >= KVM_HPAGE_SIZE(i))
  383. ret = i;
  384. else
  385. break;
  386. }
  387. return ret;
  388. }
  389. static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  390. {
  391. struct kvm_memory_slot *slot;
  392. int host_level, level, max_level;
  393. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  394. if (slot && slot->dirty_bitmap)
  395. return PT_PAGE_TABLE_LEVEL;
  396. host_level = host_mapping_level(vcpu->kvm, large_gfn);
  397. if (host_level == PT_PAGE_TABLE_LEVEL)
  398. return host_level;
  399. max_level = kvm_x86_ops->get_lpage_level() < host_level ?
  400. kvm_x86_ops->get_lpage_level() : host_level;
  401. for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
  402. if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
  403. break;
  404. return level - 1;
  405. }
  406. /*
  407. * Take gfn and return the reverse mapping to it.
  408. * Note: gfn must be unaliased before this function get called
  409. */
  410. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
  411. {
  412. struct kvm_memory_slot *slot;
  413. unsigned long idx;
  414. slot = gfn_to_memslot(kvm, gfn);
  415. if (likely(level == PT_PAGE_TABLE_LEVEL))
  416. return &slot->rmap[gfn - slot->base_gfn];
  417. idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
  418. (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
  419. return &slot->lpage_info[level - 2][idx].rmap_pde;
  420. }
  421. /*
  422. * Reverse mapping data structures:
  423. *
  424. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  425. * that points to page_address(page).
  426. *
  427. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  428. * containing more mappings.
  429. *
  430. * Returns the number of rmap entries before the spte was added or zero if
  431. * the spte was not added.
  432. *
  433. */
  434. static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  435. {
  436. struct kvm_mmu_page *sp;
  437. struct kvm_rmap_desc *desc;
  438. unsigned long *rmapp;
  439. int i, count = 0;
  440. if (!is_rmap_spte(*spte))
  441. return count;
  442. gfn = unalias_gfn(vcpu->kvm, gfn);
  443. sp = page_header(__pa(spte));
  444. sp->gfns[spte - sp->spt] = gfn;
  445. rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
  446. if (!*rmapp) {
  447. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  448. *rmapp = (unsigned long)spte;
  449. } else if (!(*rmapp & 1)) {
  450. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  451. desc = mmu_alloc_rmap_desc(vcpu);
  452. desc->sptes[0] = (u64 *)*rmapp;
  453. desc->sptes[1] = spte;
  454. *rmapp = (unsigned long)desc | 1;
  455. } else {
  456. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  457. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  458. while (desc->sptes[RMAP_EXT-1] && desc->more) {
  459. desc = desc->more;
  460. count += RMAP_EXT;
  461. }
  462. if (desc->sptes[RMAP_EXT-1]) {
  463. desc->more = mmu_alloc_rmap_desc(vcpu);
  464. desc = desc->more;
  465. }
  466. for (i = 0; desc->sptes[i]; ++i)
  467. ;
  468. desc->sptes[i] = spte;
  469. }
  470. return count;
  471. }
  472. static void rmap_desc_remove_entry(unsigned long *rmapp,
  473. struct kvm_rmap_desc *desc,
  474. int i,
  475. struct kvm_rmap_desc *prev_desc)
  476. {
  477. int j;
  478. for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
  479. ;
  480. desc->sptes[i] = desc->sptes[j];
  481. desc->sptes[j] = NULL;
  482. if (j != 0)
  483. return;
  484. if (!prev_desc && !desc->more)
  485. *rmapp = (unsigned long)desc->sptes[0];
  486. else
  487. if (prev_desc)
  488. prev_desc->more = desc->more;
  489. else
  490. *rmapp = (unsigned long)desc->more | 1;
  491. mmu_free_rmap_desc(desc);
  492. }
  493. static void rmap_remove(struct kvm *kvm, u64 *spte)
  494. {
  495. struct kvm_rmap_desc *desc;
  496. struct kvm_rmap_desc *prev_desc;
  497. struct kvm_mmu_page *sp;
  498. pfn_t pfn;
  499. unsigned long *rmapp;
  500. int i;
  501. if (!is_rmap_spte(*spte))
  502. return;
  503. sp = page_header(__pa(spte));
  504. pfn = spte_to_pfn(*spte);
  505. if (*spte & shadow_accessed_mask)
  506. kvm_set_pfn_accessed(pfn);
  507. if (is_writable_pte(*spte))
  508. kvm_set_pfn_dirty(pfn);
  509. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
  510. if (!*rmapp) {
  511. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  512. BUG();
  513. } else if (!(*rmapp & 1)) {
  514. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  515. if ((u64 *)*rmapp != spte) {
  516. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  517. spte, *spte);
  518. BUG();
  519. }
  520. *rmapp = 0;
  521. } else {
  522. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  523. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  524. prev_desc = NULL;
  525. while (desc) {
  526. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
  527. if (desc->sptes[i] == spte) {
  528. rmap_desc_remove_entry(rmapp,
  529. desc, i,
  530. prev_desc);
  531. return;
  532. }
  533. prev_desc = desc;
  534. desc = desc->more;
  535. }
  536. pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
  537. BUG();
  538. }
  539. }
  540. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  541. {
  542. struct kvm_rmap_desc *desc;
  543. u64 *prev_spte;
  544. int i;
  545. if (!*rmapp)
  546. return NULL;
  547. else if (!(*rmapp & 1)) {
  548. if (!spte)
  549. return (u64 *)*rmapp;
  550. return NULL;
  551. }
  552. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  553. prev_spte = NULL;
  554. while (desc) {
  555. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
  556. if (prev_spte == spte)
  557. return desc->sptes[i];
  558. prev_spte = desc->sptes[i];
  559. }
  560. desc = desc->more;
  561. }
  562. return NULL;
  563. }
  564. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  565. {
  566. unsigned long *rmapp;
  567. u64 *spte;
  568. int i, write_protected = 0;
  569. gfn = unalias_gfn(kvm, gfn);
  570. rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
  571. spte = rmap_next(kvm, rmapp, NULL);
  572. while (spte) {
  573. BUG_ON(!spte);
  574. BUG_ON(!(*spte & PT_PRESENT_MASK));
  575. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  576. if (is_writable_pte(*spte)) {
  577. __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
  578. write_protected = 1;
  579. }
  580. spte = rmap_next(kvm, rmapp, spte);
  581. }
  582. if (write_protected) {
  583. pfn_t pfn;
  584. spte = rmap_next(kvm, rmapp, NULL);
  585. pfn = spte_to_pfn(*spte);
  586. kvm_set_pfn_dirty(pfn);
  587. }
  588. /* check for huge page mappings */
  589. for (i = PT_DIRECTORY_LEVEL;
  590. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  591. rmapp = gfn_to_rmap(kvm, gfn, i);
  592. spte = rmap_next(kvm, rmapp, NULL);
  593. while (spte) {
  594. BUG_ON(!spte);
  595. BUG_ON(!(*spte & PT_PRESENT_MASK));
  596. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  597. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  598. if (is_writable_pte(*spte)) {
  599. rmap_remove(kvm, spte);
  600. --kvm->stat.lpages;
  601. __set_spte(spte, shadow_trap_nonpresent_pte);
  602. spte = NULL;
  603. write_protected = 1;
  604. }
  605. spte = rmap_next(kvm, rmapp, spte);
  606. }
  607. }
  608. return write_protected;
  609. }
  610. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
  611. unsigned long data)
  612. {
  613. u64 *spte;
  614. int need_tlb_flush = 0;
  615. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  616. BUG_ON(!(*spte & PT_PRESENT_MASK));
  617. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  618. rmap_remove(kvm, spte);
  619. __set_spte(spte, shadow_trap_nonpresent_pte);
  620. need_tlb_flush = 1;
  621. }
  622. return need_tlb_flush;
  623. }
  624. static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
  625. unsigned long data)
  626. {
  627. int need_flush = 0;
  628. u64 *spte, new_spte;
  629. pte_t *ptep = (pte_t *)data;
  630. pfn_t new_pfn;
  631. WARN_ON(pte_huge(*ptep));
  632. new_pfn = pte_pfn(*ptep);
  633. spte = rmap_next(kvm, rmapp, NULL);
  634. while (spte) {
  635. BUG_ON(!is_shadow_present_pte(*spte));
  636. rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
  637. need_flush = 1;
  638. if (pte_write(*ptep)) {
  639. rmap_remove(kvm, spte);
  640. __set_spte(spte, shadow_trap_nonpresent_pte);
  641. spte = rmap_next(kvm, rmapp, NULL);
  642. } else {
  643. new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
  644. new_spte |= (u64)new_pfn << PAGE_SHIFT;
  645. new_spte &= ~PT_WRITABLE_MASK;
  646. new_spte &= ~SPTE_HOST_WRITEABLE;
  647. if (is_writable_pte(*spte))
  648. kvm_set_pfn_dirty(spte_to_pfn(*spte));
  649. __set_spte(spte, new_spte);
  650. spte = rmap_next(kvm, rmapp, spte);
  651. }
  652. }
  653. if (need_flush)
  654. kvm_flush_remote_tlbs(kvm);
  655. return 0;
  656. }
  657. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  658. unsigned long data,
  659. int (*handler)(struct kvm *kvm, unsigned long *rmapp,
  660. unsigned long data))
  661. {
  662. int i, j;
  663. int ret;
  664. int retval = 0;
  665. struct kvm_memslots *slots;
  666. slots = kvm_memslots(kvm);
  667. for (i = 0; i < slots->nmemslots; i++) {
  668. struct kvm_memory_slot *memslot = &slots->memslots[i];
  669. unsigned long start = memslot->userspace_addr;
  670. unsigned long end;
  671. end = start + (memslot->npages << PAGE_SHIFT);
  672. if (hva >= start && hva < end) {
  673. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  674. ret = handler(kvm, &memslot->rmap[gfn_offset], data);
  675. for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
  676. int idx = gfn_offset;
  677. idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
  678. ret |= handler(kvm,
  679. &memslot->lpage_info[j][idx].rmap_pde,
  680. data);
  681. }
  682. trace_kvm_age_page(hva, memslot, ret);
  683. retval |= ret;
  684. }
  685. }
  686. return retval;
  687. }
  688. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  689. {
  690. return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
  691. }
  692. void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
  693. {
  694. kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
  695. }
  696. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
  697. unsigned long data)
  698. {
  699. u64 *spte;
  700. int young = 0;
  701. /*
  702. * Emulate the accessed bit for EPT, by checking if this page has
  703. * an EPT mapping, and clearing it if it does. On the next access,
  704. * a new EPT mapping will be established.
  705. * This has some overhead, but not as much as the cost of swapping
  706. * out actively used pages or breaking up actively used hugepages.
  707. */
  708. if (!shadow_accessed_mask)
  709. return kvm_unmap_rmapp(kvm, rmapp, data);
  710. spte = rmap_next(kvm, rmapp, NULL);
  711. while (spte) {
  712. int _young;
  713. u64 _spte = *spte;
  714. BUG_ON(!(_spte & PT_PRESENT_MASK));
  715. _young = _spte & PT_ACCESSED_MASK;
  716. if (_young) {
  717. young = 1;
  718. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  719. }
  720. spte = rmap_next(kvm, rmapp, spte);
  721. }
  722. return young;
  723. }
  724. #define RMAP_RECYCLE_THRESHOLD 1000
  725. static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  726. {
  727. unsigned long *rmapp;
  728. struct kvm_mmu_page *sp;
  729. sp = page_header(__pa(spte));
  730. gfn = unalias_gfn(vcpu->kvm, gfn);
  731. rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
  732. kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
  733. kvm_flush_remote_tlbs(vcpu->kvm);
  734. }
  735. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  736. {
  737. return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
  738. }
  739. #ifdef MMU_DEBUG
  740. static int is_empty_shadow_page(u64 *spt)
  741. {
  742. u64 *pos;
  743. u64 *end;
  744. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  745. if (is_shadow_present_pte(*pos)) {
  746. printk(KERN_ERR "%s: %p %llx\n", __func__,
  747. pos, *pos);
  748. return 0;
  749. }
  750. return 1;
  751. }
  752. #endif
  753. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  754. {
  755. ASSERT(is_empty_shadow_page(sp->spt));
  756. list_del(&sp->link);
  757. __free_page(virt_to_page(sp->spt));
  758. __free_page(virt_to_page(sp->gfns));
  759. kfree(sp);
  760. ++kvm->arch.n_free_mmu_pages;
  761. }
  762. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  763. {
  764. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  765. }
  766. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  767. u64 *parent_pte)
  768. {
  769. struct kvm_mmu_page *sp;
  770. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  771. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  772. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  773. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  774. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  775. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  776. sp->multimapped = 0;
  777. sp->parent_pte = parent_pte;
  778. --vcpu->kvm->arch.n_free_mmu_pages;
  779. return sp;
  780. }
  781. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  782. struct kvm_mmu_page *sp, u64 *parent_pte)
  783. {
  784. struct kvm_pte_chain *pte_chain;
  785. struct hlist_node *node;
  786. int i;
  787. if (!parent_pte)
  788. return;
  789. if (!sp->multimapped) {
  790. u64 *old = sp->parent_pte;
  791. if (!old) {
  792. sp->parent_pte = parent_pte;
  793. return;
  794. }
  795. sp->multimapped = 1;
  796. pte_chain = mmu_alloc_pte_chain(vcpu);
  797. INIT_HLIST_HEAD(&sp->parent_ptes);
  798. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  799. pte_chain->parent_ptes[0] = old;
  800. }
  801. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  802. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  803. continue;
  804. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  805. if (!pte_chain->parent_ptes[i]) {
  806. pte_chain->parent_ptes[i] = parent_pte;
  807. return;
  808. }
  809. }
  810. pte_chain = mmu_alloc_pte_chain(vcpu);
  811. BUG_ON(!pte_chain);
  812. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  813. pte_chain->parent_ptes[0] = parent_pte;
  814. }
  815. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  816. u64 *parent_pte)
  817. {
  818. struct kvm_pte_chain *pte_chain;
  819. struct hlist_node *node;
  820. int i;
  821. if (!sp->multimapped) {
  822. BUG_ON(sp->parent_pte != parent_pte);
  823. sp->parent_pte = NULL;
  824. return;
  825. }
  826. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  827. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  828. if (!pte_chain->parent_ptes[i])
  829. break;
  830. if (pte_chain->parent_ptes[i] != parent_pte)
  831. continue;
  832. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  833. && pte_chain->parent_ptes[i + 1]) {
  834. pte_chain->parent_ptes[i]
  835. = pte_chain->parent_ptes[i + 1];
  836. ++i;
  837. }
  838. pte_chain->parent_ptes[i] = NULL;
  839. if (i == 0) {
  840. hlist_del(&pte_chain->link);
  841. mmu_free_pte_chain(pte_chain);
  842. if (hlist_empty(&sp->parent_ptes)) {
  843. sp->multimapped = 0;
  844. sp->parent_pte = NULL;
  845. }
  846. }
  847. return;
  848. }
  849. BUG();
  850. }
  851. static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
  852. {
  853. struct kvm_pte_chain *pte_chain;
  854. struct hlist_node *node;
  855. struct kvm_mmu_page *parent_sp;
  856. int i;
  857. if (!sp->multimapped && sp->parent_pte) {
  858. parent_sp = page_header(__pa(sp->parent_pte));
  859. fn(parent_sp);
  860. mmu_parent_walk(parent_sp, fn);
  861. return;
  862. }
  863. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  864. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  865. if (!pte_chain->parent_ptes[i])
  866. break;
  867. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  868. fn(parent_sp);
  869. mmu_parent_walk(parent_sp, fn);
  870. }
  871. }
  872. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  873. {
  874. unsigned int index;
  875. struct kvm_mmu_page *sp = page_header(__pa(spte));
  876. index = spte - sp->spt;
  877. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  878. sp->unsync_children++;
  879. WARN_ON(!sp->unsync_children);
  880. }
  881. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  882. {
  883. struct kvm_pte_chain *pte_chain;
  884. struct hlist_node *node;
  885. int i;
  886. if (!sp->parent_pte)
  887. return;
  888. if (!sp->multimapped) {
  889. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  890. return;
  891. }
  892. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  893. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  894. if (!pte_chain->parent_ptes[i])
  895. break;
  896. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  897. }
  898. }
  899. static int unsync_walk_fn(struct kvm_mmu_page *sp)
  900. {
  901. kvm_mmu_update_parents_unsync(sp);
  902. return 1;
  903. }
  904. static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
  905. {
  906. mmu_parent_walk(sp, unsync_walk_fn);
  907. kvm_mmu_update_parents_unsync(sp);
  908. }
  909. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  910. struct kvm_mmu_page *sp)
  911. {
  912. int i;
  913. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  914. sp->spt[i] = shadow_trap_nonpresent_pte;
  915. }
  916. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  917. struct kvm_mmu_page *sp)
  918. {
  919. return 1;
  920. }
  921. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  922. {
  923. }
  924. #define KVM_PAGE_ARRAY_NR 16
  925. struct kvm_mmu_pages {
  926. struct mmu_page_and_offset {
  927. struct kvm_mmu_page *sp;
  928. unsigned int idx;
  929. } page[KVM_PAGE_ARRAY_NR];
  930. unsigned int nr;
  931. };
  932. #define for_each_unsync_children(bitmap, idx) \
  933. for (idx = find_first_bit(bitmap, 512); \
  934. idx < 512; \
  935. idx = find_next_bit(bitmap, 512, idx+1))
  936. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  937. int idx)
  938. {
  939. int i;
  940. if (sp->unsync)
  941. for (i=0; i < pvec->nr; i++)
  942. if (pvec->page[i].sp == sp)
  943. return 0;
  944. pvec->page[pvec->nr].sp = sp;
  945. pvec->page[pvec->nr].idx = idx;
  946. pvec->nr++;
  947. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  948. }
  949. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  950. struct kvm_mmu_pages *pvec)
  951. {
  952. int i, ret, nr_unsync_leaf = 0;
  953. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  954. u64 ent = sp->spt[i];
  955. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  956. struct kvm_mmu_page *child;
  957. child = page_header(ent & PT64_BASE_ADDR_MASK);
  958. if (child->unsync_children) {
  959. if (mmu_pages_add(pvec, child, i))
  960. return -ENOSPC;
  961. ret = __mmu_unsync_walk(child, pvec);
  962. if (!ret)
  963. __clear_bit(i, sp->unsync_child_bitmap);
  964. else if (ret > 0)
  965. nr_unsync_leaf += ret;
  966. else
  967. return ret;
  968. }
  969. if (child->unsync) {
  970. nr_unsync_leaf++;
  971. if (mmu_pages_add(pvec, child, i))
  972. return -ENOSPC;
  973. }
  974. }
  975. }
  976. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  977. sp->unsync_children = 0;
  978. return nr_unsync_leaf;
  979. }
  980. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  981. struct kvm_mmu_pages *pvec)
  982. {
  983. if (!sp->unsync_children)
  984. return 0;
  985. mmu_pages_add(pvec, sp, 0);
  986. return __mmu_unsync_walk(sp, pvec);
  987. }
  988. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  989. {
  990. unsigned index;
  991. struct hlist_head *bucket;
  992. struct kvm_mmu_page *sp;
  993. struct hlist_node *node;
  994. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  995. index = kvm_page_table_hashfn(gfn);
  996. bucket = &kvm->arch.mmu_page_hash[index];
  997. hlist_for_each_entry(sp, node, bucket, hash_link)
  998. if (sp->gfn == gfn && !sp->role.direct
  999. && !sp->role.invalid) {
  1000. pgprintk("%s: found role %x\n",
  1001. __func__, sp->role.word);
  1002. return sp;
  1003. }
  1004. return NULL;
  1005. }
  1006. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1007. {
  1008. WARN_ON(!sp->unsync);
  1009. trace_kvm_mmu_sync_page(sp);
  1010. sp->unsync = 0;
  1011. --kvm->stat.mmu_unsync;
  1012. }
  1013. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  1014. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1015. {
  1016. if (sp->role.cr4_pae != !!is_pae(vcpu)) {
  1017. kvm_mmu_zap_page(vcpu->kvm, sp);
  1018. return 1;
  1019. }
  1020. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  1021. kvm_flush_remote_tlbs(vcpu->kvm);
  1022. kvm_unlink_unsync_page(vcpu->kvm, sp);
  1023. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  1024. kvm_mmu_zap_page(vcpu->kvm, sp);
  1025. return 1;
  1026. }
  1027. kvm_mmu_flush_tlb(vcpu);
  1028. return 0;
  1029. }
  1030. struct mmu_page_path {
  1031. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  1032. unsigned int idx[PT64_ROOT_LEVEL-1];
  1033. };
  1034. #define for_each_sp(pvec, sp, parents, i) \
  1035. for (i = mmu_pages_next(&pvec, &parents, -1), \
  1036. sp = pvec.page[i].sp; \
  1037. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  1038. i = mmu_pages_next(&pvec, &parents, i))
  1039. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  1040. struct mmu_page_path *parents,
  1041. int i)
  1042. {
  1043. int n;
  1044. for (n = i+1; n < pvec->nr; n++) {
  1045. struct kvm_mmu_page *sp = pvec->page[n].sp;
  1046. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1047. parents->idx[0] = pvec->page[n].idx;
  1048. return n;
  1049. }
  1050. parents->parent[sp->role.level-2] = sp;
  1051. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  1052. }
  1053. return n;
  1054. }
  1055. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  1056. {
  1057. struct kvm_mmu_page *sp;
  1058. unsigned int level = 0;
  1059. do {
  1060. unsigned int idx = parents->idx[level];
  1061. sp = parents->parent[level];
  1062. if (!sp)
  1063. return;
  1064. --sp->unsync_children;
  1065. WARN_ON((int)sp->unsync_children < 0);
  1066. __clear_bit(idx, sp->unsync_child_bitmap);
  1067. level++;
  1068. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  1069. }
  1070. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  1071. struct mmu_page_path *parents,
  1072. struct kvm_mmu_pages *pvec)
  1073. {
  1074. parents->parent[parent->role.level-1] = NULL;
  1075. pvec->nr = 0;
  1076. }
  1077. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  1078. struct kvm_mmu_page *parent)
  1079. {
  1080. int i;
  1081. struct kvm_mmu_page *sp;
  1082. struct mmu_page_path parents;
  1083. struct kvm_mmu_pages pages;
  1084. kvm_mmu_pages_init(parent, &parents, &pages);
  1085. while (mmu_unsync_walk(parent, &pages)) {
  1086. int protected = 0;
  1087. for_each_sp(pages, sp, parents, i)
  1088. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1089. if (protected)
  1090. kvm_flush_remote_tlbs(vcpu->kvm);
  1091. for_each_sp(pages, sp, parents, i) {
  1092. kvm_sync_page(vcpu, sp);
  1093. mmu_pages_clear_parents(&parents);
  1094. }
  1095. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1096. kvm_mmu_pages_init(parent, &parents, &pages);
  1097. }
  1098. }
  1099. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1100. gfn_t gfn,
  1101. gva_t gaddr,
  1102. unsigned level,
  1103. int direct,
  1104. unsigned access,
  1105. u64 *parent_pte)
  1106. {
  1107. union kvm_mmu_page_role role;
  1108. unsigned index;
  1109. unsigned quadrant;
  1110. struct hlist_head *bucket;
  1111. struct kvm_mmu_page *sp;
  1112. struct hlist_node *node, *tmp;
  1113. role = vcpu->arch.mmu.base_role;
  1114. role.level = level;
  1115. role.direct = direct;
  1116. if (role.direct)
  1117. role.cr4_pae = 0;
  1118. role.access = access;
  1119. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1120. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1121. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1122. role.quadrant = quadrant;
  1123. }
  1124. index = kvm_page_table_hashfn(gfn);
  1125. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1126. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1127. if (sp->gfn == gfn) {
  1128. if (sp->unsync)
  1129. if (kvm_sync_page(vcpu, sp))
  1130. continue;
  1131. if (sp->role.word != role.word)
  1132. continue;
  1133. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1134. if (sp->unsync_children) {
  1135. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1136. kvm_mmu_mark_parents_unsync(sp);
  1137. }
  1138. trace_kvm_mmu_get_page(sp, false);
  1139. return sp;
  1140. }
  1141. ++vcpu->kvm->stat.mmu_cache_miss;
  1142. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1143. if (!sp)
  1144. return sp;
  1145. sp->gfn = gfn;
  1146. sp->role = role;
  1147. hlist_add_head(&sp->hash_link, bucket);
  1148. if (!direct) {
  1149. if (rmap_write_protect(vcpu->kvm, gfn))
  1150. kvm_flush_remote_tlbs(vcpu->kvm);
  1151. account_shadowed(vcpu->kvm, gfn);
  1152. }
  1153. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1154. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1155. else
  1156. nonpaging_prefetch_page(vcpu, sp);
  1157. trace_kvm_mmu_get_page(sp, true);
  1158. return sp;
  1159. }
  1160. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1161. struct kvm_vcpu *vcpu, u64 addr)
  1162. {
  1163. iterator->addr = addr;
  1164. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1165. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1166. if (iterator->level == PT32E_ROOT_LEVEL) {
  1167. iterator->shadow_addr
  1168. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1169. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1170. --iterator->level;
  1171. if (!iterator->shadow_addr)
  1172. iterator->level = 0;
  1173. }
  1174. }
  1175. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1176. {
  1177. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1178. return false;
  1179. if (iterator->level == PT_PAGE_TABLE_LEVEL)
  1180. if (is_large_pte(*iterator->sptep))
  1181. return false;
  1182. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1183. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1184. return true;
  1185. }
  1186. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1187. {
  1188. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1189. --iterator->level;
  1190. }
  1191. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1192. struct kvm_mmu_page *sp)
  1193. {
  1194. unsigned i;
  1195. u64 *pt;
  1196. u64 ent;
  1197. pt = sp->spt;
  1198. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1199. ent = pt[i];
  1200. if (is_shadow_present_pte(ent)) {
  1201. if (!is_last_spte(ent, sp->role.level)) {
  1202. ent &= PT64_BASE_ADDR_MASK;
  1203. mmu_page_remove_parent_pte(page_header(ent),
  1204. &pt[i]);
  1205. } else {
  1206. if (is_large_pte(ent))
  1207. --kvm->stat.lpages;
  1208. rmap_remove(kvm, &pt[i]);
  1209. }
  1210. }
  1211. pt[i] = shadow_trap_nonpresent_pte;
  1212. }
  1213. }
  1214. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1215. {
  1216. mmu_page_remove_parent_pte(sp, parent_pte);
  1217. }
  1218. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1219. {
  1220. int i;
  1221. struct kvm_vcpu *vcpu;
  1222. kvm_for_each_vcpu(i, vcpu, kvm)
  1223. vcpu->arch.last_pte_updated = NULL;
  1224. }
  1225. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1226. {
  1227. u64 *parent_pte;
  1228. while (sp->multimapped || sp->parent_pte) {
  1229. if (!sp->multimapped)
  1230. parent_pte = sp->parent_pte;
  1231. else {
  1232. struct kvm_pte_chain *chain;
  1233. chain = container_of(sp->parent_ptes.first,
  1234. struct kvm_pte_chain, link);
  1235. parent_pte = chain->parent_ptes[0];
  1236. }
  1237. BUG_ON(!parent_pte);
  1238. kvm_mmu_put_page(sp, parent_pte);
  1239. __set_spte(parent_pte, shadow_trap_nonpresent_pte);
  1240. }
  1241. }
  1242. static int mmu_zap_unsync_children(struct kvm *kvm,
  1243. struct kvm_mmu_page *parent)
  1244. {
  1245. int i, zapped = 0;
  1246. struct mmu_page_path parents;
  1247. struct kvm_mmu_pages pages;
  1248. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1249. return 0;
  1250. kvm_mmu_pages_init(parent, &parents, &pages);
  1251. while (mmu_unsync_walk(parent, &pages)) {
  1252. struct kvm_mmu_page *sp;
  1253. for_each_sp(pages, sp, parents, i) {
  1254. kvm_mmu_zap_page(kvm, sp);
  1255. mmu_pages_clear_parents(&parents);
  1256. zapped++;
  1257. }
  1258. kvm_mmu_pages_init(parent, &parents, &pages);
  1259. }
  1260. return zapped;
  1261. }
  1262. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1263. {
  1264. int ret;
  1265. trace_kvm_mmu_zap_page(sp);
  1266. ++kvm->stat.mmu_shadow_zapped;
  1267. ret = mmu_zap_unsync_children(kvm, sp);
  1268. kvm_mmu_page_unlink_children(kvm, sp);
  1269. kvm_mmu_unlink_parents(kvm, sp);
  1270. kvm_flush_remote_tlbs(kvm);
  1271. if (!sp->role.invalid && !sp->role.direct)
  1272. unaccount_shadowed(kvm, sp->gfn);
  1273. if (sp->unsync)
  1274. kvm_unlink_unsync_page(kvm, sp);
  1275. if (!sp->root_count) {
  1276. hlist_del(&sp->hash_link);
  1277. kvm_mmu_free_page(kvm, sp);
  1278. } else {
  1279. sp->role.invalid = 1;
  1280. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1281. kvm_reload_remote_mmus(kvm);
  1282. }
  1283. kvm_mmu_reset_last_pte_updated(kvm);
  1284. return ret;
  1285. }
  1286. /*
  1287. * Changing the number of mmu pages allocated to the vm
  1288. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1289. */
  1290. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1291. {
  1292. int used_pages;
  1293. used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
  1294. used_pages = max(0, used_pages);
  1295. /*
  1296. * If we set the number of mmu pages to be smaller be than the
  1297. * number of actived pages , we must to free some mmu pages before we
  1298. * change the value
  1299. */
  1300. if (used_pages > kvm_nr_mmu_pages) {
  1301. while (used_pages > kvm_nr_mmu_pages &&
  1302. !list_empty(&kvm->arch.active_mmu_pages)) {
  1303. struct kvm_mmu_page *page;
  1304. page = container_of(kvm->arch.active_mmu_pages.prev,
  1305. struct kvm_mmu_page, link);
  1306. used_pages -= kvm_mmu_zap_page(kvm, page);
  1307. used_pages--;
  1308. }
  1309. kvm_nr_mmu_pages = used_pages;
  1310. kvm->arch.n_free_mmu_pages = 0;
  1311. }
  1312. else
  1313. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1314. - kvm->arch.n_alloc_mmu_pages;
  1315. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1316. }
  1317. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1318. {
  1319. unsigned index;
  1320. struct hlist_head *bucket;
  1321. struct kvm_mmu_page *sp;
  1322. struct hlist_node *node, *n;
  1323. int r;
  1324. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1325. r = 0;
  1326. index = kvm_page_table_hashfn(gfn);
  1327. bucket = &kvm->arch.mmu_page_hash[index];
  1328. restart:
  1329. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1330. if (sp->gfn == gfn && !sp->role.direct) {
  1331. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1332. sp->role.word);
  1333. r = 1;
  1334. if (kvm_mmu_zap_page(kvm, sp))
  1335. goto restart;
  1336. }
  1337. return r;
  1338. }
  1339. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1340. {
  1341. unsigned index;
  1342. struct hlist_head *bucket;
  1343. struct kvm_mmu_page *sp;
  1344. struct hlist_node *node, *nn;
  1345. index = kvm_page_table_hashfn(gfn);
  1346. bucket = &kvm->arch.mmu_page_hash[index];
  1347. restart:
  1348. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1349. if (sp->gfn == gfn && !sp->role.direct
  1350. && !sp->role.invalid) {
  1351. pgprintk("%s: zap %lx %x\n",
  1352. __func__, gfn, sp->role.word);
  1353. if (kvm_mmu_zap_page(kvm, sp))
  1354. goto restart;
  1355. }
  1356. }
  1357. }
  1358. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1359. {
  1360. int slot = memslot_id(kvm, gfn);
  1361. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1362. __set_bit(slot, sp->slot_bitmap);
  1363. }
  1364. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1365. {
  1366. int i;
  1367. u64 *pt = sp->spt;
  1368. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1369. return;
  1370. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1371. if (pt[i] == shadow_notrap_nonpresent_pte)
  1372. __set_spte(&pt[i], shadow_trap_nonpresent_pte);
  1373. }
  1374. }
  1375. /*
  1376. * The function is based on mtrr_type_lookup() in
  1377. * arch/x86/kernel/cpu/mtrr/generic.c
  1378. */
  1379. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1380. u64 start, u64 end)
  1381. {
  1382. int i;
  1383. u64 base, mask;
  1384. u8 prev_match, curr_match;
  1385. int num_var_ranges = KVM_NR_VAR_MTRR;
  1386. if (!mtrr_state->enabled)
  1387. return 0xFF;
  1388. /* Make end inclusive end, instead of exclusive */
  1389. end--;
  1390. /* Look in fixed ranges. Just return the type as per start */
  1391. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1392. int idx;
  1393. if (start < 0x80000) {
  1394. idx = 0;
  1395. idx += (start >> 16);
  1396. return mtrr_state->fixed_ranges[idx];
  1397. } else if (start < 0xC0000) {
  1398. idx = 1 * 8;
  1399. idx += ((start - 0x80000) >> 14);
  1400. return mtrr_state->fixed_ranges[idx];
  1401. } else if (start < 0x1000000) {
  1402. idx = 3 * 8;
  1403. idx += ((start - 0xC0000) >> 12);
  1404. return mtrr_state->fixed_ranges[idx];
  1405. }
  1406. }
  1407. /*
  1408. * Look in variable ranges
  1409. * Look of multiple ranges matching this address and pick type
  1410. * as per MTRR precedence
  1411. */
  1412. if (!(mtrr_state->enabled & 2))
  1413. return mtrr_state->def_type;
  1414. prev_match = 0xFF;
  1415. for (i = 0; i < num_var_ranges; ++i) {
  1416. unsigned short start_state, end_state;
  1417. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1418. continue;
  1419. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1420. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1421. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1422. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1423. start_state = ((start & mask) == (base & mask));
  1424. end_state = ((end & mask) == (base & mask));
  1425. if (start_state != end_state)
  1426. return 0xFE;
  1427. if ((start & mask) != (base & mask))
  1428. continue;
  1429. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1430. if (prev_match == 0xFF) {
  1431. prev_match = curr_match;
  1432. continue;
  1433. }
  1434. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1435. curr_match == MTRR_TYPE_UNCACHABLE)
  1436. return MTRR_TYPE_UNCACHABLE;
  1437. if ((prev_match == MTRR_TYPE_WRBACK &&
  1438. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1439. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1440. curr_match == MTRR_TYPE_WRBACK)) {
  1441. prev_match = MTRR_TYPE_WRTHROUGH;
  1442. curr_match = MTRR_TYPE_WRTHROUGH;
  1443. }
  1444. if (prev_match != curr_match)
  1445. return MTRR_TYPE_UNCACHABLE;
  1446. }
  1447. if (prev_match != 0xFF)
  1448. return prev_match;
  1449. return mtrr_state->def_type;
  1450. }
  1451. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1452. {
  1453. u8 mtrr;
  1454. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1455. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1456. if (mtrr == 0xfe || mtrr == 0xff)
  1457. mtrr = MTRR_TYPE_WRBACK;
  1458. return mtrr;
  1459. }
  1460. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1461. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1462. {
  1463. unsigned index;
  1464. struct hlist_head *bucket;
  1465. struct kvm_mmu_page *s;
  1466. struct hlist_node *node, *n;
  1467. index = kvm_page_table_hashfn(sp->gfn);
  1468. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1469. /* don't unsync if pagetable is shadowed with multiple roles */
  1470. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1471. if (s->gfn != sp->gfn || s->role.direct)
  1472. continue;
  1473. if (s->role.word != sp->role.word)
  1474. return 1;
  1475. }
  1476. trace_kvm_mmu_unsync_page(sp);
  1477. ++vcpu->kvm->stat.mmu_unsync;
  1478. sp->unsync = 1;
  1479. kvm_mmu_mark_parents_unsync(sp);
  1480. mmu_convert_notrap(sp);
  1481. return 0;
  1482. }
  1483. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1484. bool can_unsync)
  1485. {
  1486. struct kvm_mmu_page *shadow;
  1487. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1488. if (shadow) {
  1489. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1490. return 1;
  1491. if (shadow->unsync)
  1492. return 0;
  1493. if (can_unsync && oos_shadow)
  1494. return kvm_unsync_page(vcpu, shadow);
  1495. return 1;
  1496. }
  1497. return 0;
  1498. }
  1499. static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1500. unsigned pte_access, int user_fault,
  1501. int write_fault, int dirty, int level,
  1502. gfn_t gfn, pfn_t pfn, bool speculative,
  1503. bool can_unsync, bool reset_host_protection)
  1504. {
  1505. u64 spte;
  1506. int ret = 0;
  1507. /*
  1508. * We don't set the accessed bit, since we sometimes want to see
  1509. * whether the guest actually used the pte (in order to detect
  1510. * demand paging).
  1511. */
  1512. spte = shadow_base_present_pte | shadow_dirty_mask;
  1513. if (!speculative)
  1514. spte |= shadow_accessed_mask;
  1515. if (!dirty)
  1516. pte_access &= ~ACC_WRITE_MASK;
  1517. if (pte_access & ACC_EXEC_MASK)
  1518. spte |= shadow_x_mask;
  1519. else
  1520. spte |= shadow_nx_mask;
  1521. if (pte_access & ACC_USER_MASK)
  1522. spte |= shadow_user_mask;
  1523. if (level > PT_PAGE_TABLE_LEVEL)
  1524. spte |= PT_PAGE_SIZE_MASK;
  1525. if (tdp_enabled)
  1526. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1527. kvm_is_mmio_pfn(pfn));
  1528. if (reset_host_protection)
  1529. spte |= SPTE_HOST_WRITEABLE;
  1530. spte |= (u64)pfn << PAGE_SHIFT;
  1531. if ((pte_access & ACC_WRITE_MASK)
  1532. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1533. if (level > PT_PAGE_TABLE_LEVEL &&
  1534. has_wrprotected_page(vcpu->kvm, gfn, level)) {
  1535. ret = 1;
  1536. spte = shadow_trap_nonpresent_pte;
  1537. goto set_pte;
  1538. }
  1539. spte |= PT_WRITABLE_MASK;
  1540. /*
  1541. * Optimization: for pte sync, if spte was writable the hash
  1542. * lookup is unnecessary (and expensive). Write protection
  1543. * is responsibility of mmu_get_page / kvm_sync_page.
  1544. * Same reasoning can be applied to dirty page accounting.
  1545. */
  1546. if (!can_unsync && is_writable_pte(*sptep))
  1547. goto set_pte;
  1548. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1549. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1550. __func__, gfn);
  1551. ret = 1;
  1552. pte_access &= ~ACC_WRITE_MASK;
  1553. if (is_writable_pte(spte))
  1554. spte &= ~PT_WRITABLE_MASK;
  1555. }
  1556. }
  1557. if (pte_access & ACC_WRITE_MASK)
  1558. mark_page_dirty(vcpu->kvm, gfn);
  1559. set_pte:
  1560. __set_spte(sptep, spte);
  1561. return ret;
  1562. }
  1563. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1564. unsigned pt_access, unsigned pte_access,
  1565. int user_fault, int write_fault, int dirty,
  1566. int *ptwrite, int level, gfn_t gfn,
  1567. pfn_t pfn, bool speculative,
  1568. bool reset_host_protection)
  1569. {
  1570. int was_rmapped = 0;
  1571. int was_writable = is_writable_pte(*sptep);
  1572. int rmap_count;
  1573. pgprintk("%s: spte %llx access %x write_fault %d"
  1574. " user_fault %d gfn %lx\n",
  1575. __func__, *sptep, pt_access,
  1576. write_fault, user_fault, gfn);
  1577. if (is_rmap_spte(*sptep)) {
  1578. /*
  1579. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1580. * the parent of the now unreachable PTE.
  1581. */
  1582. if (level > PT_PAGE_TABLE_LEVEL &&
  1583. !is_large_pte(*sptep)) {
  1584. struct kvm_mmu_page *child;
  1585. u64 pte = *sptep;
  1586. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1587. mmu_page_remove_parent_pte(child, sptep);
  1588. } else if (pfn != spte_to_pfn(*sptep)) {
  1589. pgprintk("hfn old %lx new %lx\n",
  1590. spte_to_pfn(*sptep), pfn);
  1591. rmap_remove(vcpu->kvm, sptep);
  1592. } else
  1593. was_rmapped = 1;
  1594. }
  1595. if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
  1596. dirty, level, gfn, pfn, speculative, true,
  1597. reset_host_protection)) {
  1598. if (write_fault)
  1599. *ptwrite = 1;
  1600. kvm_x86_ops->tlb_flush(vcpu);
  1601. }
  1602. pgprintk("%s: setting spte %llx\n", __func__, *sptep);
  1603. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1604. is_large_pte(*sptep)? "2MB" : "4kB",
  1605. *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
  1606. *sptep, sptep);
  1607. if (!was_rmapped && is_large_pte(*sptep))
  1608. ++vcpu->kvm->stat.lpages;
  1609. page_header_update_slot(vcpu->kvm, sptep, gfn);
  1610. if (!was_rmapped) {
  1611. rmap_count = rmap_add(vcpu, sptep, gfn);
  1612. kvm_release_pfn_clean(pfn);
  1613. if (rmap_count > RMAP_RECYCLE_THRESHOLD)
  1614. rmap_recycle(vcpu, sptep, gfn);
  1615. } else {
  1616. if (was_writable)
  1617. kvm_release_pfn_dirty(pfn);
  1618. else
  1619. kvm_release_pfn_clean(pfn);
  1620. }
  1621. if (speculative) {
  1622. vcpu->arch.last_pte_updated = sptep;
  1623. vcpu->arch.last_pte_gfn = gfn;
  1624. }
  1625. }
  1626. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1627. {
  1628. }
  1629. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1630. int level, gfn_t gfn, pfn_t pfn)
  1631. {
  1632. struct kvm_shadow_walk_iterator iterator;
  1633. struct kvm_mmu_page *sp;
  1634. int pt_write = 0;
  1635. gfn_t pseudo_gfn;
  1636. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1637. if (iterator.level == level) {
  1638. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1639. 0, write, 1, &pt_write,
  1640. level, gfn, pfn, false, true);
  1641. ++vcpu->stat.pf_fixed;
  1642. break;
  1643. }
  1644. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1645. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1646. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1647. iterator.level - 1,
  1648. 1, ACC_ALL, iterator.sptep);
  1649. if (!sp) {
  1650. pgprintk("nonpaging_map: ENOMEM\n");
  1651. kvm_release_pfn_clean(pfn);
  1652. return -ENOMEM;
  1653. }
  1654. __set_spte(iterator.sptep,
  1655. __pa(sp->spt)
  1656. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1657. | shadow_user_mask | shadow_x_mask);
  1658. }
  1659. }
  1660. return pt_write;
  1661. }
  1662. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1663. {
  1664. int r;
  1665. int level;
  1666. pfn_t pfn;
  1667. unsigned long mmu_seq;
  1668. level = mapping_level(vcpu, gfn);
  1669. /*
  1670. * This path builds a PAE pagetable - so we can map 2mb pages at
  1671. * maximum. Therefore check if the level is larger than that.
  1672. */
  1673. if (level > PT_DIRECTORY_LEVEL)
  1674. level = PT_DIRECTORY_LEVEL;
  1675. gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
  1676. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1677. smp_rmb();
  1678. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1679. /* mmio */
  1680. if (is_error_pfn(pfn)) {
  1681. kvm_release_pfn_clean(pfn);
  1682. return 1;
  1683. }
  1684. spin_lock(&vcpu->kvm->mmu_lock);
  1685. if (mmu_notifier_retry(vcpu, mmu_seq))
  1686. goto out_unlock;
  1687. kvm_mmu_free_some_pages(vcpu);
  1688. r = __direct_map(vcpu, v, write, level, gfn, pfn);
  1689. spin_unlock(&vcpu->kvm->mmu_lock);
  1690. return r;
  1691. out_unlock:
  1692. spin_unlock(&vcpu->kvm->mmu_lock);
  1693. kvm_release_pfn_clean(pfn);
  1694. return 0;
  1695. }
  1696. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1697. {
  1698. int i;
  1699. struct kvm_mmu_page *sp;
  1700. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1701. return;
  1702. spin_lock(&vcpu->kvm->mmu_lock);
  1703. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1704. hpa_t root = vcpu->arch.mmu.root_hpa;
  1705. sp = page_header(root);
  1706. --sp->root_count;
  1707. if (!sp->root_count && sp->role.invalid)
  1708. kvm_mmu_zap_page(vcpu->kvm, sp);
  1709. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1710. spin_unlock(&vcpu->kvm->mmu_lock);
  1711. return;
  1712. }
  1713. for (i = 0; i < 4; ++i) {
  1714. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1715. if (root) {
  1716. root &= PT64_BASE_ADDR_MASK;
  1717. sp = page_header(root);
  1718. --sp->root_count;
  1719. if (!sp->root_count && sp->role.invalid)
  1720. kvm_mmu_zap_page(vcpu->kvm, sp);
  1721. }
  1722. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1723. }
  1724. spin_unlock(&vcpu->kvm->mmu_lock);
  1725. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1726. }
  1727. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1728. {
  1729. int ret = 0;
  1730. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1731. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1732. ret = 1;
  1733. }
  1734. return ret;
  1735. }
  1736. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1737. {
  1738. int i;
  1739. gfn_t root_gfn;
  1740. struct kvm_mmu_page *sp;
  1741. int direct = 0;
  1742. u64 pdptr;
  1743. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1744. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1745. hpa_t root = vcpu->arch.mmu.root_hpa;
  1746. ASSERT(!VALID_PAGE(root));
  1747. if (mmu_check_root(vcpu, root_gfn))
  1748. return 1;
  1749. if (tdp_enabled) {
  1750. direct = 1;
  1751. root_gfn = 0;
  1752. }
  1753. spin_lock(&vcpu->kvm->mmu_lock);
  1754. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1755. PT64_ROOT_LEVEL, direct,
  1756. ACC_ALL, NULL);
  1757. root = __pa(sp->spt);
  1758. ++sp->root_count;
  1759. spin_unlock(&vcpu->kvm->mmu_lock);
  1760. vcpu->arch.mmu.root_hpa = root;
  1761. return 0;
  1762. }
  1763. direct = !is_paging(vcpu);
  1764. for (i = 0; i < 4; ++i) {
  1765. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1766. ASSERT(!VALID_PAGE(root));
  1767. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1768. pdptr = kvm_pdptr_read(vcpu, i);
  1769. if (!is_present_gpte(pdptr)) {
  1770. vcpu->arch.mmu.pae_root[i] = 0;
  1771. continue;
  1772. }
  1773. root_gfn = pdptr >> PAGE_SHIFT;
  1774. } else if (vcpu->arch.mmu.root_level == 0)
  1775. root_gfn = 0;
  1776. if (mmu_check_root(vcpu, root_gfn))
  1777. return 1;
  1778. if (tdp_enabled) {
  1779. direct = 1;
  1780. root_gfn = i << 30;
  1781. }
  1782. spin_lock(&vcpu->kvm->mmu_lock);
  1783. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1784. PT32_ROOT_LEVEL, direct,
  1785. ACC_ALL, NULL);
  1786. root = __pa(sp->spt);
  1787. ++sp->root_count;
  1788. spin_unlock(&vcpu->kvm->mmu_lock);
  1789. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1790. }
  1791. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1792. return 0;
  1793. }
  1794. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1795. {
  1796. int i;
  1797. struct kvm_mmu_page *sp;
  1798. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1799. return;
  1800. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1801. hpa_t root = vcpu->arch.mmu.root_hpa;
  1802. sp = page_header(root);
  1803. mmu_sync_children(vcpu, sp);
  1804. return;
  1805. }
  1806. for (i = 0; i < 4; ++i) {
  1807. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1808. if (root && VALID_PAGE(root)) {
  1809. root &= PT64_BASE_ADDR_MASK;
  1810. sp = page_header(root);
  1811. mmu_sync_children(vcpu, sp);
  1812. }
  1813. }
  1814. }
  1815. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1816. {
  1817. spin_lock(&vcpu->kvm->mmu_lock);
  1818. mmu_sync_roots(vcpu);
  1819. spin_unlock(&vcpu->kvm->mmu_lock);
  1820. }
  1821. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
  1822. u32 access, u32 *error)
  1823. {
  1824. if (error)
  1825. *error = 0;
  1826. return vaddr;
  1827. }
  1828. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1829. u32 error_code)
  1830. {
  1831. gfn_t gfn;
  1832. int r;
  1833. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1834. r = mmu_topup_memory_caches(vcpu);
  1835. if (r)
  1836. return r;
  1837. ASSERT(vcpu);
  1838. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1839. gfn = gva >> PAGE_SHIFT;
  1840. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1841. error_code & PFERR_WRITE_MASK, gfn);
  1842. }
  1843. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1844. u32 error_code)
  1845. {
  1846. pfn_t pfn;
  1847. int r;
  1848. int level;
  1849. gfn_t gfn = gpa >> PAGE_SHIFT;
  1850. unsigned long mmu_seq;
  1851. ASSERT(vcpu);
  1852. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1853. r = mmu_topup_memory_caches(vcpu);
  1854. if (r)
  1855. return r;
  1856. level = mapping_level(vcpu, gfn);
  1857. gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
  1858. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1859. smp_rmb();
  1860. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1861. if (is_error_pfn(pfn)) {
  1862. kvm_release_pfn_clean(pfn);
  1863. return 1;
  1864. }
  1865. spin_lock(&vcpu->kvm->mmu_lock);
  1866. if (mmu_notifier_retry(vcpu, mmu_seq))
  1867. goto out_unlock;
  1868. kvm_mmu_free_some_pages(vcpu);
  1869. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1870. level, gfn, pfn);
  1871. spin_unlock(&vcpu->kvm->mmu_lock);
  1872. return r;
  1873. out_unlock:
  1874. spin_unlock(&vcpu->kvm->mmu_lock);
  1875. kvm_release_pfn_clean(pfn);
  1876. return 0;
  1877. }
  1878. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1879. {
  1880. mmu_free_roots(vcpu);
  1881. }
  1882. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1883. {
  1884. struct kvm_mmu *context = &vcpu->arch.mmu;
  1885. context->new_cr3 = nonpaging_new_cr3;
  1886. context->page_fault = nonpaging_page_fault;
  1887. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1888. context->free = nonpaging_free;
  1889. context->prefetch_page = nonpaging_prefetch_page;
  1890. context->sync_page = nonpaging_sync_page;
  1891. context->invlpg = nonpaging_invlpg;
  1892. context->root_level = 0;
  1893. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1894. context->root_hpa = INVALID_PAGE;
  1895. return 0;
  1896. }
  1897. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1898. {
  1899. ++vcpu->stat.tlb_flush;
  1900. kvm_x86_ops->tlb_flush(vcpu);
  1901. }
  1902. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1903. {
  1904. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1905. mmu_free_roots(vcpu);
  1906. }
  1907. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1908. u64 addr,
  1909. u32 err_code)
  1910. {
  1911. kvm_inject_page_fault(vcpu, addr, err_code);
  1912. }
  1913. static void paging_free(struct kvm_vcpu *vcpu)
  1914. {
  1915. nonpaging_free(vcpu);
  1916. }
  1917. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1918. {
  1919. int bit7;
  1920. bit7 = (gpte >> 7) & 1;
  1921. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1922. }
  1923. #define PTTYPE 64
  1924. #include "paging_tmpl.h"
  1925. #undef PTTYPE
  1926. #define PTTYPE 32
  1927. #include "paging_tmpl.h"
  1928. #undef PTTYPE
  1929. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1930. {
  1931. struct kvm_mmu *context = &vcpu->arch.mmu;
  1932. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1933. u64 exb_bit_rsvd = 0;
  1934. if (!is_nx(vcpu))
  1935. exb_bit_rsvd = rsvd_bits(63, 63);
  1936. switch (level) {
  1937. case PT32_ROOT_LEVEL:
  1938. /* no rsvd bits for 2 level 4K page table entries */
  1939. context->rsvd_bits_mask[0][1] = 0;
  1940. context->rsvd_bits_mask[0][0] = 0;
  1941. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
  1942. if (!is_pse(vcpu)) {
  1943. context->rsvd_bits_mask[1][1] = 0;
  1944. break;
  1945. }
  1946. if (is_cpuid_PSE36())
  1947. /* 36bits PSE 4MB page */
  1948. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1949. else
  1950. /* 32 bits PSE 4MB page */
  1951. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1952. break;
  1953. case PT32E_ROOT_LEVEL:
  1954. context->rsvd_bits_mask[0][2] =
  1955. rsvd_bits(maxphyaddr, 63) |
  1956. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1957. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1958. rsvd_bits(maxphyaddr, 62); /* PDE */
  1959. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1960. rsvd_bits(maxphyaddr, 62); /* PTE */
  1961. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1962. rsvd_bits(maxphyaddr, 62) |
  1963. rsvd_bits(13, 20); /* large page */
  1964. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
  1965. break;
  1966. case PT64_ROOT_LEVEL:
  1967. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1968. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1969. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1970. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1971. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1972. rsvd_bits(maxphyaddr, 51);
  1973. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1974. rsvd_bits(maxphyaddr, 51);
  1975. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1976. context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
  1977. rsvd_bits(maxphyaddr, 51) |
  1978. rsvd_bits(13, 29);
  1979. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1980. rsvd_bits(maxphyaddr, 51) |
  1981. rsvd_bits(13, 20); /* large page */
  1982. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
  1983. break;
  1984. }
  1985. }
  1986. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1987. {
  1988. struct kvm_mmu *context = &vcpu->arch.mmu;
  1989. ASSERT(is_pae(vcpu));
  1990. context->new_cr3 = paging_new_cr3;
  1991. context->page_fault = paging64_page_fault;
  1992. context->gva_to_gpa = paging64_gva_to_gpa;
  1993. context->prefetch_page = paging64_prefetch_page;
  1994. context->sync_page = paging64_sync_page;
  1995. context->invlpg = paging64_invlpg;
  1996. context->free = paging_free;
  1997. context->root_level = level;
  1998. context->shadow_root_level = level;
  1999. context->root_hpa = INVALID_PAGE;
  2000. return 0;
  2001. }
  2002. static int paging64_init_context(struct kvm_vcpu *vcpu)
  2003. {
  2004. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  2005. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  2006. }
  2007. static int paging32_init_context(struct kvm_vcpu *vcpu)
  2008. {
  2009. struct kvm_mmu *context = &vcpu->arch.mmu;
  2010. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  2011. context->new_cr3 = paging_new_cr3;
  2012. context->page_fault = paging32_page_fault;
  2013. context->gva_to_gpa = paging32_gva_to_gpa;
  2014. context->free = paging_free;
  2015. context->prefetch_page = paging32_prefetch_page;
  2016. context->sync_page = paging32_sync_page;
  2017. context->invlpg = paging32_invlpg;
  2018. context->root_level = PT32_ROOT_LEVEL;
  2019. context->shadow_root_level = PT32E_ROOT_LEVEL;
  2020. context->root_hpa = INVALID_PAGE;
  2021. return 0;
  2022. }
  2023. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  2024. {
  2025. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  2026. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  2027. }
  2028. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  2029. {
  2030. struct kvm_mmu *context = &vcpu->arch.mmu;
  2031. context->new_cr3 = nonpaging_new_cr3;
  2032. context->page_fault = tdp_page_fault;
  2033. context->free = nonpaging_free;
  2034. context->prefetch_page = nonpaging_prefetch_page;
  2035. context->sync_page = nonpaging_sync_page;
  2036. context->invlpg = nonpaging_invlpg;
  2037. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  2038. context->root_hpa = INVALID_PAGE;
  2039. if (!is_paging(vcpu)) {
  2040. context->gva_to_gpa = nonpaging_gva_to_gpa;
  2041. context->root_level = 0;
  2042. } else if (is_long_mode(vcpu)) {
  2043. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  2044. context->gva_to_gpa = paging64_gva_to_gpa;
  2045. context->root_level = PT64_ROOT_LEVEL;
  2046. } else if (is_pae(vcpu)) {
  2047. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  2048. context->gva_to_gpa = paging64_gva_to_gpa;
  2049. context->root_level = PT32E_ROOT_LEVEL;
  2050. } else {
  2051. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  2052. context->gva_to_gpa = paging32_gva_to_gpa;
  2053. context->root_level = PT32_ROOT_LEVEL;
  2054. }
  2055. return 0;
  2056. }
  2057. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  2058. {
  2059. int r;
  2060. ASSERT(vcpu);
  2061. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2062. if (!is_paging(vcpu))
  2063. r = nonpaging_init_context(vcpu);
  2064. else if (is_long_mode(vcpu))
  2065. r = paging64_init_context(vcpu);
  2066. else if (is_pae(vcpu))
  2067. r = paging32E_init_context(vcpu);
  2068. else
  2069. r = paging32_init_context(vcpu);
  2070. vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
  2071. return r;
  2072. }
  2073. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  2074. {
  2075. vcpu->arch.update_pte.pfn = bad_pfn;
  2076. if (tdp_enabled)
  2077. return init_kvm_tdp_mmu(vcpu);
  2078. else
  2079. return init_kvm_softmmu(vcpu);
  2080. }
  2081. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  2082. {
  2083. ASSERT(vcpu);
  2084. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  2085. vcpu->arch.mmu.free(vcpu);
  2086. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2087. }
  2088. }
  2089. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  2090. {
  2091. destroy_kvm_mmu(vcpu);
  2092. return init_kvm_mmu(vcpu);
  2093. }
  2094. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  2095. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  2096. {
  2097. int r;
  2098. r = mmu_topup_memory_caches(vcpu);
  2099. if (r)
  2100. goto out;
  2101. spin_lock(&vcpu->kvm->mmu_lock);
  2102. kvm_mmu_free_some_pages(vcpu);
  2103. spin_unlock(&vcpu->kvm->mmu_lock);
  2104. r = mmu_alloc_roots(vcpu);
  2105. spin_lock(&vcpu->kvm->mmu_lock);
  2106. mmu_sync_roots(vcpu);
  2107. spin_unlock(&vcpu->kvm->mmu_lock);
  2108. if (r)
  2109. goto out;
  2110. /* set_cr3() should ensure TLB has been flushed */
  2111. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2112. out:
  2113. return r;
  2114. }
  2115. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2116. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2117. {
  2118. mmu_free_roots(vcpu);
  2119. }
  2120. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2121. struct kvm_mmu_page *sp,
  2122. u64 *spte)
  2123. {
  2124. u64 pte;
  2125. struct kvm_mmu_page *child;
  2126. pte = *spte;
  2127. if (is_shadow_present_pte(pte)) {
  2128. if (is_last_spte(pte, sp->role.level))
  2129. rmap_remove(vcpu->kvm, spte);
  2130. else {
  2131. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2132. mmu_page_remove_parent_pte(child, spte);
  2133. }
  2134. }
  2135. __set_spte(spte, shadow_trap_nonpresent_pte);
  2136. if (is_large_pte(pte))
  2137. --vcpu->kvm->stat.lpages;
  2138. }
  2139. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2140. struct kvm_mmu_page *sp,
  2141. u64 *spte,
  2142. const void *new)
  2143. {
  2144. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2145. ++vcpu->kvm->stat.mmu_pde_zapped;
  2146. return;
  2147. }
  2148. ++vcpu->kvm->stat.mmu_pte_updated;
  2149. if (!sp->role.cr4_pae)
  2150. paging32_update_pte(vcpu, sp, spte, new);
  2151. else
  2152. paging64_update_pte(vcpu, sp, spte, new);
  2153. }
  2154. static bool need_remote_flush(u64 old, u64 new)
  2155. {
  2156. if (!is_shadow_present_pte(old))
  2157. return false;
  2158. if (!is_shadow_present_pte(new))
  2159. return true;
  2160. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2161. return true;
  2162. old ^= PT64_NX_MASK;
  2163. new ^= PT64_NX_MASK;
  2164. return (old & ~new & PT64_PERM_MASK) != 0;
  2165. }
  2166. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2167. {
  2168. if (need_remote_flush(old, new))
  2169. kvm_flush_remote_tlbs(vcpu->kvm);
  2170. else
  2171. kvm_mmu_flush_tlb(vcpu);
  2172. }
  2173. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2174. {
  2175. u64 *spte = vcpu->arch.last_pte_updated;
  2176. return !!(spte && (*spte & shadow_accessed_mask));
  2177. }
  2178. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2179. u64 gpte)
  2180. {
  2181. gfn_t gfn;
  2182. pfn_t pfn;
  2183. if (!is_present_gpte(gpte))
  2184. return;
  2185. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2186. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2187. smp_rmb();
  2188. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2189. if (is_error_pfn(pfn)) {
  2190. kvm_release_pfn_clean(pfn);
  2191. return;
  2192. }
  2193. vcpu->arch.update_pte.gfn = gfn;
  2194. vcpu->arch.update_pte.pfn = pfn;
  2195. }
  2196. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2197. {
  2198. u64 *spte = vcpu->arch.last_pte_updated;
  2199. if (spte
  2200. && vcpu->arch.last_pte_gfn == gfn
  2201. && shadow_accessed_mask
  2202. && !(*spte & shadow_accessed_mask)
  2203. && is_shadow_present_pte(*spte))
  2204. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2205. }
  2206. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2207. const u8 *new, int bytes,
  2208. bool guest_initiated)
  2209. {
  2210. gfn_t gfn = gpa >> PAGE_SHIFT;
  2211. struct kvm_mmu_page *sp;
  2212. struct hlist_node *node, *n;
  2213. struct hlist_head *bucket;
  2214. unsigned index;
  2215. u64 entry, gentry;
  2216. u64 *spte;
  2217. unsigned offset = offset_in_page(gpa);
  2218. unsigned pte_size;
  2219. unsigned page_offset;
  2220. unsigned misaligned;
  2221. unsigned quadrant;
  2222. int level;
  2223. int flooded = 0;
  2224. int npte;
  2225. int r;
  2226. int invlpg_counter;
  2227. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2228. invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
  2229. /*
  2230. * Assume that the pte write on a page table of the same type
  2231. * as the current vcpu paging mode. This is nearly always true
  2232. * (might be false while changing modes). Note it is verified later
  2233. * by update_pte().
  2234. */
  2235. if ((is_pae(vcpu) && bytes == 4) || !new) {
  2236. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2237. if (is_pae(vcpu)) {
  2238. gpa &= ~(gpa_t)7;
  2239. bytes = 8;
  2240. }
  2241. r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
  2242. if (r)
  2243. gentry = 0;
  2244. new = (const u8 *)&gentry;
  2245. }
  2246. switch (bytes) {
  2247. case 4:
  2248. gentry = *(const u32 *)new;
  2249. break;
  2250. case 8:
  2251. gentry = *(const u64 *)new;
  2252. break;
  2253. default:
  2254. gentry = 0;
  2255. break;
  2256. }
  2257. mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
  2258. spin_lock(&vcpu->kvm->mmu_lock);
  2259. if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
  2260. gentry = 0;
  2261. kvm_mmu_access_page(vcpu, gfn);
  2262. kvm_mmu_free_some_pages(vcpu);
  2263. ++vcpu->kvm->stat.mmu_pte_write;
  2264. kvm_mmu_audit(vcpu, "pre pte write");
  2265. if (guest_initiated) {
  2266. if (gfn == vcpu->arch.last_pt_write_gfn
  2267. && !last_updated_pte_accessed(vcpu)) {
  2268. ++vcpu->arch.last_pt_write_count;
  2269. if (vcpu->arch.last_pt_write_count >= 3)
  2270. flooded = 1;
  2271. } else {
  2272. vcpu->arch.last_pt_write_gfn = gfn;
  2273. vcpu->arch.last_pt_write_count = 1;
  2274. vcpu->arch.last_pte_updated = NULL;
  2275. }
  2276. }
  2277. index = kvm_page_table_hashfn(gfn);
  2278. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2279. restart:
  2280. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2281. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2282. continue;
  2283. pte_size = sp->role.cr4_pae ? 8 : 4;
  2284. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2285. misaligned |= bytes < 4;
  2286. if (misaligned || flooded) {
  2287. /*
  2288. * Misaligned accesses are too much trouble to fix
  2289. * up; also, they usually indicate a page is not used
  2290. * as a page table.
  2291. *
  2292. * If we're seeing too many writes to a page,
  2293. * it may no longer be a page table, or we may be
  2294. * forking, in which case it is better to unmap the
  2295. * page.
  2296. */
  2297. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2298. gpa, bytes, sp->role.word);
  2299. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2300. goto restart;
  2301. ++vcpu->kvm->stat.mmu_flooded;
  2302. continue;
  2303. }
  2304. page_offset = offset;
  2305. level = sp->role.level;
  2306. npte = 1;
  2307. if (!sp->role.cr4_pae) {
  2308. page_offset <<= 1; /* 32->64 */
  2309. /*
  2310. * A 32-bit pde maps 4MB while the shadow pdes map
  2311. * only 2MB. So we need to double the offset again
  2312. * and zap two pdes instead of one.
  2313. */
  2314. if (level == PT32_ROOT_LEVEL) {
  2315. page_offset &= ~7; /* kill rounding error */
  2316. page_offset <<= 1;
  2317. npte = 2;
  2318. }
  2319. quadrant = page_offset >> PAGE_SHIFT;
  2320. page_offset &= ~PAGE_MASK;
  2321. if (quadrant != sp->role.quadrant)
  2322. continue;
  2323. }
  2324. spte = &sp->spt[page_offset / sizeof(*spte)];
  2325. while (npte--) {
  2326. entry = *spte;
  2327. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2328. if (gentry)
  2329. mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
  2330. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2331. ++spte;
  2332. }
  2333. }
  2334. kvm_mmu_audit(vcpu, "post pte write");
  2335. spin_unlock(&vcpu->kvm->mmu_lock);
  2336. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2337. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2338. vcpu->arch.update_pte.pfn = bad_pfn;
  2339. }
  2340. }
  2341. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2342. {
  2343. gpa_t gpa;
  2344. int r;
  2345. if (tdp_enabled)
  2346. return 0;
  2347. gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
  2348. spin_lock(&vcpu->kvm->mmu_lock);
  2349. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2350. spin_unlock(&vcpu->kvm->mmu_lock);
  2351. return r;
  2352. }
  2353. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2354. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2355. {
  2356. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
  2357. !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2358. struct kvm_mmu_page *sp;
  2359. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2360. struct kvm_mmu_page, link);
  2361. kvm_mmu_zap_page(vcpu->kvm, sp);
  2362. ++vcpu->kvm->stat.mmu_recycled;
  2363. }
  2364. }
  2365. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2366. {
  2367. int r;
  2368. enum emulation_result er;
  2369. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2370. if (r < 0)
  2371. goto out;
  2372. if (!r) {
  2373. r = 1;
  2374. goto out;
  2375. }
  2376. r = mmu_topup_memory_caches(vcpu);
  2377. if (r)
  2378. goto out;
  2379. er = emulate_instruction(vcpu, cr2, error_code, 0);
  2380. switch (er) {
  2381. case EMULATE_DONE:
  2382. return 1;
  2383. case EMULATE_DO_MMIO:
  2384. ++vcpu->stat.mmio_exits;
  2385. return 0;
  2386. case EMULATE_FAIL:
  2387. vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  2388. vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
  2389. vcpu->run->internal.ndata = 0;
  2390. return 0;
  2391. default:
  2392. BUG();
  2393. }
  2394. out:
  2395. return r;
  2396. }
  2397. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2398. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2399. {
  2400. vcpu->arch.mmu.invlpg(vcpu, gva);
  2401. kvm_mmu_flush_tlb(vcpu);
  2402. ++vcpu->stat.invlpg;
  2403. }
  2404. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2405. void kvm_enable_tdp(void)
  2406. {
  2407. tdp_enabled = true;
  2408. }
  2409. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2410. void kvm_disable_tdp(void)
  2411. {
  2412. tdp_enabled = false;
  2413. }
  2414. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2415. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2416. {
  2417. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2418. }
  2419. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2420. {
  2421. struct page *page;
  2422. int i;
  2423. ASSERT(vcpu);
  2424. /*
  2425. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2426. * Therefore we need to allocate shadow page tables in the first
  2427. * 4GB of memory, which happens to fit the DMA32 zone.
  2428. */
  2429. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2430. if (!page)
  2431. return -ENOMEM;
  2432. vcpu->arch.mmu.pae_root = page_address(page);
  2433. for (i = 0; i < 4; ++i)
  2434. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2435. return 0;
  2436. }
  2437. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2438. {
  2439. ASSERT(vcpu);
  2440. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2441. return alloc_mmu_pages(vcpu);
  2442. }
  2443. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2444. {
  2445. ASSERT(vcpu);
  2446. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2447. return init_kvm_mmu(vcpu);
  2448. }
  2449. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2450. {
  2451. ASSERT(vcpu);
  2452. destroy_kvm_mmu(vcpu);
  2453. free_mmu_pages(vcpu);
  2454. mmu_free_memory_caches(vcpu);
  2455. }
  2456. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2457. {
  2458. struct kvm_mmu_page *sp;
  2459. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2460. int i;
  2461. u64 *pt;
  2462. if (!test_bit(slot, sp->slot_bitmap))
  2463. continue;
  2464. pt = sp->spt;
  2465. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2466. /* avoid RMW */
  2467. if (pt[i] & PT_WRITABLE_MASK)
  2468. pt[i] &= ~PT_WRITABLE_MASK;
  2469. }
  2470. kvm_flush_remote_tlbs(kvm);
  2471. }
  2472. void kvm_mmu_zap_all(struct kvm *kvm)
  2473. {
  2474. struct kvm_mmu_page *sp, *node;
  2475. spin_lock(&kvm->mmu_lock);
  2476. restart:
  2477. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2478. if (kvm_mmu_zap_page(kvm, sp))
  2479. goto restart;
  2480. spin_unlock(&kvm->mmu_lock);
  2481. kvm_flush_remote_tlbs(kvm);
  2482. }
  2483. static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
  2484. {
  2485. struct kvm_mmu_page *page;
  2486. page = container_of(kvm->arch.active_mmu_pages.prev,
  2487. struct kvm_mmu_page, link);
  2488. return kvm_mmu_zap_page(kvm, page) + 1;
  2489. }
  2490. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2491. {
  2492. struct kvm *kvm;
  2493. struct kvm *kvm_freed = NULL;
  2494. int cache_count = 0;
  2495. spin_lock(&kvm_lock);
  2496. list_for_each_entry(kvm, &vm_list, vm_list) {
  2497. int npages, idx, freed_pages;
  2498. idx = srcu_read_lock(&kvm->srcu);
  2499. spin_lock(&kvm->mmu_lock);
  2500. npages = kvm->arch.n_alloc_mmu_pages -
  2501. kvm->arch.n_free_mmu_pages;
  2502. cache_count += npages;
  2503. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2504. freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
  2505. cache_count -= freed_pages;
  2506. kvm_freed = kvm;
  2507. }
  2508. nr_to_scan--;
  2509. spin_unlock(&kvm->mmu_lock);
  2510. srcu_read_unlock(&kvm->srcu, idx);
  2511. }
  2512. if (kvm_freed)
  2513. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2514. spin_unlock(&kvm_lock);
  2515. return cache_count;
  2516. }
  2517. static struct shrinker mmu_shrinker = {
  2518. .shrink = mmu_shrink,
  2519. .seeks = DEFAULT_SEEKS * 10,
  2520. };
  2521. static void mmu_destroy_caches(void)
  2522. {
  2523. if (pte_chain_cache)
  2524. kmem_cache_destroy(pte_chain_cache);
  2525. if (rmap_desc_cache)
  2526. kmem_cache_destroy(rmap_desc_cache);
  2527. if (mmu_page_header_cache)
  2528. kmem_cache_destroy(mmu_page_header_cache);
  2529. }
  2530. void kvm_mmu_module_exit(void)
  2531. {
  2532. mmu_destroy_caches();
  2533. unregister_shrinker(&mmu_shrinker);
  2534. }
  2535. int kvm_mmu_module_init(void)
  2536. {
  2537. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2538. sizeof(struct kvm_pte_chain),
  2539. 0, 0, NULL);
  2540. if (!pte_chain_cache)
  2541. goto nomem;
  2542. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2543. sizeof(struct kvm_rmap_desc),
  2544. 0, 0, NULL);
  2545. if (!rmap_desc_cache)
  2546. goto nomem;
  2547. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2548. sizeof(struct kvm_mmu_page),
  2549. 0, 0, NULL);
  2550. if (!mmu_page_header_cache)
  2551. goto nomem;
  2552. register_shrinker(&mmu_shrinker);
  2553. return 0;
  2554. nomem:
  2555. mmu_destroy_caches();
  2556. return -ENOMEM;
  2557. }
  2558. /*
  2559. * Caculate mmu pages needed for kvm.
  2560. */
  2561. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2562. {
  2563. int i;
  2564. unsigned int nr_mmu_pages;
  2565. unsigned int nr_pages = 0;
  2566. struct kvm_memslots *slots;
  2567. slots = kvm_memslots(kvm);
  2568. for (i = 0; i < slots->nmemslots; i++)
  2569. nr_pages += slots->memslots[i].npages;
  2570. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2571. nr_mmu_pages = max(nr_mmu_pages,
  2572. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2573. return nr_mmu_pages;
  2574. }
  2575. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2576. unsigned len)
  2577. {
  2578. if (len > buffer->len)
  2579. return NULL;
  2580. return buffer->ptr;
  2581. }
  2582. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2583. unsigned len)
  2584. {
  2585. void *ret;
  2586. ret = pv_mmu_peek_buffer(buffer, len);
  2587. if (!ret)
  2588. return ret;
  2589. buffer->ptr += len;
  2590. buffer->len -= len;
  2591. buffer->processed += len;
  2592. return ret;
  2593. }
  2594. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2595. gpa_t addr, gpa_t value)
  2596. {
  2597. int bytes = 8;
  2598. int r;
  2599. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2600. bytes = 4;
  2601. r = mmu_topup_memory_caches(vcpu);
  2602. if (r)
  2603. return r;
  2604. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2605. return -EFAULT;
  2606. return 1;
  2607. }
  2608. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2609. {
  2610. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2611. return 1;
  2612. }
  2613. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2614. {
  2615. spin_lock(&vcpu->kvm->mmu_lock);
  2616. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2617. spin_unlock(&vcpu->kvm->mmu_lock);
  2618. return 1;
  2619. }
  2620. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2621. struct kvm_pv_mmu_op_buffer *buffer)
  2622. {
  2623. struct kvm_mmu_op_header *header;
  2624. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2625. if (!header)
  2626. return 0;
  2627. switch (header->op) {
  2628. case KVM_MMU_OP_WRITE_PTE: {
  2629. struct kvm_mmu_op_write_pte *wpte;
  2630. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2631. if (!wpte)
  2632. return 0;
  2633. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2634. wpte->pte_val);
  2635. }
  2636. case KVM_MMU_OP_FLUSH_TLB: {
  2637. struct kvm_mmu_op_flush_tlb *ftlb;
  2638. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2639. if (!ftlb)
  2640. return 0;
  2641. return kvm_pv_mmu_flush_tlb(vcpu);
  2642. }
  2643. case KVM_MMU_OP_RELEASE_PT: {
  2644. struct kvm_mmu_op_release_pt *rpt;
  2645. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2646. if (!rpt)
  2647. return 0;
  2648. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2649. }
  2650. default: return 0;
  2651. }
  2652. }
  2653. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2654. gpa_t addr, unsigned long *ret)
  2655. {
  2656. int r;
  2657. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2658. buffer->ptr = buffer->buf;
  2659. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2660. buffer->processed = 0;
  2661. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2662. if (r)
  2663. goto out;
  2664. while (buffer->len) {
  2665. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2666. if (r < 0)
  2667. goto out;
  2668. if (r == 0)
  2669. break;
  2670. }
  2671. r = 1;
  2672. out:
  2673. *ret = buffer->processed;
  2674. return r;
  2675. }
  2676. int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
  2677. {
  2678. struct kvm_shadow_walk_iterator iterator;
  2679. int nr_sptes = 0;
  2680. spin_lock(&vcpu->kvm->mmu_lock);
  2681. for_each_shadow_entry(vcpu, addr, iterator) {
  2682. sptes[iterator.level-1] = *iterator.sptep;
  2683. nr_sptes++;
  2684. if (!is_shadow_present_pte(*iterator.sptep))
  2685. break;
  2686. }
  2687. spin_unlock(&vcpu->kvm->mmu_lock);
  2688. return nr_sptes;
  2689. }
  2690. EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
  2691. #ifdef AUDIT
  2692. static const char *audit_msg;
  2693. static gva_t canonicalize(gva_t gva)
  2694. {
  2695. #ifdef CONFIG_X86_64
  2696. gva = (long long)(gva << 16) >> 16;
  2697. #endif
  2698. return gva;
  2699. }
  2700. typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
  2701. static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
  2702. inspect_spte_fn fn)
  2703. {
  2704. int i;
  2705. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2706. u64 ent = sp->spt[i];
  2707. if (is_shadow_present_pte(ent)) {
  2708. if (!is_last_spte(ent, sp->role.level)) {
  2709. struct kvm_mmu_page *child;
  2710. child = page_header(ent & PT64_BASE_ADDR_MASK);
  2711. __mmu_spte_walk(kvm, child, fn);
  2712. } else
  2713. fn(kvm, &sp->spt[i]);
  2714. }
  2715. }
  2716. }
  2717. static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
  2718. {
  2719. int i;
  2720. struct kvm_mmu_page *sp;
  2721. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  2722. return;
  2723. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  2724. hpa_t root = vcpu->arch.mmu.root_hpa;
  2725. sp = page_header(root);
  2726. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2727. return;
  2728. }
  2729. for (i = 0; i < 4; ++i) {
  2730. hpa_t root = vcpu->arch.mmu.pae_root[i];
  2731. if (root && VALID_PAGE(root)) {
  2732. root &= PT64_BASE_ADDR_MASK;
  2733. sp = page_header(root);
  2734. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2735. }
  2736. }
  2737. return;
  2738. }
  2739. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2740. gva_t va, int level)
  2741. {
  2742. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2743. int i;
  2744. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2745. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2746. u64 ent = pt[i];
  2747. if (ent == shadow_trap_nonpresent_pte)
  2748. continue;
  2749. va = canonicalize(va);
  2750. if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
  2751. audit_mappings_page(vcpu, ent, va, level - 1);
  2752. else {
  2753. gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
  2754. gfn_t gfn = gpa >> PAGE_SHIFT;
  2755. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2756. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2757. if (is_error_pfn(pfn)) {
  2758. kvm_release_pfn_clean(pfn);
  2759. continue;
  2760. }
  2761. if (is_shadow_present_pte(ent)
  2762. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2763. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2764. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2765. audit_msg, vcpu->arch.mmu.root_level,
  2766. va, gpa, hpa, ent,
  2767. is_shadow_present_pte(ent));
  2768. else if (ent == shadow_notrap_nonpresent_pte
  2769. && !is_error_hpa(hpa))
  2770. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2771. " valid guest gva %lx\n", audit_msg, va);
  2772. kvm_release_pfn_clean(pfn);
  2773. }
  2774. }
  2775. }
  2776. static void audit_mappings(struct kvm_vcpu *vcpu)
  2777. {
  2778. unsigned i;
  2779. if (vcpu->arch.mmu.root_level == 4)
  2780. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2781. else
  2782. for (i = 0; i < 4; ++i)
  2783. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2784. audit_mappings_page(vcpu,
  2785. vcpu->arch.mmu.pae_root[i],
  2786. i << 30,
  2787. 2);
  2788. }
  2789. static int count_rmaps(struct kvm_vcpu *vcpu)
  2790. {
  2791. struct kvm *kvm = vcpu->kvm;
  2792. struct kvm_memslots *slots;
  2793. int nmaps = 0;
  2794. int i, j, k, idx;
  2795. idx = srcu_read_lock(&kvm->srcu);
  2796. slots = kvm_memslots(kvm);
  2797. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2798. struct kvm_memory_slot *m = &slots->memslots[i];
  2799. struct kvm_rmap_desc *d;
  2800. for (j = 0; j < m->npages; ++j) {
  2801. unsigned long *rmapp = &m->rmap[j];
  2802. if (!*rmapp)
  2803. continue;
  2804. if (!(*rmapp & 1)) {
  2805. ++nmaps;
  2806. continue;
  2807. }
  2808. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2809. while (d) {
  2810. for (k = 0; k < RMAP_EXT; ++k)
  2811. if (d->sptes[k])
  2812. ++nmaps;
  2813. else
  2814. break;
  2815. d = d->more;
  2816. }
  2817. }
  2818. }
  2819. srcu_read_unlock(&kvm->srcu, idx);
  2820. return nmaps;
  2821. }
  2822. void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
  2823. {
  2824. unsigned long *rmapp;
  2825. struct kvm_mmu_page *rev_sp;
  2826. gfn_t gfn;
  2827. if (*sptep & PT_WRITABLE_MASK) {
  2828. rev_sp = page_header(__pa(sptep));
  2829. gfn = rev_sp->gfns[sptep - rev_sp->spt];
  2830. if (!gfn_to_memslot(kvm, gfn)) {
  2831. if (!printk_ratelimit())
  2832. return;
  2833. printk(KERN_ERR "%s: no memslot for gfn %ld\n",
  2834. audit_msg, gfn);
  2835. printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
  2836. audit_msg, (long int)(sptep - rev_sp->spt),
  2837. rev_sp->gfn);
  2838. dump_stack();
  2839. return;
  2840. }
  2841. rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
  2842. rev_sp->role.level);
  2843. if (!*rmapp) {
  2844. if (!printk_ratelimit())
  2845. return;
  2846. printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
  2847. audit_msg, *sptep);
  2848. dump_stack();
  2849. }
  2850. }
  2851. }
  2852. void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
  2853. {
  2854. mmu_spte_walk(vcpu, inspect_spte_has_rmap);
  2855. }
  2856. static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
  2857. {
  2858. struct kvm_mmu_page *sp;
  2859. int i;
  2860. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2861. u64 *pt = sp->spt;
  2862. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2863. continue;
  2864. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2865. u64 ent = pt[i];
  2866. if (!(ent & PT_PRESENT_MASK))
  2867. continue;
  2868. if (!(ent & PT_WRITABLE_MASK))
  2869. continue;
  2870. inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
  2871. }
  2872. }
  2873. return;
  2874. }
  2875. static void audit_rmap(struct kvm_vcpu *vcpu)
  2876. {
  2877. check_writable_mappings_rmap(vcpu);
  2878. count_rmaps(vcpu);
  2879. }
  2880. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2881. {
  2882. struct kvm_mmu_page *sp;
  2883. struct kvm_memory_slot *slot;
  2884. unsigned long *rmapp;
  2885. u64 *spte;
  2886. gfn_t gfn;
  2887. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2888. if (sp->role.direct)
  2889. continue;
  2890. if (sp->unsync)
  2891. continue;
  2892. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2893. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2894. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2895. spte = rmap_next(vcpu->kvm, rmapp, NULL);
  2896. while (spte) {
  2897. if (*spte & PT_WRITABLE_MASK)
  2898. printk(KERN_ERR "%s: (%s) shadow page has "
  2899. "writable mappings: gfn %lx role %x\n",
  2900. __func__, audit_msg, sp->gfn,
  2901. sp->role.word);
  2902. spte = rmap_next(vcpu->kvm, rmapp, spte);
  2903. }
  2904. }
  2905. }
  2906. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2907. {
  2908. int olddbg = dbg;
  2909. dbg = 0;
  2910. audit_msg = msg;
  2911. audit_rmap(vcpu);
  2912. audit_write_protection(vcpu);
  2913. if (strcmp("pre pte write", audit_msg) != 0)
  2914. audit_mappings(vcpu);
  2915. audit_writable_sptes_have_rmaps(vcpu);
  2916. dbg = olddbg;
  2917. }
  2918. #endif