board-sh7785lcr.c 8.3 KB

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  1. /*
  2. * Renesas Technology Corp. R0P7785LC0011RL Support.
  3. *
  4. * Copyright (C) 2008 Yoshihiro Shimoda
  5. * Copyright (C) 2009 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/sm501.h>
  14. #include <linux/sm501-regs.h>
  15. #include <linux/fb.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/i2c.h>
  20. #include <linux/i2c-pca-platform.h>
  21. #include <linux/i2c-algo-pca.h>
  22. #include <linux/usb/r8a66597.h>
  23. #include <linux/irq.h>
  24. #include <linux/clk.h>
  25. #include <linux/errno.h>
  26. #include <mach/sh7785lcr.h>
  27. #include <cpu/sh7785.h>
  28. #include <asm/heartbeat.h>
  29. #include <asm/clock.h>
  30. /*
  31. * NOTE: This board has 2 physical memory maps.
  32. * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  33. */
  34. static struct resource heartbeat_resource = {
  35. .start = PLD_LEDCR,
  36. .end = PLD_LEDCR,
  37. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  38. };
  39. static struct platform_device heartbeat_device = {
  40. .name = "heartbeat",
  41. .id = -1,
  42. .num_resources = 1,
  43. .resource = &heartbeat_resource,
  44. };
  45. static struct mtd_partition nor_flash_partitions[] = {
  46. {
  47. .name = "loader",
  48. .offset = 0x00000000,
  49. .size = 512 * 1024,
  50. },
  51. {
  52. .name = "bootenv",
  53. .offset = MTDPART_OFS_APPEND,
  54. .size = 512 * 1024,
  55. },
  56. {
  57. .name = "kernel",
  58. .offset = MTDPART_OFS_APPEND,
  59. .size = 4 * 1024 * 1024,
  60. },
  61. {
  62. .name = "data",
  63. .offset = MTDPART_OFS_APPEND,
  64. .size = MTDPART_SIZ_FULL,
  65. },
  66. };
  67. static struct physmap_flash_data nor_flash_data = {
  68. .width = 4,
  69. .parts = nor_flash_partitions,
  70. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  71. };
  72. static struct resource nor_flash_resources[] = {
  73. [0] = {
  74. .start = NOR_FLASH_ADDR,
  75. .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  76. .flags = IORESOURCE_MEM,
  77. }
  78. };
  79. static struct platform_device nor_flash_device = {
  80. .name = "physmap-flash",
  81. .dev = {
  82. .platform_data = &nor_flash_data,
  83. },
  84. .num_resources = ARRAY_SIZE(nor_flash_resources),
  85. .resource = nor_flash_resources,
  86. };
  87. static struct r8a66597_platdata r8a66597_data = {
  88. .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
  89. .vif = 1,
  90. };
  91. static struct resource r8a66597_usb_host_resources[] = {
  92. [0] = {
  93. .start = R8A66597_ADDR,
  94. .end = R8A66597_ADDR + R8A66597_SIZE - 1,
  95. .flags = IORESOURCE_MEM,
  96. },
  97. [1] = {
  98. .start = 2,
  99. .end = 2,
  100. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  101. },
  102. };
  103. static struct platform_device r8a66597_usb_host_device = {
  104. .name = "r8a66597_hcd",
  105. .id = -1,
  106. .dev = {
  107. .dma_mask = NULL,
  108. .coherent_dma_mask = 0xffffffff,
  109. .platform_data = &r8a66597_data,
  110. },
  111. .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
  112. .resource = r8a66597_usb_host_resources,
  113. };
  114. static struct resource sm501_resources[] = {
  115. [0] = {
  116. .start = SM107_MEM_ADDR,
  117. .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. [1] = {
  121. .start = SM107_REG_ADDR,
  122. .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
  123. .flags = IORESOURCE_MEM,
  124. },
  125. [2] = {
  126. .start = 10,
  127. .flags = IORESOURCE_IRQ,
  128. },
  129. };
  130. static struct fb_videomode sm501_default_mode_crt = {
  131. .pixclock = 35714, /* 28MHz */
  132. .xres = 640,
  133. .yres = 480,
  134. .left_margin = 105,
  135. .right_margin = 16,
  136. .upper_margin = 33,
  137. .lower_margin = 10,
  138. .hsync_len = 39,
  139. .vsync_len = 2,
  140. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  141. };
  142. static struct fb_videomode sm501_default_mode_pnl = {
  143. .pixclock = 40000, /* 25MHz */
  144. .xres = 640,
  145. .yres = 480,
  146. .left_margin = 2,
  147. .right_margin = 16,
  148. .upper_margin = 33,
  149. .lower_margin = 10,
  150. .hsync_len = 39,
  151. .vsync_len = 2,
  152. .sync = 0,
  153. };
  154. static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
  155. .def_bpp = 16,
  156. .def_mode = &sm501_default_mode_pnl,
  157. .flags = SM501FB_FLAG_USE_INIT_MODE |
  158. SM501FB_FLAG_USE_HWCURSOR |
  159. SM501FB_FLAG_USE_HWACCEL |
  160. SM501FB_FLAG_DISABLE_AT_EXIT |
  161. SM501FB_FLAG_PANEL_NO_VBIASEN,
  162. };
  163. static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
  164. .def_bpp = 16,
  165. .def_mode = &sm501_default_mode_crt,
  166. .flags = SM501FB_FLAG_USE_INIT_MODE |
  167. SM501FB_FLAG_USE_HWCURSOR |
  168. SM501FB_FLAG_USE_HWACCEL |
  169. SM501FB_FLAG_DISABLE_AT_EXIT,
  170. };
  171. static struct sm501_platdata_fb sm501_fb_pdata = {
  172. .fb_route = SM501_FB_OWN,
  173. .fb_crt = &sm501_pdata_fbsub_crt,
  174. .fb_pnl = &sm501_pdata_fbsub_pnl,
  175. };
  176. static struct sm501_initdata sm501_initdata = {
  177. .gpio_high = {
  178. .set = 0x00001fe0,
  179. .mask = 0x0,
  180. },
  181. .devices = 0,
  182. .mclk = 84 * 1000000,
  183. .m1xclk = 112 * 1000000,
  184. };
  185. static struct sm501_platdata sm501_platform_data = {
  186. .init = &sm501_initdata,
  187. .fb = &sm501_fb_pdata,
  188. };
  189. static struct platform_device sm501_device = {
  190. .name = "sm501",
  191. .id = -1,
  192. .dev = {
  193. .platform_data = &sm501_platform_data,
  194. },
  195. .num_resources = ARRAY_SIZE(sm501_resources),
  196. .resource = sm501_resources,
  197. };
  198. static struct resource i2c_proto_resources[] = {
  199. [0] = {
  200. .start = PCA9564_PROTO_32BIT_ADDR,
  201. .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
  202. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  203. },
  204. [1] = {
  205. .start = 12,
  206. .end = 12,
  207. .flags = IORESOURCE_IRQ,
  208. },
  209. };
  210. static struct resource i2c_resources[] = {
  211. [0] = {
  212. .start = PCA9564_ADDR,
  213. .end = PCA9564_ADDR + PCA9564_SIZE - 1,
  214. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  215. },
  216. [1] = {
  217. .start = 12,
  218. .end = 12,
  219. .flags = IORESOURCE_IRQ,
  220. },
  221. };
  222. static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
  223. .gpio = 0,
  224. .i2c_clock_speed = I2C_PCA_CON_330kHz,
  225. .timeout = HZ,
  226. };
  227. static struct platform_device i2c_device = {
  228. .name = "i2c-pca-platform",
  229. .id = -1,
  230. .dev = {
  231. .platform_data = &i2c_platform_data,
  232. },
  233. .num_resources = ARRAY_SIZE(i2c_resources),
  234. .resource = i2c_resources,
  235. };
  236. static struct platform_device *sh7785lcr_devices[] __initdata = {
  237. &heartbeat_device,
  238. &nor_flash_device,
  239. &r8a66597_usb_host_device,
  240. &sm501_device,
  241. &i2c_device,
  242. };
  243. static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
  244. {
  245. I2C_BOARD_INFO("r2025sd", 0x32),
  246. },
  247. };
  248. static int __init sh7785lcr_devices_setup(void)
  249. {
  250. i2c_register_board_info(0, sh7785lcr_i2c_devices,
  251. ARRAY_SIZE(sh7785lcr_i2c_devices));
  252. if (mach_is_sh7785lcr_pt()) {
  253. i2c_device.resource = i2c_proto_resources;
  254. i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
  255. }
  256. return platform_add_devices(sh7785lcr_devices,
  257. ARRAY_SIZE(sh7785lcr_devices));
  258. }
  259. __initcall(sh7785lcr_devices_setup);
  260. /* Initialize IRQ setting */
  261. void __init init_sh7785lcr_IRQ(void)
  262. {
  263. plat_irq_setup_pins(IRQ_MODE_IRQ7654);
  264. plat_irq_setup_pins(IRQ_MODE_IRQ3210);
  265. }
  266. static int sh7785lcr_clk_init(void)
  267. {
  268. struct clk *clk;
  269. int ret;
  270. clk = clk_get(NULL, "extal");
  271. if (!clk || IS_ERR(clk))
  272. return PTR_ERR(clk);
  273. ret = clk_set_rate(clk, 33333333);
  274. clk_put(clk);
  275. return ret;
  276. }
  277. static void sh7785lcr_power_off(void)
  278. {
  279. unsigned char *p;
  280. p = ioremap(PLD_POFCR, PLD_POFCR + 1);
  281. if (!p) {
  282. printk(KERN_ERR "%s: ioremap error.\n", __func__);
  283. return;
  284. }
  285. *p = 0x01;
  286. iounmap(p);
  287. set_bl_bit();
  288. while (1)
  289. cpu_relax();
  290. }
  291. /* Initialize the board */
  292. static void __init sh7785lcr_setup(char **cmdline_p)
  293. {
  294. void __iomem *sm501_reg;
  295. printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
  296. pm_power_off = sh7785lcr_power_off;
  297. /* sm501 DRAM configuration */
  298. sm501_reg = ioremap_fixed(SM107_REG_ADDR, SM501_DRAM_CONTROL,
  299. PAGE_KERNEL);
  300. if (!sm501_reg) {
  301. printk(KERN_ERR "%s: ioremap error.\n", __func__);
  302. return;
  303. }
  304. writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
  305. iounmap_fixed(sm501_reg);
  306. }
  307. /* Return the board specific boot mode pin configuration */
  308. static int sh7785lcr_mode_pins(void)
  309. {
  310. int value = 0;
  311. /* These are the factory default settings of S1 and S2.
  312. * If you change these dip switches then you will need to
  313. * adjust the values below as well.
  314. */
  315. value |= MODE_PIN4; /* Clock Mode 16 */
  316. value |= MODE_PIN5; /* 32-bit Area0 bus width */
  317. value |= MODE_PIN6; /* 32-bit Area0 bus width */
  318. value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
  319. value |= MODE_PIN8; /* Little Endian */
  320. value |= MODE_PIN9; /* Master Mode */
  321. value |= MODE_PIN14; /* No PLL step-up */
  322. return value;
  323. }
  324. /*
  325. * The Machine Vector
  326. */
  327. static struct sh_machine_vector mv_sh7785lcr __initmv = {
  328. .mv_name = "SH7785LCR",
  329. .mv_setup = sh7785lcr_setup,
  330. .mv_clk_init = sh7785lcr_clk_init,
  331. .mv_init_irq = init_sh7785lcr_IRQ,
  332. .mv_mode_pins = sh7785lcr_mode_pins,
  333. };