iwl-4965.c 96 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-eeprom.h"
  40. #include "iwl-dev.h"
  41. #include "iwl-core.h"
  42. #include "iwl-io.h"
  43. #include "iwl-helpers.h"
  44. #include "iwl-calib.h"
  45. #include "iwl-sta.h"
  46. static int iwl4965_send_tx_power(struct iwl_priv *priv);
  47. static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  48. /* module parameters */
  49. static struct iwl_mod_params iwl4965_mod_params = {
  50. .num_of_queues = IWL49_NUM_QUEUES,
  51. .enable_qos = 1,
  52. .amsdu_size_8K = 1,
  53. .restart_fw = 1,
  54. /* the rest are 0 by default */
  55. };
  56. /* check contents of special bootstrap uCode SRAM */
  57. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  58. {
  59. __le32 *image = priv->ucode_boot.v_addr;
  60. u32 len = priv->ucode_boot.len;
  61. u32 reg;
  62. u32 val;
  63. IWL_DEBUG_INFO("Begin verify bsm\n");
  64. /* verify BSM SRAM contents */
  65. val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  66. for (reg = BSM_SRAM_LOWER_BOUND;
  67. reg < BSM_SRAM_LOWER_BOUND + len;
  68. reg += sizeof(u32), image++) {
  69. val = iwl_read_prph(priv, reg);
  70. if (val != le32_to_cpu(*image)) {
  71. IWL_ERROR("BSM uCode verification failed at "
  72. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  73. BSM_SRAM_LOWER_BOUND,
  74. reg - BSM_SRAM_LOWER_BOUND, len,
  75. val, le32_to_cpu(*image));
  76. return -EIO;
  77. }
  78. }
  79. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  80. return 0;
  81. }
  82. /**
  83. * iwl4965_load_bsm - Load bootstrap instructions
  84. *
  85. * BSM operation:
  86. *
  87. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  88. * in special SRAM that does not power down during RFKILL. When powering back
  89. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  90. * the bootstrap program into the on-board processor, and starts it.
  91. *
  92. * The bootstrap program loads (via DMA) instructions and data for a new
  93. * program from host DRAM locations indicated by the host driver in the
  94. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  95. * automatically.
  96. *
  97. * When initializing the NIC, the host driver points the BSM to the
  98. * "initialize" uCode image. This uCode sets up some internal data, then
  99. * notifies host via "initialize alive" that it is complete.
  100. *
  101. * The host then replaces the BSM_DRAM_* pointer values to point to the
  102. * normal runtime uCode instructions and a backup uCode data cache buffer
  103. * (filled initially with starting data values for the on-board processor),
  104. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  105. * which begins normal operation.
  106. *
  107. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  108. * the backup data cache in DRAM before SRAM is powered down.
  109. *
  110. * When powering back up, the BSM loads the bootstrap program. This reloads
  111. * the runtime uCode instructions and the backup data cache into SRAM,
  112. * and re-launches the runtime uCode from where it left off.
  113. */
  114. static int iwl4965_load_bsm(struct iwl_priv *priv)
  115. {
  116. __le32 *image = priv->ucode_boot.v_addr;
  117. u32 len = priv->ucode_boot.len;
  118. dma_addr_t pinst;
  119. dma_addr_t pdata;
  120. u32 inst_len;
  121. u32 data_len;
  122. int i;
  123. u32 done;
  124. u32 reg_offset;
  125. int ret;
  126. IWL_DEBUG_INFO("Begin load bsm\n");
  127. priv->ucode_type = UCODE_RT;
  128. /* make sure bootstrap program is no larger than BSM's SRAM size */
  129. if (len > IWL_MAX_BSM_SIZE)
  130. return -EINVAL;
  131. /* Tell bootstrap uCode where to find the "Initialize" uCode
  132. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  133. * NOTE: iwl_init_alive_start() will replace these values,
  134. * after the "initialize" uCode has run, to point to
  135. * runtime/protocol instructions and backup data cache.
  136. */
  137. pinst = priv->ucode_init.p_addr >> 4;
  138. pdata = priv->ucode_init_data.p_addr >> 4;
  139. inst_len = priv->ucode_init.len;
  140. data_len = priv->ucode_init_data.len;
  141. ret = iwl_grab_nic_access(priv);
  142. if (ret)
  143. return ret;
  144. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  145. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  146. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  147. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  148. /* Fill BSM memory with bootstrap instructions */
  149. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  150. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  151. reg_offset += sizeof(u32), image++)
  152. _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
  153. ret = iwl4965_verify_bsm(priv);
  154. if (ret) {
  155. iwl_release_nic_access(priv);
  156. return ret;
  157. }
  158. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  159. iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  160. iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
  161. iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  162. /* Load bootstrap code into instruction SRAM now,
  163. * to prepare to load "initialize" uCode */
  164. iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
  165. /* Wait for load of bootstrap uCode to finish */
  166. for (i = 0; i < 100; i++) {
  167. done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
  168. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  169. break;
  170. udelay(10);
  171. }
  172. if (i < 100)
  173. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  174. else {
  175. IWL_ERROR("BSM write did not complete!\n");
  176. return -EIO;
  177. }
  178. /* Enable future boot loads whenever power management unit triggers it
  179. * (e.g. when powering back up after power-save shutdown) */
  180. iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
  181. iwl_release_nic_access(priv);
  182. return 0;
  183. }
  184. /**
  185. * iwl4965_set_ucode_ptrs - Set uCode address location
  186. *
  187. * Tell initialization uCode where to find runtime uCode.
  188. *
  189. * BSM registers initially contain pointers to initialization uCode.
  190. * We need to replace them to load runtime uCode inst and data,
  191. * and to save runtime data when powering down.
  192. */
  193. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  194. {
  195. dma_addr_t pinst;
  196. dma_addr_t pdata;
  197. unsigned long flags;
  198. int ret = 0;
  199. /* bits 35:4 for 4965 */
  200. pinst = priv->ucode_code.p_addr >> 4;
  201. pdata = priv->ucode_data_backup.p_addr >> 4;
  202. spin_lock_irqsave(&priv->lock, flags);
  203. ret = iwl_grab_nic_access(priv);
  204. if (ret) {
  205. spin_unlock_irqrestore(&priv->lock, flags);
  206. return ret;
  207. }
  208. /* Tell bootstrap uCode where to find image to load */
  209. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  210. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  211. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  212. priv->ucode_data.len);
  213. /* Inst bytecount must be last to set up, bit 31 signals uCode
  214. * that all new ptr/size info is in place */
  215. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  216. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  217. iwl_release_nic_access(priv);
  218. spin_unlock_irqrestore(&priv->lock, flags);
  219. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  220. return ret;
  221. }
  222. /**
  223. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  224. *
  225. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  226. *
  227. * The 4965 "initialize" ALIVE reply contains calibration data for:
  228. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  229. * (3945 does not contain this data).
  230. *
  231. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  232. */
  233. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  234. {
  235. /* Check alive response for "valid" sign from uCode */
  236. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  237. /* We had an error bringing up the hardware, so take it
  238. * all the way back down so we can try again */
  239. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  240. goto restart;
  241. }
  242. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  243. * This is a paranoid check, because we would not have gotten the
  244. * "initialize" alive if code weren't properly loaded. */
  245. if (iwl_verify_ucode(priv)) {
  246. /* Runtime instruction load was bad;
  247. * take it all the way back down so we can try again */
  248. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  249. goto restart;
  250. }
  251. /* Calculate temperature */
  252. priv->temperature = iwl4965_hw_get_temperature(priv);
  253. /* Send pointers to protocol/runtime uCode image ... init code will
  254. * load and launch runtime uCode, which will send us another "Alive"
  255. * notification. */
  256. IWL_DEBUG_INFO("Initialization Alive received.\n");
  257. if (iwl4965_set_ucode_ptrs(priv)) {
  258. /* Runtime instruction load won't happen;
  259. * take it all the way back down so we can try again */
  260. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  261. goto restart;
  262. }
  263. return;
  264. restart:
  265. queue_work(priv->workqueue, &priv->restart);
  266. }
  267. static int is_fat_channel(__le32 rxon_flags)
  268. {
  269. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  270. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  271. }
  272. /*
  273. * EEPROM handlers
  274. */
  275. static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
  276. {
  277. u16 eeprom_ver;
  278. u16 calib_ver;
  279. eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
  280. calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
  281. if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
  282. calib_ver < EEPROM_4965_TX_POWER_VERSION)
  283. goto err;
  284. return 0;
  285. err:
  286. IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
  287. eeprom_ver, EEPROM_4965_EEPROM_VERSION,
  288. calib_ver, EEPROM_4965_TX_POWER_VERSION);
  289. return -EINVAL;
  290. }
  291. int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
  292. {
  293. int ret;
  294. unsigned long flags;
  295. spin_lock_irqsave(&priv->lock, flags);
  296. ret = iwl_grab_nic_access(priv);
  297. if (ret) {
  298. spin_unlock_irqrestore(&priv->lock, flags);
  299. return ret;
  300. }
  301. if (src == IWL_PWR_SRC_VAUX) {
  302. u32 val;
  303. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  304. &val);
  305. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
  306. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  307. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  308. ~APMG_PS_CTRL_MSK_PWR_SRC);
  309. }
  310. } else {
  311. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  312. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  313. ~APMG_PS_CTRL_MSK_PWR_SRC);
  314. }
  315. iwl_release_nic_access(priv);
  316. spin_unlock_irqrestore(&priv->lock, flags);
  317. return ret;
  318. }
  319. /*
  320. * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
  321. * must be called under priv->lock and mac access
  322. */
  323. static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
  324. {
  325. iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
  326. }
  327. static int iwl4965_apm_init(struct iwl_priv *priv)
  328. {
  329. int ret = 0;
  330. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  331. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  332. /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
  333. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  334. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  335. /* set "initialization complete" bit to move adapter
  336. * D0U* --> D0A* state */
  337. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  338. /* wait for clock stabilization */
  339. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  340. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  341. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  342. if (ret < 0) {
  343. IWL_DEBUG_INFO("Failed to init the card\n");
  344. goto out;
  345. }
  346. ret = iwl_grab_nic_access(priv);
  347. if (ret)
  348. goto out;
  349. /* enable DMA */
  350. iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
  351. APMG_CLK_VAL_BSM_CLK_RQT);
  352. udelay(20);
  353. /* disable L1-Active */
  354. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  355. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  356. iwl_release_nic_access(priv);
  357. out:
  358. return ret;
  359. }
  360. static void iwl4965_nic_config(struct iwl_priv *priv)
  361. {
  362. unsigned long flags;
  363. u32 val;
  364. u16 radio_cfg;
  365. u8 val_link;
  366. spin_lock_irqsave(&priv->lock, flags);
  367. if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
  368. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  369. /* Enable No Snoop field */
  370. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  371. val & ~(1 << 11));
  372. }
  373. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  374. /* L1 is enabled by BIOS */
  375. if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
  376. /* diable L0S disabled L1A enabled */
  377. iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
  378. else
  379. /* L0S enabled L1A disabled */
  380. iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
  381. radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
  382. /* write radio config values to register */
  383. if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
  384. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  385. EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
  386. EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
  387. EEPROM_RF_CFG_DASH_MSK(radio_cfg));
  388. /* set CSR_HW_CONFIG_REG for uCode use */
  389. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  390. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  391. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  392. priv->calib_info = (struct iwl_eeprom_calib_info *)
  393. iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
  394. spin_unlock_irqrestore(&priv->lock, flags);
  395. }
  396. static int iwl4965_apm_stop_master(struct iwl_priv *priv)
  397. {
  398. int ret = 0;
  399. unsigned long flags;
  400. spin_lock_irqsave(&priv->lock, flags);
  401. /* set stop master bit */
  402. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  403. ret = iwl_poll_bit(priv, CSR_RESET,
  404. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  405. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  406. if (ret < 0)
  407. goto out;
  408. out:
  409. spin_unlock_irqrestore(&priv->lock, flags);
  410. IWL_DEBUG_INFO("stop master\n");
  411. return ret;
  412. }
  413. static void iwl4965_apm_stop(struct iwl_priv *priv)
  414. {
  415. unsigned long flags;
  416. iwl4965_apm_stop_master(priv);
  417. spin_lock_irqsave(&priv->lock, flags);
  418. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  419. udelay(10);
  420. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  421. spin_unlock_irqrestore(&priv->lock, flags);
  422. }
  423. static int iwl4965_apm_reset(struct iwl_priv *priv)
  424. {
  425. int ret = 0;
  426. unsigned long flags;
  427. iwl4965_apm_stop_master(priv);
  428. spin_lock_irqsave(&priv->lock, flags);
  429. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  430. udelay(10);
  431. /* FIXME: put here L1A -L0S w/a */
  432. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  433. ret = iwl_poll_bit(priv, CSR_RESET,
  434. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  435. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  436. if (ret)
  437. goto out;
  438. udelay(10);
  439. ret = iwl_grab_nic_access(priv);
  440. if (ret)
  441. goto out;
  442. /* Enable DMA and BSM Clock */
  443. iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
  444. APMG_CLK_VAL_BSM_CLK_RQT);
  445. udelay(10);
  446. /* disable L1A */
  447. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  448. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  449. iwl_release_nic_access(priv);
  450. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  451. wake_up_interruptible(&priv->wait_command_queue);
  452. out:
  453. spin_unlock_irqrestore(&priv->lock, flags);
  454. return ret;
  455. }
  456. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  457. * Called after every association, but this runs only once!
  458. * ... once chain noise is calibrated the first time, it's good forever. */
  459. static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
  460. {
  461. struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
  462. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
  463. struct iwl4965_calibration_cmd cmd;
  464. memset(&cmd, 0, sizeof(cmd));
  465. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  466. cmd.diff_gain_a = 0;
  467. cmd.diff_gain_b = 0;
  468. cmd.diff_gain_c = 0;
  469. if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  470. sizeof(cmd), &cmd))
  471. IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
  472. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  473. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  474. }
  475. }
  476. static void iwl4965_gain_computation(struct iwl_priv *priv,
  477. u32 *average_noise,
  478. u16 min_average_noise_antenna_i,
  479. u32 min_average_noise)
  480. {
  481. int i, ret;
  482. struct iwl_chain_noise_data *data = &priv->chain_noise_data;
  483. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  484. for (i = 0; i < NUM_RX_CHAINS; i++) {
  485. s32 delta_g = 0;
  486. if (!(data->disconn_array[i]) &&
  487. (data->delta_gain_code[i] ==
  488. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  489. delta_g = average_noise[i] - min_average_noise;
  490. data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
  491. data->delta_gain_code[i] =
  492. min(data->delta_gain_code[i],
  493. (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
  494. data->delta_gain_code[i] =
  495. (data->delta_gain_code[i] | (1 << 2));
  496. } else {
  497. data->delta_gain_code[i] = 0;
  498. }
  499. }
  500. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  501. data->delta_gain_code[0],
  502. data->delta_gain_code[1],
  503. data->delta_gain_code[2]);
  504. /* Differential gain gets sent to uCode only once */
  505. if (!data->radio_write) {
  506. struct iwl4965_calibration_cmd cmd;
  507. data->radio_write = 1;
  508. memset(&cmd, 0, sizeof(cmd));
  509. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  510. cmd.diff_gain_a = data->delta_gain_code[0];
  511. cmd.diff_gain_b = data->delta_gain_code[1];
  512. cmd.diff_gain_c = data->delta_gain_code[2];
  513. ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  514. sizeof(cmd), &cmd);
  515. if (ret)
  516. IWL_DEBUG_CALIB("fail sending cmd "
  517. "REPLY_PHY_CALIBRATION_CMD \n");
  518. /* TODO we might want recalculate
  519. * rx_chain in rxon cmd */
  520. /* Mark so we run this algo only once! */
  521. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  522. }
  523. data->chain_noise_a = 0;
  524. data->chain_noise_b = 0;
  525. data->chain_noise_c = 0;
  526. data->chain_signal_a = 0;
  527. data->chain_signal_b = 0;
  528. data->chain_signal_c = 0;
  529. data->beacon_count = 0;
  530. }
  531. static void iwl4965_bg_txpower_work(struct work_struct *work)
  532. {
  533. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  534. txpower_work);
  535. /* If a scan happened to start before we got here
  536. * then just return; the statistics notification will
  537. * kick off another scheduled work to compensate for
  538. * any temperature delta we missed here. */
  539. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  540. test_bit(STATUS_SCANNING, &priv->status))
  541. return;
  542. mutex_lock(&priv->mutex);
  543. /* Regardless of if we are assocaited, we must reconfigure the
  544. * TX power since frames can be sent on non-radar channels while
  545. * not associated */
  546. iwl4965_send_tx_power(priv);
  547. /* Update last_temperature to keep is_calib_needed from running
  548. * when it isn't needed... */
  549. priv->last_temperature = priv->temperature;
  550. mutex_unlock(&priv->mutex);
  551. }
  552. /*
  553. * Acquire priv->lock before calling this function !
  554. */
  555. static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
  556. {
  557. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  558. (index & 0xff) | (txq_id << 8));
  559. iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
  560. }
  561. /**
  562. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  563. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  564. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  565. *
  566. * NOTE: Acquire priv->lock before calling this function !
  567. */
  568. static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
  569. struct iwl_tx_queue *txq,
  570. int tx_fifo_id, int scd_retry)
  571. {
  572. int txq_id = txq->q.id;
  573. /* Find out whether to activate Tx queue */
  574. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  575. /* Set up and activate */
  576. iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
  577. (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  578. (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
  579. (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
  580. (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  581. IWL49_SCD_QUEUE_STTS_REG_MSK);
  582. txq->sched_retry = scd_retry;
  583. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  584. active ? "Activate" : "Deactivate",
  585. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  586. }
  587. static const u16 default_queue_to_tx_fifo[] = {
  588. IWL_TX_FIFO_AC3,
  589. IWL_TX_FIFO_AC2,
  590. IWL_TX_FIFO_AC1,
  591. IWL_TX_FIFO_AC0,
  592. IWL49_CMD_FIFO_NUM,
  593. IWL_TX_FIFO_HCCA_1,
  594. IWL_TX_FIFO_HCCA_2
  595. };
  596. static int iwl4965_alive_notify(struct iwl_priv *priv)
  597. {
  598. u32 a;
  599. int i = 0;
  600. unsigned long flags;
  601. int ret;
  602. spin_lock_irqsave(&priv->lock, flags);
  603. ret = iwl_grab_nic_access(priv);
  604. if (ret) {
  605. spin_unlock_irqrestore(&priv->lock, flags);
  606. return ret;
  607. }
  608. /* Clear 4965's internal Tx Scheduler data base */
  609. priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
  610. a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
  611. for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  612. iwl_write_targ_mem(priv, a, 0);
  613. for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
  614. iwl_write_targ_mem(priv, a, 0);
  615. for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
  616. iwl_write_targ_mem(priv, a, 0);
  617. /* Tel 4965 where to find Tx byte count tables */
  618. iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
  619. (priv->shared_phys +
  620. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  621. /* Disable chain mode for all queues */
  622. iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
  623. /* Initialize each Tx queue (including the command queue) */
  624. for (i = 0; i < priv->hw_params.max_txq_num; i++) {
  625. /* TFD circular buffer read/write indexes */
  626. iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
  627. iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  628. /* Max Tx Window size for Scheduler-ACK mode */
  629. iwl_write_targ_mem(priv, priv->scd_base_addr +
  630. IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
  631. (SCD_WIN_SIZE <<
  632. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  633. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  634. /* Frame limit */
  635. iwl_write_targ_mem(priv, priv->scd_base_addr +
  636. IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
  637. sizeof(u32),
  638. (SCD_FRAME_LIMIT <<
  639. IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  640. IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  641. }
  642. iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
  643. (1 << priv->hw_params.max_txq_num) - 1);
  644. /* Activate all Tx DMA/FIFO channels */
  645. priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
  646. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  647. /* Map each Tx/cmd queue to its corresponding fifo */
  648. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  649. int ac = default_queue_to_tx_fifo[i];
  650. iwl_txq_ctx_activate(priv, i);
  651. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  652. }
  653. iwl_release_nic_access(priv);
  654. spin_unlock_irqrestore(&priv->lock, flags);
  655. return ret;
  656. }
  657. static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
  658. .min_nrg_cck = 97,
  659. .max_nrg_cck = 0,
  660. .auto_corr_min_ofdm = 85,
  661. .auto_corr_min_ofdm_mrc = 170,
  662. .auto_corr_min_ofdm_x1 = 105,
  663. .auto_corr_min_ofdm_mrc_x1 = 220,
  664. .auto_corr_max_ofdm = 120,
  665. .auto_corr_max_ofdm_mrc = 210,
  666. .auto_corr_max_ofdm_x1 = 140,
  667. .auto_corr_max_ofdm_mrc_x1 = 270,
  668. .auto_corr_min_cck = 125,
  669. .auto_corr_max_cck = 200,
  670. .auto_corr_min_cck_mrc = 200,
  671. .auto_corr_max_cck_mrc = 400,
  672. .nrg_th_cck = 100,
  673. .nrg_th_ofdm = 100,
  674. };
  675. /**
  676. * iwl4965_hw_set_hw_params
  677. *
  678. * Called when initializing driver
  679. */
  680. static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
  681. {
  682. if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
  683. (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
  684. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  685. IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
  686. return -EINVAL;
  687. }
  688. priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
  689. priv->hw_params.first_ampdu_q = IWL49_FIRST_AMPDU_QUEUE;
  690. priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
  691. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  692. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  693. if (priv->cfg->mod_params->amsdu_size_8K)
  694. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  695. else
  696. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  697. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  698. priv->hw_params.max_stations = IWL4965_STATION_COUNT;
  699. priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
  700. priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
  701. priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
  702. priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
  703. priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
  704. priv->hw_params.tx_chains_num = 2;
  705. priv->hw_params.rx_chains_num = 2;
  706. priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
  707. priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
  708. priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
  709. priv->hw_params.sens = &iwl4965_sensitivity;
  710. return 0;
  711. }
  712. /* set card power command */
  713. static int iwl4965_set_power(struct iwl_priv *priv,
  714. void *cmd)
  715. {
  716. int ret = 0;
  717. ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
  718. sizeof(struct iwl4965_powertable_cmd),
  719. cmd, NULL);
  720. return ret;
  721. }
  722. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  723. {
  724. s32 sign = 1;
  725. if (num < 0) {
  726. sign = -sign;
  727. num = -num;
  728. }
  729. if (denom < 0) {
  730. sign = -sign;
  731. denom = -denom;
  732. }
  733. *res = 1;
  734. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  735. return 1;
  736. }
  737. /**
  738. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  739. *
  740. * Determines power supply voltage compensation for txpower calculations.
  741. * Returns number of 1/2-dB steps to subtract from gain table index,
  742. * to compensate for difference between power supply voltage during
  743. * factory measurements, vs. current power supply voltage.
  744. *
  745. * Voltage indication is higher for lower voltage.
  746. * Lower voltage requires more gain (lower gain table index).
  747. */
  748. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  749. s32 current_voltage)
  750. {
  751. s32 comp = 0;
  752. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  753. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  754. return 0;
  755. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  756. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  757. if (current_voltage > eeprom_voltage)
  758. comp *= 2;
  759. if ((comp < -2) || (comp > 2))
  760. comp = 0;
  761. return comp;
  762. }
  763. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  764. {
  765. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  766. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  767. return CALIB_CH_GROUP_5;
  768. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  769. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  770. return CALIB_CH_GROUP_1;
  771. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  772. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  773. return CALIB_CH_GROUP_2;
  774. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  775. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  776. return CALIB_CH_GROUP_3;
  777. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  778. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  779. return CALIB_CH_GROUP_4;
  780. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  781. return -1;
  782. }
  783. static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
  784. {
  785. s32 b = -1;
  786. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  787. if (priv->calib_info->band_info[b].ch_from == 0)
  788. continue;
  789. if ((channel >= priv->calib_info->band_info[b].ch_from)
  790. && (channel <= priv->calib_info->band_info[b].ch_to))
  791. break;
  792. }
  793. return b;
  794. }
  795. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  796. {
  797. s32 val;
  798. if (x2 == x1)
  799. return y1;
  800. else {
  801. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  802. return val + y2;
  803. }
  804. }
  805. /**
  806. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  807. *
  808. * Interpolates factory measurements from the two sample channels within a
  809. * sub-band, to apply to channel of interest. Interpolation is proportional to
  810. * differences in channel frequencies, which is proportional to differences
  811. * in channel number.
  812. */
  813. static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
  814. struct iwl_eeprom_calib_ch_info *chan_info)
  815. {
  816. s32 s = -1;
  817. u32 c;
  818. u32 m;
  819. const struct iwl_eeprom_calib_measure *m1;
  820. const struct iwl_eeprom_calib_measure *m2;
  821. struct iwl_eeprom_calib_measure *omeas;
  822. u32 ch_i1;
  823. u32 ch_i2;
  824. s = iwl4965_get_sub_band(priv, channel);
  825. if (s >= EEPROM_TX_POWER_BANDS) {
  826. IWL_ERROR("Tx Power can not find channel %d ", channel);
  827. return -1;
  828. }
  829. ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
  830. ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
  831. chan_info->ch_num = (u8) channel;
  832. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  833. channel, s, ch_i1, ch_i2);
  834. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  835. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  836. m1 = &(priv->calib_info->band_info[s].ch1.
  837. measurements[c][m]);
  838. m2 = &(priv->calib_info->band_info[s].ch2.
  839. measurements[c][m]);
  840. omeas = &(chan_info->measurements[c][m]);
  841. omeas->actual_pow =
  842. (u8) iwl4965_interpolate_value(channel, ch_i1,
  843. m1->actual_pow,
  844. ch_i2,
  845. m2->actual_pow);
  846. omeas->gain_idx =
  847. (u8) iwl4965_interpolate_value(channel, ch_i1,
  848. m1->gain_idx, ch_i2,
  849. m2->gain_idx);
  850. omeas->temperature =
  851. (u8) iwl4965_interpolate_value(channel, ch_i1,
  852. m1->temperature,
  853. ch_i2,
  854. m2->temperature);
  855. omeas->pa_det =
  856. (s8) iwl4965_interpolate_value(channel, ch_i1,
  857. m1->pa_det, ch_i2,
  858. m2->pa_det);
  859. IWL_DEBUG_TXPOWER
  860. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  861. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  862. IWL_DEBUG_TXPOWER
  863. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  864. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  865. IWL_DEBUG_TXPOWER
  866. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  867. m1->pa_det, m2->pa_det, omeas->pa_det);
  868. IWL_DEBUG_TXPOWER
  869. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  870. m1->temperature, m2->temperature,
  871. omeas->temperature);
  872. }
  873. }
  874. return 0;
  875. }
  876. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  877. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  878. static s32 back_off_table[] = {
  879. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  880. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  881. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  882. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  883. 10 /* CCK */
  884. };
  885. /* Thermal compensation values for txpower for various frequency ranges ...
  886. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  887. static struct iwl4965_txpower_comp_entry {
  888. s32 degrees_per_05db_a;
  889. s32 degrees_per_05db_a_denom;
  890. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  891. {9, 2}, /* group 0 5.2, ch 34-43 */
  892. {4, 1}, /* group 1 5.2, ch 44-70 */
  893. {4, 1}, /* group 2 5.2, ch 71-124 */
  894. {4, 1}, /* group 3 5.2, ch 125-200 */
  895. {3, 1} /* group 4 2.4, ch all */
  896. };
  897. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  898. {
  899. if (!band) {
  900. if ((rate_power_index & 7) <= 4)
  901. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  902. }
  903. return MIN_TX_GAIN_INDEX;
  904. }
  905. struct gain_entry {
  906. u8 dsp;
  907. u8 radio;
  908. };
  909. static const struct gain_entry gain_table[2][108] = {
  910. /* 5.2GHz power gain index table */
  911. {
  912. {123, 0x3F}, /* highest txpower */
  913. {117, 0x3F},
  914. {110, 0x3F},
  915. {104, 0x3F},
  916. {98, 0x3F},
  917. {110, 0x3E},
  918. {104, 0x3E},
  919. {98, 0x3E},
  920. {110, 0x3D},
  921. {104, 0x3D},
  922. {98, 0x3D},
  923. {110, 0x3C},
  924. {104, 0x3C},
  925. {98, 0x3C},
  926. {110, 0x3B},
  927. {104, 0x3B},
  928. {98, 0x3B},
  929. {110, 0x3A},
  930. {104, 0x3A},
  931. {98, 0x3A},
  932. {110, 0x39},
  933. {104, 0x39},
  934. {98, 0x39},
  935. {110, 0x38},
  936. {104, 0x38},
  937. {98, 0x38},
  938. {110, 0x37},
  939. {104, 0x37},
  940. {98, 0x37},
  941. {110, 0x36},
  942. {104, 0x36},
  943. {98, 0x36},
  944. {110, 0x35},
  945. {104, 0x35},
  946. {98, 0x35},
  947. {110, 0x34},
  948. {104, 0x34},
  949. {98, 0x34},
  950. {110, 0x33},
  951. {104, 0x33},
  952. {98, 0x33},
  953. {110, 0x32},
  954. {104, 0x32},
  955. {98, 0x32},
  956. {110, 0x31},
  957. {104, 0x31},
  958. {98, 0x31},
  959. {110, 0x30},
  960. {104, 0x30},
  961. {98, 0x30},
  962. {110, 0x25},
  963. {104, 0x25},
  964. {98, 0x25},
  965. {110, 0x24},
  966. {104, 0x24},
  967. {98, 0x24},
  968. {110, 0x23},
  969. {104, 0x23},
  970. {98, 0x23},
  971. {110, 0x22},
  972. {104, 0x18},
  973. {98, 0x18},
  974. {110, 0x17},
  975. {104, 0x17},
  976. {98, 0x17},
  977. {110, 0x16},
  978. {104, 0x16},
  979. {98, 0x16},
  980. {110, 0x15},
  981. {104, 0x15},
  982. {98, 0x15},
  983. {110, 0x14},
  984. {104, 0x14},
  985. {98, 0x14},
  986. {110, 0x13},
  987. {104, 0x13},
  988. {98, 0x13},
  989. {110, 0x12},
  990. {104, 0x08},
  991. {98, 0x08},
  992. {110, 0x07},
  993. {104, 0x07},
  994. {98, 0x07},
  995. {110, 0x06},
  996. {104, 0x06},
  997. {98, 0x06},
  998. {110, 0x05},
  999. {104, 0x05},
  1000. {98, 0x05},
  1001. {110, 0x04},
  1002. {104, 0x04},
  1003. {98, 0x04},
  1004. {110, 0x03},
  1005. {104, 0x03},
  1006. {98, 0x03},
  1007. {110, 0x02},
  1008. {104, 0x02},
  1009. {98, 0x02},
  1010. {110, 0x01},
  1011. {104, 0x01},
  1012. {98, 0x01},
  1013. {110, 0x00},
  1014. {104, 0x00},
  1015. {98, 0x00},
  1016. {93, 0x00},
  1017. {88, 0x00},
  1018. {83, 0x00},
  1019. {78, 0x00},
  1020. },
  1021. /* 2.4GHz power gain index table */
  1022. {
  1023. {110, 0x3f}, /* highest txpower */
  1024. {104, 0x3f},
  1025. {98, 0x3f},
  1026. {110, 0x3e},
  1027. {104, 0x3e},
  1028. {98, 0x3e},
  1029. {110, 0x3d},
  1030. {104, 0x3d},
  1031. {98, 0x3d},
  1032. {110, 0x3c},
  1033. {104, 0x3c},
  1034. {98, 0x3c},
  1035. {110, 0x3b},
  1036. {104, 0x3b},
  1037. {98, 0x3b},
  1038. {110, 0x3a},
  1039. {104, 0x3a},
  1040. {98, 0x3a},
  1041. {110, 0x39},
  1042. {104, 0x39},
  1043. {98, 0x39},
  1044. {110, 0x38},
  1045. {104, 0x38},
  1046. {98, 0x38},
  1047. {110, 0x37},
  1048. {104, 0x37},
  1049. {98, 0x37},
  1050. {110, 0x36},
  1051. {104, 0x36},
  1052. {98, 0x36},
  1053. {110, 0x35},
  1054. {104, 0x35},
  1055. {98, 0x35},
  1056. {110, 0x34},
  1057. {104, 0x34},
  1058. {98, 0x34},
  1059. {110, 0x33},
  1060. {104, 0x33},
  1061. {98, 0x33},
  1062. {110, 0x32},
  1063. {104, 0x32},
  1064. {98, 0x32},
  1065. {110, 0x31},
  1066. {104, 0x31},
  1067. {98, 0x31},
  1068. {110, 0x30},
  1069. {104, 0x30},
  1070. {98, 0x30},
  1071. {110, 0x6},
  1072. {104, 0x6},
  1073. {98, 0x6},
  1074. {110, 0x5},
  1075. {104, 0x5},
  1076. {98, 0x5},
  1077. {110, 0x4},
  1078. {104, 0x4},
  1079. {98, 0x4},
  1080. {110, 0x3},
  1081. {104, 0x3},
  1082. {98, 0x3},
  1083. {110, 0x2},
  1084. {104, 0x2},
  1085. {98, 0x2},
  1086. {110, 0x1},
  1087. {104, 0x1},
  1088. {98, 0x1},
  1089. {110, 0x0},
  1090. {104, 0x0},
  1091. {98, 0x0},
  1092. {97, 0},
  1093. {96, 0},
  1094. {95, 0},
  1095. {94, 0},
  1096. {93, 0},
  1097. {92, 0},
  1098. {91, 0},
  1099. {90, 0},
  1100. {89, 0},
  1101. {88, 0},
  1102. {87, 0},
  1103. {86, 0},
  1104. {85, 0},
  1105. {84, 0},
  1106. {83, 0},
  1107. {82, 0},
  1108. {81, 0},
  1109. {80, 0},
  1110. {79, 0},
  1111. {78, 0},
  1112. {77, 0},
  1113. {76, 0},
  1114. {75, 0},
  1115. {74, 0},
  1116. {73, 0},
  1117. {72, 0},
  1118. {71, 0},
  1119. {70, 0},
  1120. {69, 0},
  1121. {68, 0},
  1122. {67, 0},
  1123. {66, 0},
  1124. {65, 0},
  1125. {64, 0},
  1126. {63, 0},
  1127. {62, 0},
  1128. {61, 0},
  1129. {60, 0},
  1130. {59, 0},
  1131. }
  1132. };
  1133. static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
  1134. u8 is_fat, u8 ctrl_chan_high,
  1135. struct iwl4965_tx_power_db *tx_power_tbl)
  1136. {
  1137. u8 saturation_power;
  1138. s32 target_power;
  1139. s32 user_target_power;
  1140. s32 power_limit;
  1141. s32 current_temp;
  1142. s32 reg_limit;
  1143. s32 current_regulatory;
  1144. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  1145. int i;
  1146. int c;
  1147. const struct iwl_channel_info *ch_info = NULL;
  1148. struct iwl_eeprom_calib_ch_info ch_eeprom_info;
  1149. const struct iwl_eeprom_calib_measure *measurement;
  1150. s16 voltage;
  1151. s32 init_voltage;
  1152. s32 voltage_compensation;
  1153. s32 degrees_per_05db_num;
  1154. s32 degrees_per_05db_denom;
  1155. s32 factory_temp;
  1156. s32 temperature_comp[2];
  1157. s32 factory_gain_index[2];
  1158. s32 factory_actual_pwr[2];
  1159. s32 power_index;
  1160. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  1161. * are used for indexing into txpower table) */
  1162. user_target_power = 2 * priv->tx_power_user_lmt;
  1163. /* Get current (RXON) channel, band, width */
  1164. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  1165. is_fat);
  1166. ch_info = iwl_get_channel_info(priv, priv->band, channel);
  1167. if (!is_channel_valid(ch_info))
  1168. return -EINVAL;
  1169. /* get txatten group, used to select 1) thermal txpower adjustment
  1170. * and 2) mimo txpower balance between Tx chains. */
  1171. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  1172. if (txatten_grp < 0)
  1173. return -EINVAL;
  1174. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  1175. channel, txatten_grp);
  1176. if (is_fat) {
  1177. if (ctrl_chan_high)
  1178. channel -= 2;
  1179. else
  1180. channel += 2;
  1181. }
  1182. /* hardware txpower limits ...
  1183. * saturation (clipping distortion) txpowers are in half-dBm */
  1184. if (band)
  1185. saturation_power = priv->calib_info->saturation_power24;
  1186. else
  1187. saturation_power = priv->calib_info->saturation_power52;
  1188. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  1189. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  1190. if (band)
  1191. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  1192. else
  1193. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  1194. }
  1195. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  1196. * max_power_avg values are in dBm, convert * 2 */
  1197. if (is_fat)
  1198. reg_limit = ch_info->fat_max_power_avg * 2;
  1199. else
  1200. reg_limit = ch_info->max_power_avg * 2;
  1201. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  1202. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  1203. if (band)
  1204. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  1205. else
  1206. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  1207. }
  1208. /* Interpolate txpower calibration values for this channel,
  1209. * based on factory calibration tests on spaced channels. */
  1210. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  1211. /* calculate tx gain adjustment based on power supply voltage */
  1212. voltage = priv->calib_info->voltage;
  1213. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  1214. voltage_compensation =
  1215. iwl4965_get_voltage_compensation(voltage, init_voltage);
  1216. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  1217. init_voltage,
  1218. voltage, voltage_compensation);
  1219. /* get current temperature (Celsius) */
  1220. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  1221. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  1222. current_temp = KELVIN_TO_CELSIUS(current_temp);
  1223. /* select thermal txpower adjustment params, based on channel group
  1224. * (same frequency group used for mimo txatten adjustment) */
  1225. degrees_per_05db_num =
  1226. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  1227. degrees_per_05db_denom =
  1228. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  1229. /* get per-chain txpower values from factory measurements */
  1230. for (c = 0; c < 2; c++) {
  1231. measurement = &ch_eeprom_info.measurements[c][1];
  1232. /* txgain adjustment (in half-dB steps) based on difference
  1233. * between factory and current temperature */
  1234. factory_temp = measurement->temperature;
  1235. iwl4965_math_div_round((current_temp - factory_temp) *
  1236. degrees_per_05db_denom,
  1237. degrees_per_05db_num,
  1238. &temperature_comp[c]);
  1239. factory_gain_index[c] = measurement->gain_idx;
  1240. factory_actual_pwr[c] = measurement->actual_pow;
  1241. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  1242. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  1243. "curr tmp %d, comp %d steps\n",
  1244. factory_temp, current_temp,
  1245. temperature_comp[c]);
  1246. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  1247. factory_gain_index[c],
  1248. factory_actual_pwr[c]);
  1249. }
  1250. /* for each of 33 bit-rates (including 1 for CCK) */
  1251. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  1252. u8 is_mimo_rate;
  1253. union iwl4965_tx_power_dual_stream tx_power;
  1254. /* for mimo, reduce each chain's txpower by half
  1255. * (3dB, 6 steps), so total output power is regulatory
  1256. * compliant. */
  1257. if (i & 0x8) {
  1258. current_regulatory = reg_limit -
  1259. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  1260. is_mimo_rate = 1;
  1261. } else {
  1262. current_regulatory = reg_limit;
  1263. is_mimo_rate = 0;
  1264. }
  1265. /* find txpower limit, either hardware or regulatory */
  1266. power_limit = saturation_power - back_off_table[i];
  1267. if (power_limit > current_regulatory)
  1268. power_limit = current_regulatory;
  1269. /* reduce user's txpower request if necessary
  1270. * for this rate on this channel */
  1271. target_power = user_target_power;
  1272. if (target_power > power_limit)
  1273. target_power = power_limit;
  1274. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  1275. i, saturation_power - back_off_table[i],
  1276. current_regulatory, user_target_power,
  1277. target_power);
  1278. /* for each of 2 Tx chains (radio transmitters) */
  1279. for (c = 0; c < 2; c++) {
  1280. s32 atten_value;
  1281. if (is_mimo_rate)
  1282. atten_value =
  1283. (s32)le32_to_cpu(priv->card_alive_init.
  1284. tx_atten[txatten_grp][c]);
  1285. else
  1286. atten_value = 0;
  1287. /* calculate index; higher index means lower txpower */
  1288. power_index = (u8) (factory_gain_index[c] -
  1289. (target_power -
  1290. factory_actual_pwr[c]) -
  1291. temperature_comp[c] -
  1292. voltage_compensation +
  1293. atten_value);
  1294. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  1295. power_index); */
  1296. if (power_index < get_min_power_index(i, band))
  1297. power_index = get_min_power_index(i, band);
  1298. /* adjust 5 GHz index to support negative indexes */
  1299. if (!band)
  1300. power_index += 9;
  1301. /* CCK, rate 32, reduce txpower for CCK */
  1302. if (i == POWER_TABLE_CCK_ENTRY)
  1303. power_index +=
  1304. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  1305. /* stay within the table! */
  1306. if (power_index > 107) {
  1307. IWL_WARNING("txpower index %d > 107\n",
  1308. power_index);
  1309. power_index = 107;
  1310. }
  1311. if (power_index < 0) {
  1312. IWL_WARNING("txpower index %d < 0\n",
  1313. power_index);
  1314. power_index = 0;
  1315. }
  1316. /* fill txpower command for this rate/chain */
  1317. tx_power.s.radio_tx_gain[c] =
  1318. gain_table[band][power_index].radio;
  1319. tx_power.s.dsp_predis_atten[c] =
  1320. gain_table[band][power_index].dsp;
  1321. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  1322. "gain 0x%02x dsp %d\n",
  1323. c, atten_value, power_index,
  1324. tx_power.s.radio_tx_gain[c],
  1325. tx_power.s.dsp_predis_atten[c]);
  1326. }/* for each chain */
  1327. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  1328. }/* for each rate */
  1329. return 0;
  1330. }
  1331. /**
  1332. * iwl4965_send_tx_power - Configure the TXPOWER level user limit
  1333. *
  1334. * Uses the active RXON for channel, band, and characteristics (fat, high)
  1335. * The power limit is taken from priv->tx_power_user_lmt.
  1336. */
  1337. static int iwl4965_send_tx_power(struct iwl_priv *priv)
  1338. {
  1339. struct iwl4965_txpowertable_cmd cmd = { 0 };
  1340. int ret;
  1341. u8 band = 0;
  1342. u8 is_fat = 0;
  1343. u8 ctrl_chan_high = 0;
  1344. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1345. /* If this gets hit a lot, switch it to a BUG() and catch
  1346. * the stack trace to find out who is calling this during
  1347. * a scan. */
  1348. IWL_WARNING("TX Power requested while scanning!\n");
  1349. return -EAGAIN;
  1350. }
  1351. band = priv->band == IEEE80211_BAND_2GHZ;
  1352. is_fat = is_fat_channel(priv->active_rxon.flags);
  1353. if (is_fat &&
  1354. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1355. ctrl_chan_high = 1;
  1356. cmd.band = band;
  1357. cmd.channel = priv->active_rxon.channel;
  1358. ret = iwl4965_fill_txpower_tbl(priv, band,
  1359. le16_to_cpu(priv->active_rxon.channel),
  1360. is_fat, ctrl_chan_high, &cmd.tx_power);
  1361. if (ret)
  1362. goto out;
  1363. ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  1364. out:
  1365. return ret;
  1366. }
  1367. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  1368. {
  1369. int ret = 0;
  1370. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  1371. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  1372. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  1373. if ((rxon1->flags == rxon2->flags) &&
  1374. (rxon1->filter_flags == rxon2->filter_flags) &&
  1375. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  1376. (rxon1->ofdm_ht_single_stream_basic_rates ==
  1377. rxon2->ofdm_ht_single_stream_basic_rates) &&
  1378. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  1379. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  1380. (rxon1->rx_chain == rxon2->rx_chain) &&
  1381. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  1382. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  1383. return 0;
  1384. }
  1385. rxon_assoc.flags = priv->staging_rxon.flags;
  1386. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  1387. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  1388. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  1389. rxon_assoc.reserved = 0;
  1390. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  1391. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  1392. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  1393. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  1394. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  1395. ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
  1396. sizeof(rxon_assoc), &rxon_assoc, NULL);
  1397. if (ret)
  1398. return ret;
  1399. return ret;
  1400. }
  1401. int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
  1402. {
  1403. int rc;
  1404. u8 band = 0;
  1405. u8 is_fat = 0;
  1406. u8 ctrl_chan_high = 0;
  1407. struct iwl4965_channel_switch_cmd cmd = { 0 };
  1408. const struct iwl_channel_info *ch_info;
  1409. band = priv->band == IEEE80211_BAND_2GHZ;
  1410. ch_info = iwl_get_channel_info(priv, priv->band, channel);
  1411. is_fat = is_fat_channel(priv->staging_rxon.flags);
  1412. if (is_fat &&
  1413. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1414. ctrl_chan_high = 1;
  1415. cmd.band = band;
  1416. cmd.expect_beacon = 0;
  1417. cmd.channel = cpu_to_le16(channel);
  1418. cmd.rxon_flags = priv->active_rxon.flags;
  1419. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  1420. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  1421. if (ch_info)
  1422. cmd.expect_beacon = is_channel_radar(ch_info);
  1423. else
  1424. cmd.expect_beacon = 1;
  1425. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  1426. ctrl_chan_high, &cmd.tx_power);
  1427. if (rc) {
  1428. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  1429. return rc;
  1430. }
  1431. rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  1432. return rc;
  1433. }
  1434. static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
  1435. {
  1436. struct iwl4965_shared *s = priv->shared_virt;
  1437. return le32_to_cpu(s->rb_closed) & 0xFFF;
  1438. }
  1439. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
  1440. struct iwl_frame *frame, u8 rate)
  1441. {
  1442. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  1443. unsigned int frame_size;
  1444. tx_beacon_cmd = &frame->u.beacon;
  1445. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  1446. tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
  1447. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1448. frame_size = iwl4965_fill_beacon_frame(priv,
  1449. tx_beacon_cmd->frame,
  1450. iwl_bcast_addr,
  1451. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  1452. BUG_ON(frame_size > MAX_MPDU_SIZE);
  1453. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  1454. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  1455. tx_beacon_cmd->tx.rate_n_flags =
  1456. iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  1457. else
  1458. tx_beacon_cmd->tx.rate_n_flags =
  1459. iwl_hw_set_rate_n_flags(rate, 0);
  1460. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  1461. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  1462. return (sizeof(*tx_beacon_cmd) + frame_size);
  1463. }
  1464. static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
  1465. {
  1466. priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
  1467. sizeof(struct iwl4965_shared),
  1468. &priv->shared_phys);
  1469. if (!priv->shared_virt)
  1470. return -ENOMEM;
  1471. memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
  1472. priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
  1473. return 0;
  1474. }
  1475. static void iwl4965_free_shared_mem(struct iwl_priv *priv)
  1476. {
  1477. if (priv->shared_virt)
  1478. pci_free_consistent(priv->pci_dev,
  1479. sizeof(struct iwl4965_shared),
  1480. priv->shared_virt,
  1481. priv->shared_phys);
  1482. }
  1483. /**
  1484. * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  1485. */
  1486. static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
  1487. struct iwl_tx_queue *txq,
  1488. u16 byte_cnt)
  1489. {
  1490. int len;
  1491. int txq_id = txq->q.id;
  1492. struct iwl4965_shared *shared_data = priv->shared_virt;
  1493. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  1494. /* Set up byte count within first 256 entries */
  1495. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  1496. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  1497. /* If within first 64 entries, duplicate at end */
  1498. if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
  1499. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  1500. tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
  1501. byte_cnt, len);
  1502. }
  1503. /**
  1504. * sign_extend - Sign extend a value using specified bit as sign-bit
  1505. *
  1506. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  1507. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  1508. *
  1509. * @param oper value to sign extend
  1510. * @param index 0 based bit index (0<=index<32) to sign bit
  1511. */
  1512. static s32 sign_extend(u32 oper, int index)
  1513. {
  1514. u8 shift = 31 - index;
  1515. return (s32)(oper << shift) >> shift;
  1516. }
  1517. /**
  1518. * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
  1519. * @statistics: Provides the temperature reading from the uCode
  1520. *
  1521. * A return of <0 indicates bogus data in the statistics
  1522. */
  1523. static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
  1524. {
  1525. s32 temperature;
  1526. s32 vt;
  1527. s32 R1, R2, R3;
  1528. u32 R4;
  1529. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  1530. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  1531. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  1532. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  1533. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  1534. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  1535. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  1536. } else {
  1537. IWL_DEBUG_TEMP("Running temperature calibration\n");
  1538. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  1539. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  1540. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  1541. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  1542. }
  1543. /*
  1544. * Temperature is only 23 bits, so sign extend out to 32.
  1545. *
  1546. * NOTE If we haven't received a statistics notification yet
  1547. * with an updated temperature, use R4 provided to us in the
  1548. * "initialize" ALIVE response.
  1549. */
  1550. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  1551. vt = sign_extend(R4, 23);
  1552. else
  1553. vt = sign_extend(
  1554. le32_to_cpu(priv->statistics.general.temperature), 23);
  1555. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
  1556. if (R3 == R1) {
  1557. IWL_ERROR("Calibration conflict R1 == R3\n");
  1558. return -1;
  1559. }
  1560. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  1561. * Add offset to center the adjustment around 0 degrees Centigrade. */
  1562. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  1563. temperature /= (R3 - R1);
  1564. temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
  1565. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
  1566. temperature, KELVIN_TO_CELSIUS(temperature));
  1567. return temperature;
  1568. }
  1569. /* Adjust Txpower only if temperature variance is greater than threshold. */
  1570. #define IWL_TEMPERATURE_THRESHOLD 3
  1571. /**
  1572. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  1573. *
  1574. * If the temperature changed has changed sufficiently, then a recalibration
  1575. * is needed.
  1576. *
  1577. * Assumes caller will replace priv->last_temperature once calibration
  1578. * executed.
  1579. */
  1580. static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
  1581. {
  1582. int temp_diff;
  1583. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  1584. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  1585. return 0;
  1586. }
  1587. temp_diff = priv->temperature - priv->last_temperature;
  1588. /* get absolute value */
  1589. if (temp_diff < 0) {
  1590. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  1591. temp_diff = -temp_diff;
  1592. } else if (temp_diff == 0)
  1593. IWL_DEBUG_POWER("Same temp, \n");
  1594. else
  1595. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  1596. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  1597. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  1598. return 0;
  1599. }
  1600. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  1601. return 1;
  1602. }
  1603. static void iwl4965_temperature_calib(struct iwl_priv *priv,
  1604. struct iwl_notif_statistics *stats)
  1605. {
  1606. s32 temp;
  1607. int change = ((priv->statistics.general.temperature !=
  1608. stats->general.temperature) ||
  1609. ((priv->statistics.flag &
  1610. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  1611. (stats->flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  1612. /* If the hardware hasn't reported a change in
  1613. * temperature then don't bother computing a
  1614. * calibrated temperature value */
  1615. if (!change)
  1616. return;
  1617. temp = iwl4965_hw_get_temperature(priv);
  1618. if (temp < 0)
  1619. return;
  1620. if (priv->temperature != temp) {
  1621. if (priv->temperature)
  1622. IWL_DEBUG_TEMP("Temperature changed "
  1623. "from %dC to %dC\n",
  1624. KELVIN_TO_CELSIUS(priv->temperature),
  1625. KELVIN_TO_CELSIUS(temp));
  1626. else
  1627. IWL_DEBUG_TEMP("Temperature "
  1628. "initialized to %dC\n",
  1629. KELVIN_TO_CELSIUS(temp));
  1630. }
  1631. priv->temperature = temp;
  1632. set_bit(STATUS_TEMPERATURE, &priv->status);
  1633. if (!priv->disable_tx_power_cal &&
  1634. unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  1635. iwl4965_is_temp_calib_needed(priv))
  1636. queue_work(priv->workqueue, &priv->txpower_work);
  1637. }
  1638. static void iwl4965_add_radiotap(struct iwl_priv *priv,
  1639. struct sk_buff *skb,
  1640. struct iwl4965_rx_phy_res *rx_start,
  1641. struct ieee80211_rx_status *stats,
  1642. u32 ampdu_status)
  1643. {
  1644. s8 signal = stats->signal;
  1645. s8 noise = 0;
  1646. int rate = stats->rate_idx;
  1647. u64 tsf = stats->mactime;
  1648. __le16 antenna;
  1649. __le16 phy_flags_hw = rx_start->phy_flags;
  1650. struct iwl4965_rt_rx_hdr {
  1651. struct ieee80211_radiotap_header rt_hdr;
  1652. __le64 rt_tsf; /* TSF */
  1653. u8 rt_flags; /* radiotap packet flags */
  1654. u8 rt_rate; /* rate in 500kb/s */
  1655. __le16 rt_channelMHz; /* channel in MHz */
  1656. __le16 rt_chbitmask; /* channel bitfield */
  1657. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  1658. s8 rt_dbmnoise;
  1659. u8 rt_antenna; /* antenna number */
  1660. } __attribute__ ((packed)) *iwl4965_rt;
  1661. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  1662. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  1663. if (net_ratelimit())
  1664. printk(KERN_ERR "not enough headroom [%d] for "
  1665. "radiotap head [%zd]\n",
  1666. skb_headroom(skb), sizeof(*iwl4965_rt));
  1667. return;
  1668. }
  1669. /* put radiotap header in front of 802.11 header and data */
  1670. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  1671. /* initialise radiotap header */
  1672. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  1673. iwl4965_rt->rt_hdr.it_pad = 0;
  1674. /* total header + data */
  1675. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  1676. &iwl4965_rt->rt_hdr.it_len);
  1677. /* Indicate all the fields we add to the radiotap header */
  1678. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  1679. (1 << IEEE80211_RADIOTAP_FLAGS) |
  1680. (1 << IEEE80211_RADIOTAP_RATE) |
  1681. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  1682. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  1683. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  1684. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  1685. &iwl4965_rt->rt_hdr.it_present);
  1686. /* Zero the flags, we'll add to them as we go */
  1687. iwl4965_rt->rt_flags = 0;
  1688. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  1689. iwl4965_rt->rt_dbmsignal = signal;
  1690. iwl4965_rt->rt_dbmnoise = noise;
  1691. /* Convert the channel frequency and set the flags */
  1692. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  1693. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  1694. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  1695. IEEE80211_CHAN_5GHZ),
  1696. &iwl4965_rt->rt_chbitmask);
  1697. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  1698. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  1699. IEEE80211_CHAN_2GHZ),
  1700. &iwl4965_rt->rt_chbitmask);
  1701. else /* 802.11g */
  1702. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  1703. IEEE80211_CHAN_2GHZ),
  1704. &iwl4965_rt->rt_chbitmask);
  1705. if (rate == -1)
  1706. iwl4965_rt->rt_rate = 0;
  1707. else
  1708. iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
  1709. /*
  1710. * "antenna number"
  1711. *
  1712. * It seems that the antenna field in the phy flags value
  1713. * is actually a bitfield. This is undefined by radiotap,
  1714. * it wants an actual antenna number but I always get "7"
  1715. * for most legacy frames I receive indicating that the
  1716. * same frame was received on all three RX chains.
  1717. *
  1718. * I think this field should be removed in favour of a
  1719. * new 802.11n radiotap field "RX chains" that is defined
  1720. * as a bitmask.
  1721. */
  1722. antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
  1723. iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
  1724. /* set the preamble flag if appropriate */
  1725. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  1726. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  1727. stats->flag |= RX_FLAG_RADIOTAP;
  1728. }
  1729. static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1730. {
  1731. /* 0 - mgmt, 1 - cnt, 2 - data */
  1732. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1733. priv->rx_stats[idx].cnt++;
  1734. priv->rx_stats[idx].bytes += len;
  1735. }
  1736. /*
  1737. * returns non-zero if packet should be dropped
  1738. */
  1739. static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
  1740. struct ieee80211_hdr *hdr,
  1741. u32 decrypt_res,
  1742. struct ieee80211_rx_status *stats)
  1743. {
  1744. u16 fc = le16_to_cpu(hdr->frame_control);
  1745. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1746. return 0;
  1747. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1748. return 0;
  1749. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1750. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1751. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1752. /* The uCode has got a bad phase 1 Key, pushes the packet.
  1753. * Decryption will be done in SW. */
  1754. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1755. RX_RES_STATUS_BAD_KEY_TTAK)
  1756. break;
  1757. case RX_RES_STATUS_SEC_TYPE_WEP:
  1758. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1759. RX_RES_STATUS_BAD_ICV_MIC) {
  1760. /* bad ICV, the packet is destroyed since the
  1761. * decryption is inplace, drop it */
  1762. IWL_DEBUG_RX("Packet destroyed\n");
  1763. return -1;
  1764. }
  1765. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1766. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1767. RX_RES_STATUS_DECRYPT_OK) {
  1768. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1769. stats->flag |= RX_FLAG_DECRYPTED;
  1770. }
  1771. break;
  1772. default:
  1773. break;
  1774. }
  1775. return 0;
  1776. }
  1777. static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
  1778. {
  1779. u32 decrypt_out = 0;
  1780. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  1781. RX_RES_STATUS_STATION_FOUND)
  1782. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  1783. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  1784. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  1785. /* packet was not encrypted */
  1786. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  1787. RX_RES_STATUS_SEC_TYPE_NONE)
  1788. return decrypt_out;
  1789. /* packet was encrypted with unknown alg */
  1790. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  1791. RX_RES_STATUS_SEC_TYPE_ERR)
  1792. return decrypt_out;
  1793. /* decryption was not done in HW */
  1794. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  1795. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  1796. return decrypt_out;
  1797. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  1798. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1799. /* alg is CCM: check MIC only */
  1800. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  1801. /* Bad MIC */
  1802. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  1803. else
  1804. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  1805. break;
  1806. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1807. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  1808. /* Bad TTAK */
  1809. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  1810. break;
  1811. }
  1812. /* fall through if TTAK OK */
  1813. default:
  1814. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  1815. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  1816. else
  1817. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  1818. break;
  1819. };
  1820. IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
  1821. decrypt_in, decrypt_out);
  1822. return decrypt_out;
  1823. }
  1824. static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
  1825. int include_phy,
  1826. struct iwl_rx_mem_buffer *rxb,
  1827. struct ieee80211_rx_status *stats)
  1828. {
  1829. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1830. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  1831. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  1832. struct ieee80211_hdr *hdr;
  1833. u16 len;
  1834. __le32 *rx_end;
  1835. unsigned int skblen;
  1836. u32 ampdu_status;
  1837. u32 ampdu_status_legacy;
  1838. if (!include_phy && priv->last_phy_res[0])
  1839. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  1840. if (!rx_start) {
  1841. IWL_ERROR("MPDU frame without a PHY data\n");
  1842. return;
  1843. }
  1844. if (include_phy) {
  1845. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  1846. rx_start->cfg_phy_cnt);
  1847. len = le16_to_cpu(rx_start->byte_count);
  1848. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  1849. sizeof(struct iwl4965_rx_phy_res) +
  1850. rx_start->cfg_phy_cnt + len);
  1851. } else {
  1852. struct iwl4965_rx_mpdu_res_start *amsdu =
  1853. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  1854. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  1855. sizeof(struct iwl4965_rx_mpdu_res_start));
  1856. len = le16_to_cpu(amsdu->byte_count);
  1857. rx_start->byte_count = amsdu->byte_count;
  1858. rx_end = (__le32 *) (((u8 *) hdr) + len);
  1859. }
  1860. /* In monitor mode allow 802.11 ACk frames (10 bytes) */
  1861. if (len > priv->hw_params.max_pkt_size ||
  1862. len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
  1863. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  1864. return;
  1865. }
  1866. ampdu_status = le32_to_cpu(*rx_end);
  1867. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  1868. if (!include_phy) {
  1869. /* New status scheme, need to translate */
  1870. ampdu_status_legacy = ampdu_status;
  1871. ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
  1872. }
  1873. /* start from MAC */
  1874. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  1875. skb_put(rxb->skb, len); /* end where data ends */
  1876. /* We only process data packets if the interface is open */
  1877. if (unlikely(!priv->is_open)) {
  1878. IWL_DEBUG_DROP_LIMIT
  1879. ("Dropping packet while interface is not open.\n");
  1880. return;
  1881. }
  1882. stats->flag = 0;
  1883. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  1884. /* in case of HW accelerated crypto and bad decryption, drop */
  1885. if (!priv->hw_params.sw_crypto &&
  1886. iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
  1887. return;
  1888. if (priv->add_radiotap)
  1889. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  1890. iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
  1891. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  1892. priv->alloc_rxb_skb--;
  1893. rxb->skb = NULL;
  1894. }
  1895. /* Calc max signal level (dBm) among 3 possible receivers */
  1896. static int iwl4965_calc_rssi(struct iwl_priv *priv,
  1897. struct iwl4965_rx_phy_res *rx_resp)
  1898. {
  1899. /* data from PHY/DSP regarding signal strength, etc.,
  1900. * contents are always there, not configurable by host. */
  1901. struct iwl4965_rx_non_cfg_phy *ncphy =
  1902. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  1903. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  1904. >> IWL_AGC_DB_POS;
  1905. u32 valid_antennae =
  1906. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  1907. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  1908. u8 max_rssi = 0;
  1909. u32 i;
  1910. /* Find max rssi among 3 possible receivers.
  1911. * These values are measured by the digital signal processor (DSP).
  1912. * They should stay fairly constant even as the signal strength varies,
  1913. * if the radio's automatic gain control (AGC) is working right.
  1914. * AGC value (see below) will provide the "interesting" info. */
  1915. for (i = 0; i < 3; i++)
  1916. if (valid_antennae & (1 << i))
  1917. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  1918. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  1919. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  1920. max_rssi, agc);
  1921. /* dBm = max_rssi dB - agc dB - constant.
  1922. * Higher AGC (higher radio gain) means lower signal. */
  1923. return (max_rssi - agc - IWL_RSSI_OFFSET);
  1924. }
  1925. static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
  1926. {
  1927. unsigned long flags;
  1928. spin_lock_irqsave(&priv->sta_lock, flags);
  1929. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  1930. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  1931. priv->stations[sta_id].sta.sta.modify_mask = 0;
  1932. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1933. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1934. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  1935. }
  1936. static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
  1937. {
  1938. /* FIXME: need locking over ps_status ??? */
  1939. u8 sta_id = iwl_find_station(priv, addr);
  1940. if (sta_id != IWL_INVALID_STATION) {
  1941. u8 sta_awake = priv->stations[sta_id].
  1942. ps_status == STA_PS_STATUS_WAKE;
  1943. if (sta_awake && ps_bit)
  1944. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  1945. else if (!sta_awake && !ps_bit) {
  1946. iwl4965_sta_modify_ps_wake(priv, sta_id);
  1947. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  1948. }
  1949. }
  1950. }
  1951. #ifdef CONFIG_IWLWIFI_DEBUG
  1952. /**
  1953. * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
  1954. *
  1955. * You may hack this function to show different aspects of received frames,
  1956. * including selective frame dumps.
  1957. * group100 parameter selects whether to show 1 out of 100 good frames.
  1958. *
  1959. * TODO: This was originally written for 3945, need to audit for
  1960. * proper operation with 4965.
  1961. */
  1962. static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  1963. struct iwl_rx_packet *pkt,
  1964. struct ieee80211_hdr *header, int group100)
  1965. {
  1966. u32 to_us;
  1967. u32 print_summary = 0;
  1968. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1969. u32 hundred = 0;
  1970. u32 dataframe = 0;
  1971. __le16 fc;
  1972. u16 seq_ctl;
  1973. u16 channel;
  1974. u16 phy_flags;
  1975. int rate_sym;
  1976. u16 length;
  1977. u16 status;
  1978. u16 bcn_tmr;
  1979. u32 tsf_low;
  1980. u64 tsf;
  1981. u8 rssi;
  1982. u8 agc;
  1983. u16 sig_avg;
  1984. u16 noise_diff;
  1985. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1986. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1987. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1988. u8 *data = IWL_RX_DATA(pkt);
  1989. if (likely(!(priv->debug_level & IWL_DL_RX)))
  1990. return;
  1991. /* MAC header */
  1992. fc = header->frame_control;
  1993. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1994. /* metadata */
  1995. channel = le16_to_cpu(rx_hdr->channel);
  1996. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1997. rate_sym = rx_hdr->rate;
  1998. length = le16_to_cpu(rx_hdr->len);
  1999. /* end-of-frame status and timestamp */
  2000. status = le32_to_cpu(rx_end->status);
  2001. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  2002. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  2003. tsf = le64_to_cpu(rx_end->timestamp);
  2004. /* signal statistics */
  2005. rssi = rx_stats->rssi;
  2006. agc = rx_stats->agc;
  2007. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  2008. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  2009. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  2010. /* if data frame is to us and all is good,
  2011. * (optionally) print summary for only 1 out of every 100 */
  2012. if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
  2013. cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  2014. dataframe = 1;
  2015. if (!group100)
  2016. print_summary = 1; /* print each frame */
  2017. else if (priv->framecnt_to_us < 100) {
  2018. priv->framecnt_to_us++;
  2019. print_summary = 0;
  2020. } else {
  2021. priv->framecnt_to_us = 0;
  2022. print_summary = 1;
  2023. hundred = 1;
  2024. }
  2025. } else {
  2026. /* print summary for all other frames */
  2027. print_summary = 1;
  2028. }
  2029. if (print_summary) {
  2030. char *title;
  2031. int rate_idx;
  2032. u32 bitrate;
  2033. if (hundred)
  2034. title = "100Frames";
  2035. else if (ieee80211_has_retry(fc))
  2036. title = "Retry";
  2037. else if (ieee80211_is_assoc_resp(fc))
  2038. title = "AscRsp";
  2039. else if (ieee80211_is_reassoc_resp(fc))
  2040. title = "RasRsp";
  2041. else if (ieee80211_is_probe_resp(fc)) {
  2042. title = "PrbRsp";
  2043. print_dump = 1; /* dump frame contents */
  2044. } else if (ieee80211_is_beacon(fc)) {
  2045. title = "Beacon";
  2046. print_dump = 1; /* dump frame contents */
  2047. } else if (ieee80211_is_atim(fc))
  2048. title = "ATIM";
  2049. else if (ieee80211_is_auth(fc))
  2050. title = "Auth";
  2051. else if (ieee80211_is_deauth(fc))
  2052. title = "DeAuth";
  2053. else if (ieee80211_is_disassoc(fc))
  2054. title = "DisAssoc";
  2055. else
  2056. title = "Frame";
  2057. rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
  2058. if (unlikely(rate_idx == -1))
  2059. bitrate = 0;
  2060. else
  2061. bitrate = iwl_rates[rate_idx].ieee / 2;
  2062. /* print frame summary.
  2063. * MAC addresses show just the last byte (for brevity),
  2064. * but you can hack it to show more, if you'd like to. */
  2065. if (dataframe)
  2066. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  2067. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  2068. title, le16_to_cpu(fc), header->addr1[5],
  2069. length, rssi, channel, bitrate);
  2070. else {
  2071. /* src/dst addresses assume managed mode */
  2072. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  2073. "src=0x%02x, rssi=%u, tim=%lu usec, "
  2074. "phy=0x%02x, chnl=%d\n",
  2075. title, le16_to_cpu(fc), header->addr1[5],
  2076. header->addr3[5], rssi,
  2077. tsf_low - priv->scan_start_tsf,
  2078. phy_flags, channel);
  2079. }
  2080. }
  2081. if (print_dump)
  2082. iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
  2083. }
  2084. #else
  2085. static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  2086. struct iwl_rx_packet *pkt,
  2087. struct ieee80211_hdr *header,
  2088. int group100)
  2089. {
  2090. }
  2091. #endif
  2092. /* Called for REPLY_RX (legacy ABG frames), or
  2093. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  2094. void iwl4965_rx_reply_rx(struct iwl_priv *priv,
  2095. struct iwl_rx_mem_buffer *rxb)
  2096. {
  2097. struct ieee80211_hdr *header;
  2098. struct ieee80211_rx_status rx_status;
  2099. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2100. /* Use phy data (Rx signal strength, etc.) contained within
  2101. * this rx packet for legacy frames,
  2102. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  2103. int include_phy = (pkt->hdr.cmd == REPLY_RX);
  2104. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2105. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  2106. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2107. __le32 *rx_end;
  2108. unsigned int len = 0;
  2109. u16 fc;
  2110. u8 network_packet;
  2111. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  2112. rx_status.freq =
  2113. ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
  2114. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  2115. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  2116. rx_status.rate_idx =
  2117. iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
  2118. if (rx_status.band == IEEE80211_BAND_5GHZ)
  2119. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  2120. rx_status.antenna = 0;
  2121. rx_status.flag = 0;
  2122. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  2123. IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
  2124. rx_start->cfg_phy_cnt);
  2125. return;
  2126. }
  2127. if (!include_phy) {
  2128. if (priv->last_phy_res[0])
  2129. rx_start = (struct iwl4965_rx_phy_res *)
  2130. &priv->last_phy_res[1];
  2131. else
  2132. rx_start = NULL;
  2133. }
  2134. if (!rx_start) {
  2135. IWL_ERROR("MPDU frame without a PHY data\n");
  2136. return;
  2137. }
  2138. if (include_phy) {
  2139. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  2140. + rx_start->cfg_phy_cnt);
  2141. len = le16_to_cpu(rx_start->byte_count);
  2142. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  2143. sizeof(struct iwl4965_rx_phy_res) + len);
  2144. } else {
  2145. struct iwl4965_rx_mpdu_res_start *amsdu =
  2146. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2147. header = (void *)(pkt->u.raw +
  2148. sizeof(struct iwl4965_rx_mpdu_res_start));
  2149. len = le16_to_cpu(amsdu->byte_count);
  2150. rx_end = (__le32 *) (pkt->u.raw +
  2151. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  2152. }
  2153. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  2154. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  2155. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  2156. le32_to_cpu(*rx_end));
  2157. return;
  2158. }
  2159. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  2160. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  2161. rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
  2162. /* Meaningful noise values are available only from beacon statistics,
  2163. * which are gathered only when associated, and indicate noise
  2164. * only for the associated network channel ...
  2165. * Ignore these noise values while scanning (other channels) */
  2166. if (iwl_is_associated(priv) &&
  2167. !test_bit(STATUS_SCANNING, &priv->status)) {
  2168. rx_status.noise = priv->last_rx_noise;
  2169. rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
  2170. rx_status.noise);
  2171. } else {
  2172. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2173. rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
  2174. }
  2175. /* Reset beacon noise level if not associated. */
  2176. if (!iwl_is_associated(priv))
  2177. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2178. /* Set "1" to report good data frames in groups of 100 */
  2179. /* FIXME: need to optimze the call: */
  2180. iwl4965_dbg_report_frame(priv, pkt, header, 1);
  2181. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  2182. rx_status.signal, rx_status.noise, rx_status.signal,
  2183. (unsigned long long)rx_status.mactime);
  2184. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  2185. iwl4965_handle_data_packet(priv, 1, include_phy,
  2186. rxb, &rx_status);
  2187. return;
  2188. }
  2189. network_packet = iwl4965_is_network_packet(priv, header);
  2190. if (network_packet) {
  2191. priv->last_rx_rssi = rx_status.signal;
  2192. priv->last_beacon_time = priv->ucode_beacon_time;
  2193. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  2194. }
  2195. fc = le16_to_cpu(header->frame_control);
  2196. switch (fc & IEEE80211_FCTL_FTYPE) {
  2197. case IEEE80211_FTYPE_MGMT:
  2198. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  2199. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  2200. header->addr2);
  2201. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
  2202. break;
  2203. case IEEE80211_FTYPE_CTL:
  2204. switch (fc & IEEE80211_FCTL_STYPE) {
  2205. case IEEE80211_STYPE_BACK_REQ:
  2206. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  2207. iwl4965_handle_data_packet(priv, 0, include_phy,
  2208. rxb, &rx_status);
  2209. break;
  2210. default:
  2211. break;
  2212. }
  2213. break;
  2214. case IEEE80211_FTYPE_DATA: {
  2215. DECLARE_MAC_BUF(mac1);
  2216. DECLARE_MAC_BUF(mac2);
  2217. DECLARE_MAC_BUF(mac3);
  2218. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  2219. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  2220. header->addr2);
  2221. if (unlikely(!network_packet))
  2222. IWL_DEBUG_DROP("Dropping (non network): "
  2223. "%s, %s, %s\n",
  2224. print_mac(mac1, header->addr1),
  2225. print_mac(mac2, header->addr2),
  2226. print_mac(mac3, header->addr3));
  2227. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  2228. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  2229. print_mac(mac1, header->addr1),
  2230. print_mac(mac2, header->addr2),
  2231. print_mac(mac3, header->addr3));
  2232. else
  2233. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  2234. &rx_status);
  2235. break;
  2236. }
  2237. default:
  2238. break;
  2239. }
  2240. }
  2241. /**
  2242. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  2243. *
  2244. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  2245. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  2246. */
  2247. static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
  2248. struct iwl_ht_agg *agg,
  2249. struct iwl4965_compressed_ba_resp*
  2250. ba_resp)
  2251. {
  2252. int i, sh, ack;
  2253. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  2254. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  2255. u64 bitmap;
  2256. int successes = 0;
  2257. struct ieee80211_tx_info *info;
  2258. if (unlikely(!agg->wait_for_ba)) {
  2259. IWL_ERROR("Received BA when not expected\n");
  2260. return -EINVAL;
  2261. }
  2262. /* Mark that the expected block-ack response arrived */
  2263. agg->wait_for_ba = 0;
  2264. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  2265. /* Calculate shift to align block-ack bits with our Tx window bits */
  2266. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  2267. if (sh < 0) /* tbw something is wrong with indices */
  2268. sh += 0x100;
  2269. /* don't use 64-bit values for now */
  2270. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  2271. if (agg->frame_count > (64 - sh)) {
  2272. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  2273. return -1;
  2274. }
  2275. /* check for success or failure according to the
  2276. * transmitted bitmap and block-ack bitmap */
  2277. bitmap &= agg->bitmap;
  2278. /* For each frame attempted in aggregation,
  2279. * update driver's record of tx frame's status. */
  2280. for (i = 0; i < agg->frame_count ; i++) {
  2281. ack = bitmap & (1 << i);
  2282. successes += !!ack;
  2283. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  2284. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  2285. agg->start_idx + i);
  2286. }
  2287. info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
  2288. memset(&info->status, 0, sizeof(info->status));
  2289. info->flags = IEEE80211_TX_STAT_ACK;
  2290. info->flags |= IEEE80211_TX_STAT_AMPDU;
  2291. info->status.ampdu_ack_map = successes;
  2292. info->status.ampdu_ack_len = agg->frame_count;
  2293. iwl_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
  2294. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
  2295. return 0;
  2296. }
  2297. /**
  2298. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  2299. */
  2300. static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
  2301. u16 txq_id)
  2302. {
  2303. /* Simply stop the queue, but don't change any configuration;
  2304. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  2305. iwl_write_prph(priv,
  2306. IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
  2307. (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  2308. (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  2309. }
  2310. /**
  2311. * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
  2312. * priv->lock must be held by the caller
  2313. */
  2314. static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
  2315. u16 ssn_idx, u8 tx_fifo)
  2316. {
  2317. int ret = 0;
  2318. if (IWL49_FIRST_AMPDU_QUEUE > txq_id) {
  2319. IWL_WARNING("queue number too small: %d, must be > %d\n",
  2320. txq_id, IWL49_FIRST_AMPDU_QUEUE);
  2321. return -EINVAL;
  2322. }
  2323. ret = iwl_grab_nic_access(priv);
  2324. if (ret)
  2325. return ret;
  2326. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  2327. iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  2328. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  2329. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  2330. /* supposes that ssn_idx is valid (!= 0xFFF) */
  2331. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  2332. iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
  2333. iwl_txq_ctx_deactivate(priv, txq_id);
  2334. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  2335. iwl_release_nic_access(priv);
  2336. return 0;
  2337. }
  2338. /**
  2339. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  2340. *
  2341. * Handles block-acknowledge notification from device, which reports success
  2342. * of frames sent via aggregation.
  2343. */
  2344. static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
  2345. struct iwl_rx_mem_buffer *rxb)
  2346. {
  2347. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2348. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  2349. int index;
  2350. struct iwl_tx_queue *txq = NULL;
  2351. struct iwl_ht_agg *agg;
  2352. DECLARE_MAC_BUF(mac);
  2353. /* "flow" corresponds to Tx queue */
  2354. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  2355. /* "ssn" is start of block-ack Tx window, corresponds to index
  2356. * (in Tx queue's circular buffer) of first TFD/frame in window */
  2357. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  2358. if (scd_flow >= priv->hw_params.max_txq_num) {
  2359. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  2360. return;
  2361. }
  2362. txq = &priv->txq[scd_flow];
  2363. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  2364. /* Find index just before block-ack window */
  2365. index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  2366. /* TODO: Need to get this copy more safely - now good for debug */
  2367. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  2368. "sta_id = %d\n",
  2369. agg->wait_for_ba,
  2370. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  2371. ba_resp->sta_id);
  2372. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  2373. "%d, scd_ssn = %d\n",
  2374. ba_resp->tid,
  2375. ba_resp->seq_ctl,
  2376. (unsigned long long)le64_to_cpu(ba_resp->bitmap),
  2377. ba_resp->scd_flow,
  2378. ba_resp->scd_ssn);
  2379. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  2380. agg->start_idx,
  2381. (unsigned long long)agg->bitmap);
  2382. /* Update driver's record of ACK vs. not for each frame in window */
  2383. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  2384. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  2385. * block-ack window (we assume that they've been successfully
  2386. * transmitted ... if not, it's too late anyway). */
  2387. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  2388. /* calculate mac80211 ampdu sw queue to wake */
  2389. int ampdu_q =
  2390. scd_flow - priv->hw_params.first_ampdu_q + priv->hw->queues;
  2391. int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
  2392. priv->stations[ba_resp->sta_id].
  2393. tid[ba_resp->tid].tfds_in_queue -= freed;
  2394. if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
  2395. priv->mac80211_registered &&
  2396. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2397. ieee80211_wake_queue(priv->hw, ampdu_q);
  2398. iwl_txq_check_empty(priv, ba_resp->sta_id,
  2399. ba_resp->tid, scd_flow);
  2400. }
  2401. }
  2402. /**
  2403. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  2404. */
  2405. static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
  2406. u16 txq_id)
  2407. {
  2408. u32 tbl_dw_addr;
  2409. u32 tbl_dw;
  2410. u16 scd_q2ratid;
  2411. scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  2412. tbl_dw_addr = priv->scd_base_addr +
  2413. IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  2414. tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
  2415. if (txq_id & 0x1)
  2416. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  2417. else
  2418. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  2419. iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  2420. return 0;
  2421. }
  2422. /**
  2423. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  2424. *
  2425. * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
  2426. * i.e. it must be one of the higher queues used for aggregation
  2427. */
  2428. static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
  2429. int tx_fifo, int sta_id, int tid, u16 ssn_idx)
  2430. {
  2431. unsigned long flags;
  2432. int ret;
  2433. u16 ra_tid;
  2434. if (IWL49_FIRST_AMPDU_QUEUE > txq_id)
  2435. IWL_WARNING("queue number too small: %d, must be > %d\n",
  2436. txq_id, IWL49_FIRST_AMPDU_QUEUE);
  2437. ra_tid = BUILD_RAxTID(sta_id, tid);
  2438. /* Modify device's station table to Tx this TID */
  2439. iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
  2440. spin_lock_irqsave(&priv->lock, flags);
  2441. ret = iwl_grab_nic_access(priv);
  2442. if (ret) {
  2443. spin_unlock_irqrestore(&priv->lock, flags);
  2444. return ret;
  2445. }
  2446. /* Stop this Tx queue before configuring it */
  2447. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  2448. /* Map receiver-address / traffic-ID to this queue */
  2449. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  2450. /* Set this queue as a chain-building queue */
  2451. iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  2452. /* Place first TFD at index corresponding to start sequence number.
  2453. * Assumes that ssn_idx is valid (!= 0xFFF) */
  2454. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  2455. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  2456. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  2457. /* Set up Tx window size and frame limit for this queue */
  2458. iwl_write_targ_mem(priv,
  2459. priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  2460. (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  2461. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  2462. iwl_write_targ_mem(priv, priv->scd_base_addr +
  2463. IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  2464. (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  2465. & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  2466. iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
  2467. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  2468. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  2469. iwl_release_nic_access(priv);
  2470. spin_unlock_irqrestore(&priv->lock, flags);
  2471. return 0;
  2472. }
  2473. static int iwl4965_rx_agg_start(struct iwl_priv *priv,
  2474. const u8 *addr, int tid, u16 ssn)
  2475. {
  2476. unsigned long flags;
  2477. int sta_id;
  2478. sta_id = iwl_find_station(priv, addr);
  2479. if (sta_id == IWL_INVALID_STATION)
  2480. return -ENXIO;
  2481. spin_lock_irqsave(&priv->sta_lock, flags);
  2482. priv->stations[sta_id].sta.station_flags_msk = 0;
  2483. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  2484. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  2485. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  2486. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2487. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2488. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  2489. CMD_ASYNC);
  2490. }
  2491. static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
  2492. const u8 *addr, int tid)
  2493. {
  2494. unsigned long flags;
  2495. int sta_id;
  2496. sta_id = iwl_find_station(priv, addr);
  2497. if (sta_id == IWL_INVALID_STATION)
  2498. return -ENXIO;
  2499. spin_lock_irqsave(&priv->sta_lock, flags);
  2500. priv->stations[sta_id].sta.station_flags_msk = 0;
  2501. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  2502. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  2503. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2504. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2505. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  2506. CMD_ASYNC);
  2507. }
  2508. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  2509. enum ieee80211_ampdu_mlme_action action,
  2510. const u8 *addr, u16 tid, u16 *ssn)
  2511. {
  2512. struct iwl_priv *priv = hw->priv;
  2513. DECLARE_MAC_BUF(mac);
  2514. IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
  2515. print_mac(mac, addr), tid);
  2516. switch (action) {
  2517. case IEEE80211_AMPDU_RX_START:
  2518. IWL_DEBUG_HT("start Rx\n");
  2519. return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
  2520. case IEEE80211_AMPDU_RX_STOP:
  2521. IWL_DEBUG_HT("stop Rx\n");
  2522. return iwl4965_rx_agg_stop(priv, addr, tid);
  2523. case IEEE80211_AMPDU_TX_START:
  2524. IWL_DEBUG_HT("start Tx\n");
  2525. return iwl_tx_agg_start(priv, addr, tid, ssn);
  2526. case IEEE80211_AMPDU_TX_STOP:
  2527. IWL_DEBUG_HT("stop Tx\n");
  2528. return iwl_tx_agg_stop(priv, addr, tid);
  2529. default:
  2530. IWL_DEBUG_HT("unknown\n");
  2531. return -EINVAL;
  2532. break;
  2533. }
  2534. return 0;
  2535. }
  2536. static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
  2537. {
  2538. switch (cmd_id) {
  2539. case REPLY_RXON:
  2540. return (u16) sizeof(struct iwl4965_rxon_cmd);
  2541. default:
  2542. return len;
  2543. }
  2544. }
  2545. static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
  2546. {
  2547. struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
  2548. addsta->mode = cmd->mode;
  2549. memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
  2550. memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
  2551. addsta->station_flags = cmd->station_flags;
  2552. addsta->station_flags_msk = cmd->station_flags_msk;
  2553. addsta->tid_disable_tx = cmd->tid_disable_tx;
  2554. addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
  2555. addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
  2556. addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
  2557. addsta->reserved1 = __constant_cpu_to_le16(0);
  2558. addsta->reserved2 = __constant_cpu_to_le32(0);
  2559. return (u16)sizeof(struct iwl4965_addsta_cmd);
  2560. }
  2561. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2562. {
  2563. return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
  2564. }
  2565. /**
  2566. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2567. */
  2568. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2569. struct iwl_ht_agg *agg,
  2570. struct iwl4965_tx_resp *tx_resp,
  2571. int txq_id, u16 start_idx)
  2572. {
  2573. u16 status;
  2574. struct agg_tx_status *frame_status = tx_resp->u.agg_status;
  2575. struct ieee80211_tx_info *info = NULL;
  2576. struct ieee80211_hdr *hdr = NULL;
  2577. u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2578. int i, sh, idx;
  2579. u16 seq;
  2580. if (agg->wait_for_ba)
  2581. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2582. agg->frame_count = tx_resp->frame_count;
  2583. agg->start_idx = start_idx;
  2584. agg->rate_n_flags = rate_n_flags;
  2585. agg->bitmap = 0;
  2586. /* # frames attempted by Tx command */
  2587. if (agg->frame_count == 1) {
  2588. /* Only one frame was attempted; no block-ack will arrive */
  2589. status = le16_to_cpu(frame_status[0].status);
  2590. idx = start_idx;
  2591. /* FIXME: code repetition */
  2592. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2593. agg->frame_count, agg->start_idx, idx);
  2594. info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
  2595. info->status.retry_count = tx_resp->failure_frame;
  2596. info->flags &= ~IEEE80211_TX_CTL_AMPDU;
  2597. info->flags |= iwl_is_tx_success(status)?
  2598. IEEE80211_TX_STAT_ACK : 0;
  2599. iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
  2600. /* FIXME: code repetition end */
  2601. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2602. status & 0xff, tx_resp->failure_frame);
  2603. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
  2604. agg->wait_for_ba = 0;
  2605. } else {
  2606. /* Two or more frames were attempted; expect block-ack */
  2607. u64 bitmap = 0;
  2608. int start = agg->start_idx;
  2609. /* Construct bit-map of pending frames within Tx window */
  2610. for (i = 0; i < agg->frame_count; i++) {
  2611. u16 sc;
  2612. status = le16_to_cpu(frame_status[i].status);
  2613. seq = le16_to_cpu(frame_status[i].sequence);
  2614. idx = SEQ_TO_INDEX(seq);
  2615. txq_id = SEQ_TO_QUEUE(seq);
  2616. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2617. AGG_TX_STATE_ABORT_MSK))
  2618. continue;
  2619. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2620. agg->frame_count, txq_id, idx);
  2621. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  2622. sc = le16_to_cpu(hdr->seq_ctrl);
  2623. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2624. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2625. " idx=%d, seq_idx=%d, seq=%d\n",
  2626. idx, SEQ_TO_SN(sc),
  2627. hdr->seq_ctrl);
  2628. return -1;
  2629. }
  2630. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2631. i, idx, SEQ_TO_SN(sc));
  2632. sh = idx - start;
  2633. if (sh > 64) {
  2634. sh = (start - idx) + 0xff;
  2635. bitmap = bitmap << sh;
  2636. sh = 0;
  2637. start = idx;
  2638. } else if (sh < -64)
  2639. sh = 0xff - (start - idx);
  2640. else if (sh < 0) {
  2641. sh = start - idx;
  2642. start = idx;
  2643. bitmap = bitmap << sh;
  2644. sh = 0;
  2645. }
  2646. bitmap |= (1 << sh);
  2647. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2648. start, (u32)(bitmap & 0xFFFFFFFF));
  2649. }
  2650. agg->bitmap = bitmap;
  2651. agg->start_idx = start;
  2652. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2653. agg->frame_count, agg->start_idx,
  2654. (unsigned long long)agg->bitmap);
  2655. if (bitmap)
  2656. agg->wait_for_ba = 1;
  2657. }
  2658. return 0;
  2659. }
  2660. /**
  2661. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2662. */
  2663. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2664. struct iwl_rx_mem_buffer *rxb)
  2665. {
  2666. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2667. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2668. int txq_id = SEQ_TO_QUEUE(sequence);
  2669. int index = SEQ_TO_INDEX(sequence);
  2670. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2671. struct ieee80211_tx_info *info;
  2672. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2673. u32 status = le32_to_cpu(tx_resp->u.status);
  2674. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2675. __le16 fc;
  2676. struct ieee80211_hdr *hdr;
  2677. u8 *qc = NULL;
  2678. if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
  2679. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2680. "is out of range [0-%d] %d %d\n", txq_id,
  2681. index, txq->q.n_bd, txq->q.write_ptr,
  2682. txq->q.read_ptr);
  2683. return;
  2684. }
  2685. info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
  2686. memset(&info->status, 0, sizeof(info->status));
  2687. hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
  2688. fc = hdr->frame_control;
  2689. if (ieee80211_is_data_qos(fc)) {
  2690. qc = ieee80211_get_qos_ctl(hdr);
  2691. tid = qc[0] & 0xf;
  2692. }
  2693. sta_id = iwl_get_ra_sta_id(priv, hdr);
  2694. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2695. IWL_ERROR("Station not known\n");
  2696. return;
  2697. }
  2698. if (txq->sched_retry) {
  2699. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2700. struct iwl_ht_agg *agg = NULL;
  2701. if (!qc)
  2702. return;
  2703. agg = &priv->stations[sta_id].tid[tid].agg;
  2704. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
  2705. if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
  2706. /* TODO: send BAR */
  2707. }
  2708. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2709. int freed, ampdu_q;
  2710. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2711. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2712. "%d index %d\n", scd_ssn , index);
  2713. freed = iwl_tx_queue_reclaim(priv, txq_id, index);
  2714. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2715. if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
  2716. txq_id >= 0 && priv->mac80211_registered &&
  2717. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
  2718. /* calculate mac80211 ampdu sw queue to wake */
  2719. ampdu_q = txq_id - IWL49_FIRST_AMPDU_QUEUE +
  2720. priv->hw->queues;
  2721. if (agg->state == IWL_AGG_OFF)
  2722. ieee80211_wake_queue(priv->hw, txq_id);
  2723. else
  2724. ieee80211_wake_queue(priv->hw, ampdu_q);
  2725. }
  2726. iwl_txq_check_empty(priv, sta_id, tid, txq_id);
  2727. }
  2728. } else {
  2729. info->status.retry_count = tx_resp->failure_frame;
  2730. info->flags |=
  2731. iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
  2732. iwl_hwrate_to_tx_control(priv,
  2733. le32_to_cpu(tx_resp->rate_n_flags),
  2734. info);
  2735. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
  2736. "0x%x retries %d\n", txq_id,
  2737. iwl_get_tx_fail_reason(status),
  2738. status, le32_to_cpu(tx_resp->rate_n_flags),
  2739. tx_resp->failure_frame);
  2740. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2741. if (index != -1) {
  2742. int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
  2743. if (tid != MAX_TID_COUNT)
  2744. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2745. if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
  2746. (txq_id >= 0) && priv->mac80211_registered)
  2747. ieee80211_wake_queue(priv->hw, txq_id);
  2748. if (tid != MAX_TID_COUNT)
  2749. iwl_txq_check_empty(priv, sta_id, tid, txq_id);
  2750. }
  2751. }
  2752. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2753. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2754. }
  2755. /* Set up 4965-specific Rx frame reply handlers */
  2756. static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
  2757. {
  2758. /* Legacy Rx frames */
  2759. priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
  2760. /* Tx response */
  2761. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2762. /* block ack */
  2763. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  2764. }
  2765. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  2766. {
  2767. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  2768. }
  2769. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  2770. {
  2771. cancel_work_sync(&priv->txpower_work);
  2772. }
  2773. static struct iwl_hcmd_ops iwl4965_hcmd = {
  2774. .rxon_assoc = iwl4965_send_rxon_assoc,
  2775. };
  2776. static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
  2777. .get_hcmd_size = iwl4965_get_hcmd_size,
  2778. .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
  2779. .chain_noise_reset = iwl4965_chain_noise_reset,
  2780. .gain_computation = iwl4965_gain_computation,
  2781. };
  2782. static struct iwl_lib_ops iwl4965_lib = {
  2783. .set_hw_params = iwl4965_hw_set_hw_params,
  2784. .alloc_shared_mem = iwl4965_alloc_shared_mem,
  2785. .free_shared_mem = iwl4965_free_shared_mem,
  2786. .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
  2787. .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
  2788. .txq_set_sched = iwl4965_txq_set_sched,
  2789. .txq_agg_enable = iwl4965_txq_agg_enable,
  2790. .txq_agg_disable = iwl4965_txq_agg_disable,
  2791. .rx_handler_setup = iwl4965_rx_handler_setup,
  2792. .setup_deferred_work = iwl4965_setup_deferred_work,
  2793. .cancel_deferred_work = iwl4965_cancel_deferred_work,
  2794. .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
  2795. .alive_notify = iwl4965_alive_notify,
  2796. .init_alive_start = iwl4965_init_alive_start,
  2797. .load_ucode = iwl4965_load_bsm,
  2798. .apm_ops = {
  2799. .init = iwl4965_apm_init,
  2800. .reset = iwl4965_apm_reset,
  2801. .stop = iwl4965_apm_stop,
  2802. .config = iwl4965_nic_config,
  2803. .set_pwr_src = iwl4965_set_pwr_src,
  2804. },
  2805. .eeprom_ops = {
  2806. .regulatory_bands = {
  2807. EEPROM_REGULATORY_BAND_1_CHANNELS,
  2808. EEPROM_REGULATORY_BAND_2_CHANNELS,
  2809. EEPROM_REGULATORY_BAND_3_CHANNELS,
  2810. EEPROM_REGULATORY_BAND_4_CHANNELS,
  2811. EEPROM_REGULATORY_BAND_5_CHANNELS,
  2812. EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
  2813. EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
  2814. },
  2815. .verify_signature = iwlcore_eeprom_verify_signature,
  2816. .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
  2817. .release_semaphore = iwlcore_eeprom_release_semaphore,
  2818. .check_version = iwl4965_eeprom_check_version,
  2819. .query_addr = iwlcore_eeprom_query_addr,
  2820. },
  2821. .set_power = iwl4965_set_power,
  2822. .send_tx_power = iwl4965_send_tx_power,
  2823. .update_chain_flags = iwl4965_update_chain_flags,
  2824. .temperature = iwl4965_temperature_calib,
  2825. };
  2826. static struct iwl_ops iwl4965_ops = {
  2827. .lib = &iwl4965_lib,
  2828. .hcmd = &iwl4965_hcmd,
  2829. .utils = &iwl4965_hcmd_utils,
  2830. };
  2831. struct iwl_cfg iwl4965_agn_cfg = {
  2832. .name = "4965AGN",
  2833. .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
  2834. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  2835. .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
  2836. .ops = &iwl4965_ops,
  2837. .mod_params = &iwl4965_mod_params,
  2838. };
  2839. module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
  2840. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  2841. module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
  2842. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  2843. module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
  2844. MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
  2845. module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
  2846. MODULE_PARM_DESC(debug, "debug output mask");
  2847. module_param_named(
  2848. disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
  2849. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  2850. module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
  2851. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  2852. /* QoS */
  2853. module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
  2854. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  2855. module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
  2856. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  2857. module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
  2858. MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");