xhci-pci.c 9.2 KB

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  1. /*
  2. * xHCI host controller driver PCI Bus Glue.
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/pci.h>
  23. #include <linux/slab.h>
  24. #include <linux/module.h>
  25. #include "xhci.h"
  26. /* Device for a quirk */
  27. #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
  28. #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
  29. #define PCI_VENDOR_ID_ETRON 0x1b6f
  30. #define PCI_DEVICE_ID_ASROCK_P67 0x7023
  31. static const char hcd_name[] = "xhci_hcd";
  32. /* called after powerup, by probe or system-pm "wakeup" */
  33. static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  34. {
  35. /*
  36. * TODO: Implement finding debug ports later.
  37. * TODO: see if there are any quirks that need to be added to handle
  38. * new extended capabilities.
  39. */
  40. /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  41. if (!pci_set_mwi(pdev))
  42. xhci_dbg(xhci, "MWI active\n");
  43. xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  44. return 0;
  45. }
  46. static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  47. {
  48. struct pci_dev *pdev = to_pci_dev(dev);
  49. /* Look for vendor-specific quirks */
  50. if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  51. pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
  52. if (pdev->revision == 0x0) {
  53. xhci->quirks |= XHCI_RESET_EP_QUIRK;
  54. xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
  55. " endpoint cmd after reset endpoint\n");
  56. }
  57. /* Fresco Logic confirms: all revisions of this chip do not
  58. * support MSI, even though some of them claim to in their PCI
  59. * capabilities.
  60. */
  61. xhci->quirks |= XHCI_BROKEN_MSI;
  62. xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
  63. "has broken MSI implementation\n",
  64. pdev->revision);
  65. }
  66. if (pdev->vendor == PCI_VENDOR_ID_NEC)
  67. xhci->quirks |= XHCI_NEC_HOST;
  68. if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
  69. xhci->quirks |= XHCI_AMD_0x96_HOST;
  70. /* AMD PLL quirk */
  71. if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
  72. xhci->quirks |= XHCI_AMD_PLL_FIX;
  73. if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
  74. pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
  75. xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
  76. xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
  77. xhci->limit_active_eps = 64;
  78. xhci->quirks |= XHCI_SW_BW_CHECKING;
  79. }
  80. if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
  81. pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
  82. xhci->quirks |= XHCI_RESET_ON_RESUME;
  83. xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
  84. }
  85. if (pdev->vendor == PCI_VENDOR_ID_VIA)
  86. xhci->quirks |= XHCI_RESET_ON_RESUME;
  87. }
  88. /* called during probe() after chip reset completes */
  89. static int xhci_pci_setup(struct usb_hcd *hcd)
  90. {
  91. struct xhci_hcd *xhci;
  92. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  93. int retval;
  94. retval = xhci_gen_setup(hcd, xhci_pci_quirks);
  95. if (retval)
  96. return retval;
  97. xhci = hcd_to_xhci(hcd);
  98. if (!usb_hcd_is_primary_hcd(hcd))
  99. return 0;
  100. pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
  101. xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
  102. /* Find any debug ports */
  103. retval = xhci_pci_reinit(xhci, pdev);
  104. if (!retval)
  105. return retval;
  106. kfree(xhci);
  107. return retval;
  108. }
  109. /*
  110. * We need to register our own PCI probe function (instead of the USB core's
  111. * function) in order to create a second roothub under xHCI.
  112. */
  113. static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  114. {
  115. int retval;
  116. struct xhci_hcd *xhci;
  117. struct hc_driver *driver;
  118. struct usb_hcd *hcd;
  119. driver = (struct hc_driver *)id->driver_data;
  120. /* Register the USB 2.0 roothub.
  121. * FIXME: USB core must know to register the USB 2.0 roothub first.
  122. * This is sort of silly, because we could just set the HCD driver flags
  123. * to say USB 2.0, but I'm not sure what the implications would be in
  124. * the other parts of the HCD code.
  125. */
  126. retval = usb_hcd_pci_probe(dev, id);
  127. if (retval)
  128. return retval;
  129. /* USB 2.0 roothub is stored in the PCI device now. */
  130. hcd = dev_get_drvdata(&dev->dev);
  131. xhci = hcd_to_xhci(hcd);
  132. xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
  133. pci_name(dev), hcd);
  134. if (!xhci->shared_hcd) {
  135. retval = -ENOMEM;
  136. goto dealloc_usb2_hcd;
  137. }
  138. /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
  139. * is called by usb_add_hcd().
  140. */
  141. *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
  142. retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
  143. IRQF_SHARED);
  144. if (retval)
  145. goto put_usb3_hcd;
  146. /* Roothub already marked as USB 3.0 speed */
  147. return 0;
  148. put_usb3_hcd:
  149. usb_put_hcd(xhci->shared_hcd);
  150. dealloc_usb2_hcd:
  151. usb_hcd_pci_remove(dev);
  152. return retval;
  153. }
  154. static void xhci_pci_remove(struct pci_dev *dev)
  155. {
  156. struct xhci_hcd *xhci;
  157. xhci = hcd_to_xhci(pci_get_drvdata(dev));
  158. if (xhci->shared_hcd) {
  159. usb_remove_hcd(xhci->shared_hcd);
  160. usb_put_hcd(xhci->shared_hcd);
  161. }
  162. usb_hcd_pci_remove(dev);
  163. kfree(xhci);
  164. }
  165. #ifdef CONFIG_PM
  166. static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
  167. {
  168. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  169. int retval = 0;
  170. if (hcd->state != HC_STATE_SUSPENDED ||
  171. xhci->shared_hcd->state != HC_STATE_SUSPENDED)
  172. return -EINVAL;
  173. retval = xhci_suspend(xhci);
  174. return retval;
  175. }
  176. static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
  177. {
  178. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  179. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  180. int retval = 0;
  181. /* The BIOS on systems with the Intel Panther Point chipset may or may
  182. * not support xHCI natively. That means that during system resume, it
  183. * may switch the ports back to EHCI so that users can use their
  184. * keyboard to select a kernel from GRUB after resume from hibernate.
  185. *
  186. * The BIOS is supposed to remember whether the OS had xHCI ports
  187. * enabled before resume, and switch the ports back to xHCI when the
  188. * BIOS/OS semaphore is written, but we all know we can't trust BIOS
  189. * writers.
  190. *
  191. * Unconditionally switch the ports back to xHCI after a system resume.
  192. * We can't tell whether the EHCI or xHCI controller will be resumed
  193. * first, so we have to do the port switchover in both drivers. Writing
  194. * a '1' to the port switchover registers should have no effect if the
  195. * port was already switched over.
  196. */
  197. if (usb_is_intel_switchable_xhci(pdev))
  198. usb_enable_xhci_ports(pdev);
  199. retval = xhci_resume(xhci, hibernated);
  200. return retval;
  201. }
  202. #endif /* CONFIG_PM */
  203. static const struct hc_driver xhci_pci_hc_driver = {
  204. .description = hcd_name,
  205. .product_desc = "xHCI Host Controller",
  206. .hcd_priv_size = sizeof(struct xhci_hcd *),
  207. /*
  208. * generic hardware linkage
  209. */
  210. .irq = xhci_irq,
  211. .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
  212. /*
  213. * basic lifecycle operations
  214. */
  215. .reset = xhci_pci_setup,
  216. .start = xhci_run,
  217. #ifdef CONFIG_PM
  218. .pci_suspend = xhci_pci_suspend,
  219. .pci_resume = xhci_pci_resume,
  220. #endif
  221. .stop = xhci_stop,
  222. .shutdown = xhci_shutdown,
  223. /*
  224. * managing i/o requests and associated device resources
  225. */
  226. .urb_enqueue = xhci_urb_enqueue,
  227. .urb_dequeue = xhci_urb_dequeue,
  228. .alloc_dev = xhci_alloc_dev,
  229. .free_dev = xhci_free_dev,
  230. .alloc_streams = xhci_alloc_streams,
  231. .free_streams = xhci_free_streams,
  232. .add_endpoint = xhci_add_endpoint,
  233. .drop_endpoint = xhci_drop_endpoint,
  234. .endpoint_reset = xhci_endpoint_reset,
  235. .check_bandwidth = xhci_check_bandwidth,
  236. .reset_bandwidth = xhci_reset_bandwidth,
  237. .address_device = xhci_address_device,
  238. .update_hub_device = xhci_update_hub_device,
  239. .reset_device = xhci_discover_or_reset_device,
  240. /*
  241. * scheduling support
  242. */
  243. .get_frame_number = xhci_get_frame,
  244. /* Root hub support */
  245. .hub_control = xhci_hub_control,
  246. .hub_status_data = xhci_hub_status_data,
  247. .bus_suspend = xhci_bus_suspend,
  248. .bus_resume = xhci_bus_resume,
  249. /*
  250. * call back when device connected and addressed
  251. */
  252. .update_device = xhci_update_device,
  253. .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
  254. };
  255. /*-------------------------------------------------------------------------*/
  256. /* PCI driver selection metadata; PCI hotplugging uses this */
  257. static const struct pci_device_id pci_ids[] = { {
  258. /* handle any USB 3.0 xHCI controller */
  259. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
  260. .driver_data = (unsigned long) &xhci_pci_hc_driver,
  261. },
  262. { /* end: all zeroes */ }
  263. };
  264. MODULE_DEVICE_TABLE(pci, pci_ids);
  265. /* pci driver glue; this is a "new style" PCI driver module */
  266. static struct pci_driver xhci_pci_driver = {
  267. .name = (char *) hcd_name,
  268. .id_table = pci_ids,
  269. .probe = xhci_pci_probe,
  270. .remove = xhci_pci_remove,
  271. /* suspend and resume implemented later */
  272. .shutdown = usb_hcd_pci_shutdown,
  273. #ifdef CONFIG_PM_SLEEP
  274. .driver = {
  275. .pm = &usb_hcd_pci_pm_ops
  276. },
  277. #endif
  278. };
  279. int __init xhci_register_pci(void)
  280. {
  281. return pci_register_driver(&xhci_pci_driver);
  282. }
  283. void xhci_unregister_pci(void)
  284. {
  285. pci_unregister_driver(&xhci_pci_driver);
  286. }