lpfc_sli.c 82 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_ADAPTER_MSG:
  108. case CMD_ADAPTER_DUMP:
  109. case CMD_XMIT_SEQUENCE64_CR:
  110. case CMD_XMIT_SEQUENCE64_CX:
  111. case CMD_XMIT_BCAST64_CN:
  112. case CMD_XMIT_BCAST64_CX:
  113. case CMD_ELS_REQUEST64_CR:
  114. case CMD_ELS_REQUEST64_CX:
  115. case CMD_FCP_IWRITE64_CR:
  116. case CMD_FCP_IWRITE64_CX:
  117. case CMD_FCP_IREAD64_CR:
  118. case CMD_FCP_IREAD64_CX:
  119. case CMD_FCP_ICMND64_CR:
  120. case CMD_FCP_ICMND64_CX:
  121. case CMD_GEN_REQUEST64_CR:
  122. case CMD_GEN_REQUEST64_CX:
  123. case CMD_XMIT_ELS_RSP64_CX:
  124. type = LPFC_SOL_IOCB;
  125. break;
  126. case CMD_ABORT_XRI_CN:
  127. case CMD_ABORT_XRI_CX:
  128. case CMD_CLOSE_XRI_CN:
  129. case CMD_CLOSE_XRI_CX:
  130. case CMD_XRI_ABORTED_CX:
  131. case CMD_ABORT_MXRI64_CN:
  132. type = LPFC_ABORT_IOCB;
  133. break;
  134. case CMD_RCV_SEQUENCE_CX:
  135. case CMD_RCV_ELS_REQ_CX:
  136. case CMD_RCV_SEQUENCE64_CX:
  137. case CMD_RCV_ELS_REQ64_CX:
  138. type = LPFC_UNSOL_IOCB;
  139. break;
  140. default:
  141. type = LPFC_UNKNOWN_IOCB;
  142. break;
  143. }
  144. return type;
  145. }
  146. static int
  147. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  148. {
  149. struct lpfc_sli *psli = &phba->sli;
  150. MAILBOX_t *pmbox = &pmb->mb;
  151. int i, rc;
  152. for (i = 0; i < psli->num_rings; i++) {
  153. phba->hba_state = LPFC_INIT_MBX_CMDS;
  154. lpfc_config_ring(phba, i, pmb);
  155. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  156. if (rc != MBX_SUCCESS) {
  157. lpfc_printf_log(phba,
  158. KERN_ERR,
  159. LOG_INIT,
  160. "%d:0446 Adapter failed to init, "
  161. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  162. "ring %d\n",
  163. phba->brd_no,
  164. pmbox->mbxCommand,
  165. pmbox->mbxStatus,
  166. i);
  167. phba->hba_state = LPFC_HBA_ERROR;
  168. return -ENXIO;
  169. }
  170. }
  171. return 0;
  172. }
  173. static int
  174. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  175. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  176. {
  177. list_add_tail(&piocb->list, &pring->txcmplq);
  178. pring->txcmplq_cnt++;
  179. if (unlikely(pring->ringno == LPFC_ELS_RING))
  180. mod_timer(&phba->els_tmofunc,
  181. jiffies + HZ * (phba->fc_ratov << 1));
  182. return (0);
  183. }
  184. static struct lpfc_iocbq *
  185. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  186. {
  187. struct list_head *dlp;
  188. struct lpfc_iocbq *cmd_iocb;
  189. dlp = &pring->txq;
  190. cmd_iocb = NULL;
  191. list_remove_head((&pring->txq), cmd_iocb,
  192. struct lpfc_iocbq,
  193. list);
  194. if (cmd_iocb) {
  195. /* If the first ptr is not equal to the list header,
  196. * deque the IOCBQ_t and return it.
  197. */
  198. pring->txq_cnt--;
  199. }
  200. return (cmd_iocb);
  201. }
  202. static IOCB_t *
  203. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  204. {
  205. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  206. uint32_t max_cmd_idx = pring->numCiocb;
  207. IOCB_t *iocb = NULL;
  208. if ((pring->next_cmdidx == pring->cmdidx) &&
  209. (++pring->next_cmdidx >= max_cmd_idx))
  210. pring->next_cmdidx = 0;
  211. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  212. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  213. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  214. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  215. "%d:0315 Ring %d issue: portCmdGet %d "
  216. "is bigger then cmd ring %d\n",
  217. phba->brd_no, pring->ringno,
  218. pring->local_getidx, max_cmd_idx);
  219. phba->hba_state = LPFC_HBA_ERROR;
  220. /*
  221. * All error attention handlers are posted to
  222. * worker thread
  223. */
  224. phba->work_ha |= HA_ERATT;
  225. phba->work_hs = HS_FFER3;
  226. if (phba->work_wait)
  227. wake_up(phba->work_wait);
  228. return NULL;
  229. }
  230. if (pring->local_getidx == pring->next_cmdidx)
  231. return NULL;
  232. }
  233. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  234. return iocb;
  235. }
  236. uint16_t
  237. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  238. {
  239. struct lpfc_iocbq ** new_arr;
  240. struct lpfc_iocbq ** old_arr;
  241. size_t new_len;
  242. struct lpfc_sli *psli = &phba->sli;
  243. uint16_t iotag;
  244. spin_lock_irq(phba->host->host_lock);
  245. iotag = psli->last_iotag;
  246. if(++iotag < psli->iocbq_lookup_len) {
  247. psli->last_iotag = iotag;
  248. psli->iocbq_lookup[iotag] = iocbq;
  249. spin_unlock_irq(phba->host->host_lock);
  250. iocbq->iotag = iotag;
  251. return iotag;
  252. }
  253. else if (psli->iocbq_lookup_len < (0xffff
  254. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  255. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  256. spin_unlock_irq(phba->host->host_lock);
  257. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  258. GFP_KERNEL);
  259. if (new_arr) {
  260. memset((char *)new_arr, 0,
  261. new_len * sizeof (struct lpfc_iocbq *));
  262. spin_lock_irq(phba->host->host_lock);
  263. old_arr = psli->iocbq_lookup;
  264. if (new_len <= psli->iocbq_lookup_len) {
  265. /* highly unprobable case */
  266. kfree(new_arr);
  267. iotag = psli->last_iotag;
  268. if(++iotag < psli->iocbq_lookup_len) {
  269. psli->last_iotag = iotag;
  270. psli->iocbq_lookup[iotag] = iocbq;
  271. spin_unlock_irq(phba->host->host_lock);
  272. iocbq->iotag = iotag;
  273. return iotag;
  274. }
  275. spin_unlock_irq(phba->host->host_lock);
  276. return 0;
  277. }
  278. if (psli->iocbq_lookup)
  279. memcpy(new_arr, old_arr,
  280. ((psli->last_iotag + 1) *
  281. sizeof (struct lpfc_iocbq *)));
  282. psli->iocbq_lookup = new_arr;
  283. psli->iocbq_lookup_len = new_len;
  284. psli->last_iotag = iotag;
  285. psli->iocbq_lookup[iotag] = iocbq;
  286. spin_unlock_irq(phba->host->host_lock);
  287. iocbq->iotag = iotag;
  288. kfree(old_arr);
  289. return iotag;
  290. }
  291. } else
  292. spin_unlock_irq(phba->host->host_lock);
  293. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  294. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  295. phba->brd_no, psli->last_iotag);
  296. return 0;
  297. }
  298. static void
  299. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  300. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  301. {
  302. /*
  303. * Set up an iotag
  304. */
  305. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  306. /*
  307. * Issue iocb command to adapter
  308. */
  309. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  310. wmb();
  311. pring->stats.iocb_cmd++;
  312. /*
  313. * If there is no completion routine to call, we can release the
  314. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  315. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  316. */
  317. if (nextiocb->iocb_cmpl)
  318. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  319. else
  320. lpfc_sli_release_iocbq(phba, nextiocb);
  321. /*
  322. * Let the HBA know what IOCB slot will be the next one the
  323. * driver will put a command into.
  324. */
  325. pring->cmdidx = pring->next_cmdidx;
  326. writel(pring->cmdidx, phba->MBslimaddr
  327. + (SLIMOFF + (pring->ringno * 2)) * 4);
  328. }
  329. static void
  330. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  331. struct lpfc_sli_ring *pring)
  332. {
  333. int ringno = pring->ringno;
  334. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  335. wmb();
  336. /*
  337. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  338. * The HBA will tell us when an IOCB entry is available.
  339. */
  340. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  341. readl(phba->CAregaddr); /* flush */
  342. pring->stats.iocb_cmd_full++;
  343. }
  344. static void
  345. lpfc_sli_update_ring(struct lpfc_hba * phba,
  346. struct lpfc_sli_ring *pring)
  347. {
  348. int ringno = pring->ringno;
  349. /*
  350. * Tell the HBA that there is work to do in this ring.
  351. */
  352. wmb();
  353. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  354. readl(phba->CAregaddr); /* flush */
  355. }
  356. static void
  357. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  358. {
  359. IOCB_t *iocb;
  360. struct lpfc_iocbq *nextiocb;
  361. /*
  362. * Check to see if:
  363. * (a) there is anything on the txq to send
  364. * (b) link is up
  365. * (c) link attention events can be processed (fcp ring only)
  366. * (d) IOCB processing is not blocked by the outstanding mbox command.
  367. */
  368. if (pring->txq_cnt &&
  369. (phba->hba_state > LPFC_LINK_DOWN) &&
  370. (pring->ringno != phba->sli.fcp_ring ||
  371. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  372. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  373. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  374. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  375. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  376. if (iocb)
  377. lpfc_sli_update_ring(phba, pring);
  378. else
  379. lpfc_sli_update_full_ring(phba, pring);
  380. }
  381. return;
  382. }
  383. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  384. static void
  385. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  386. {
  387. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  388. /* If the ring is active, flag it */
  389. if (phba->sli.ring[ringno].cmdringaddr) {
  390. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  391. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  392. /*
  393. * Force update of the local copy of cmdGetInx
  394. */
  395. phba->sli.ring[ringno].local_getidx
  396. = le32_to_cpu(pgp->cmdGetInx);
  397. spin_lock_irq(phba->host->host_lock);
  398. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  399. spin_unlock_irq(phba->host->host_lock);
  400. }
  401. }
  402. }
  403. static int
  404. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  405. {
  406. uint8_t ret;
  407. switch (mbxCommand) {
  408. case MBX_LOAD_SM:
  409. case MBX_READ_NV:
  410. case MBX_WRITE_NV:
  411. case MBX_RUN_BIU_DIAG:
  412. case MBX_INIT_LINK:
  413. case MBX_DOWN_LINK:
  414. case MBX_CONFIG_LINK:
  415. case MBX_CONFIG_RING:
  416. case MBX_RESET_RING:
  417. case MBX_READ_CONFIG:
  418. case MBX_READ_RCONFIG:
  419. case MBX_READ_SPARM:
  420. case MBX_READ_STATUS:
  421. case MBX_READ_RPI:
  422. case MBX_READ_XRI:
  423. case MBX_READ_REV:
  424. case MBX_READ_LNK_STAT:
  425. case MBX_REG_LOGIN:
  426. case MBX_UNREG_LOGIN:
  427. case MBX_READ_LA:
  428. case MBX_CLEAR_LA:
  429. case MBX_DUMP_MEMORY:
  430. case MBX_DUMP_CONTEXT:
  431. case MBX_RUN_DIAGS:
  432. case MBX_RESTART:
  433. case MBX_UPDATE_CFG:
  434. case MBX_DOWN_LOAD:
  435. case MBX_DEL_LD_ENTRY:
  436. case MBX_RUN_PROGRAM:
  437. case MBX_SET_MASK:
  438. case MBX_SET_SLIM:
  439. case MBX_UNREG_D_ID:
  440. case MBX_KILL_BOARD:
  441. case MBX_CONFIG_FARP:
  442. case MBX_BEACON:
  443. case MBX_LOAD_AREA:
  444. case MBX_RUN_BIU_DIAG64:
  445. case MBX_CONFIG_PORT:
  446. case MBX_READ_SPARM64:
  447. case MBX_READ_RPI64:
  448. case MBX_REG_LOGIN64:
  449. case MBX_READ_LA64:
  450. case MBX_FLASH_WR_ULA:
  451. case MBX_SET_DEBUG:
  452. case MBX_LOAD_EXP_ROM:
  453. ret = mbxCommand;
  454. break;
  455. default:
  456. ret = MBX_SHUTDOWN;
  457. break;
  458. }
  459. return (ret);
  460. }
  461. static void
  462. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  463. {
  464. wait_queue_head_t *pdone_q;
  465. /*
  466. * If pdone_q is empty, the driver thread gave up waiting and
  467. * continued running.
  468. */
  469. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  470. if (pdone_q)
  471. wake_up_interruptible(pdone_q);
  472. return;
  473. }
  474. void
  475. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  476. {
  477. struct lpfc_dmabuf *mp;
  478. mp = (struct lpfc_dmabuf *) (pmb->context1);
  479. if (mp) {
  480. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  481. kfree(mp);
  482. }
  483. mempool_free( pmb, phba->mbox_mem_pool);
  484. return;
  485. }
  486. int
  487. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  488. {
  489. MAILBOX_t *mbox;
  490. MAILBOX_t *pmbox;
  491. LPFC_MBOXQ_t *pmb;
  492. struct lpfc_sli *psli;
  493. int i, rc;
  494. uint32_t process_next;
  495. psli = &phba->sli;
  496. /* We should only get here if we are in SLI2 mode */
  497. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  498. return (1);
  499. }
  500. phba->sli.slistat.mbox_event++;
  501. /* Get a Mailbox buffer to setup mailbox commands for callback */
  502. if ((pmb = phba->sli.mbox_active)) {
  503. pmbox = &pmb->mb;
  504. mbox = &phba->slim2p->mbx;
  505. /* First check out the status word */
  506. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  507. /* Sanity check to ensure the host owns the mailbox */
  508. if (pmbox->mbxOwner != OWN_HOST) {
  509. /* Lets try for a while */
  510. for (i = 0; i < 10240; i++) {
  511. /* First copy command data */
  512. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  513. sizeof (uint32_t));
  514. if (pmbox->mbxOwner == OWN_HOST)
  515. goto mbout;
  516. }
  517. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  518. <status> */
  519. lpfc_printf_log(phba,
  520. KERN_WARNING,
  521. LOG_MBOX | LOG_SLI,
  522. "%d:0304 Stray Mailbox Interrupt "
  523. "mbxCommand x%x mbxStatus x%x\n",
  524. phba->brd_no,
  525. pmbox->mbxCommand,
  526. pmbox->mbxStatus);
  527. spin_lock_irq(phba->host->host_lock);
  528. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  529. spin_unlock_irq(phba->host->host_lock);
  530. return (1);
  531. }
  532. mbout:
  533. del_timer_sync(&phba->sli.mbox_tmo);
  534. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  535. /*
  536. * It is a fatal error if unknown mbox command completion.
  537. */
  538. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  539. MBX_SHUTDOWN) {
  540. /* Unknow mailbox command compl */
  541. lpfc_printf_log(phba,
  542. KERN_ERR,
  543. LOG_MBOX | LOG_SLI,
  544. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  545. phba->brd_no,
  546. pmbox->mbxCommand);
  547. phba->hba_state = LPFC_HBA_ERROR;
  548. phba->work_hs = HS_FFER3;
  549. lpfc_handle_eratt(phba);
  550. return (0);
  551. }
  552. phba->sli.mbox_active = NULL;
  553. if (pmbox->mbxStatus) {
  554. phba->sli.slistat.mbox_stat_err++;
  555. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  556. /* Mbox cmd cmpl error - RETRYing */
  557. lpfc_printf_log(phba,
  558. KERN_INFO,
  559. LOG_MBOX | LOG_SLI,
  560. "%d:0305 Mbox cmd cmpl error - "
  561. "RETRYing Data: x%x x%x x%x x%x\n",
  562. phba->brd_no,
  563. pmbox->mbxCommand,
  564. pmbox->mbxStatus,
  565. pmbox->un.varWords[0],
  566. phba->hba_state);
  567. pmbox->mbxStatus = 0;
  568. pmbox->mbxOwner = OWN_HOST;
  569. spin_lock_irq(phba->host->host_lock);
  570. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  571. spin_unlock_irq(phba->host->host_lock);
  572. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  573. if (rc == MBX_SUCCESS)
  574. return (0);
  575. }
  576. }
  577. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  578. lpfc_printf_log(phba,
  579. KERN_INFO,
  580. LOG_MBOX | LOG_SLI,
  581. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  582. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  583. phba->brd_no,
  584. pmbox->mbxCommand,
  585. pmb->mbox_cmpl,
  586. *((uint32_t *) pmbox),
  587. pmbox->un.varWords[0],
  588. pmbox->un.varWords[1],
  589. pmbox->un.varWords[2],
  590. pmbox->un.varWords[3],
  591. pmbox->un.varWords[4],
  592. pmbox->un.varWords[5],
  593. pmbox->un.varWords[6],
  594. pmbox->un.varWords[7]);
  595. if (pmb->mbox_cmpl) {
  596. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  597. pmb->mbox_cmpl(phba,pmb);
  598. }
  599. }
  600. do {
  601. process_next = 0; /* by default don't loop */
  602. spin_lock_irq(phba->host->host_lock);
  603. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  604. /* Process next mailbox command if there is one */
  605. if ((pmb = lpfc_mbox_get(phba))) {
  606. spin_unlock_irq(phba->host->host_lock);
  607. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  608. if (rc == MBX_NOT_FINISHED) {
  609. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  610. pmb->mbox_cmpl(phba,pmb);
  611. process_next = 1;
  612. continue; /* loop back */
  613. }
  614. } else {
  615. spin_unlock_irq(phba->host->host_lock);
  616. /* Turn on IOCB processing */
  617. for (i = 0; i < phba->sli.num_rings; i++) {
  618. lpfc_sli_turn_on_ring(phba, i);
  619. }
  620. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  621. while (!list_empty(&phba->freebufList)) {
  622. struct lpfc_dmabuf *mp;
  623. mp = NULL;
  624. list_remove_head((&phba->freebufList),
  625. mp,
  626. struct lpfc_dmabuf,
  627. list);
  628. if (mp) {
  629. lpfc_mbuf_free(phba, mp->virt,
  630. mp->phys);
  631. kfree(mp);
  632. }
  633. }
  634. }
  635. } while (process_next);
  636. return (0);
  637. }
  638. static int
  639. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  640. struct lpfc_iocbq *saveq)
  641. {
  642. IOCB_t * irsp;
  643. WORD5 * w5p;
  644. uint32_t Rctl, Type;
  645. uint32_t match, i;
  646. match = 0;
  647. irsp = &(saveq->iocb);
  648. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  649. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  650. Rctl = FC_ELS_REQ;
  651. Type = FC_ELS_DATA;
  652. } else {
  653. w5p =
  654. (WORD5 *) & (saveq->iocb.un.
  655. ulpWord[5]);
  656. Rctl = w5p->hcsw.Rctl;
  657. Type = w5p->hcsw.Type;
  658. /* Firmware Workaround */
  659. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  660. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  661. Rctl = FC_ELS_REQ;
  662. Type = FC_ELS_DATA;
  663. w5p->hcsw.Rctl = Rctl;
  664. w5p->hcsw.Type = Type;
  665. }
  666. }
  667. /* unSolicited Responses */
  668. if (pring->prt[0].profile) {
  669. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  670. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  671. saveq);
  672. match = 1;
  673. } else {
  674. /* We must search, based on rctl / type
  675. for the right routine */
  676. for (i = 0; i < pring->num_mask;
  677. i++) {
  678. if ((pring->prt[i].rctl ==
  679. Rctl)
  680. && (pring->prt[i].
  681. type == Type)) {
  682. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  683. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  684. (phba, pring, saveq);
  685. match = 1;
  686. break;
  687. }
  688. }
  689. }
  690. if (match == 0) {
  691. /* Unexpected Rctl / Type received */
  692. /* Ring <ringno> handler: unexpected
  693. Rctl <Rctl> Type <Type> received */
  694. lpfc_printf_log(phba,
  695. KERN_WARNING,
  696. LOG_SLI,
  697. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  698. "Type x%x received \n",
  699. phba->brd_no,
  700. pring->ringno,
  701. Rctl,
  702. Type);
  703. }
  704. return(1);
  705. }
  706. static struct lpfc_iocbq *
  707. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  708. struct lpfc_sli_ring * pring,
  709. struct lpfc_iocbq * prspiocb)
  710. {
  711. struct lpfc_iocbq *cmd_iocb = NULL;
  712. uint16_t iotag;
  713. iotag = prspiocb->iocb.ulpIoTag;
  714. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  715. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  716. list_del(&cmd_iocb->list);
  717. pring->txcmplq_cnt--;
  718. return cmd_iocb;
  719. }
  720. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  721. "%d:0317 iotag x%x is out off "
  722. "range: max iotag x%x wd0 x%x\n",
  723. phba->brd_no, iotag,
  724. phba->sli.last_iotag,
  725. *(((uint32_t *) &prspiocb->iocb) + 7));
  726. return NULL;
  727. }
  728. static int
  729. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  730. struct lpfc_iocbq *saveq)
  731. {
  732. struct lpfc_iocbq * cmdiocbp;
  733. int rc = 1;
  734. unsigned long iflag;
  735. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  736. spin_lock_irqsave(phba->host->host_lock, iflag);
  737. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  738. if (cmdiocbp) {
  739. if (cmdiocbp->iocb_cmpl) {
  740. /*
  741. * Post all ELS completions to the worker thread.
  742. * All other are passed to the completion callback.
  743. */
  744. if (pring->ringno == LPFC_ELS_RING) {
  745. spin_unlock_irqrestore(phba->host->host_lock,
  746. iflag);
  747. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  748. spin_lock_irqsave(phba->host->host_lock, iflag);
  749. }
  750. else {
  751. spin_unlock_irqrestore(phba->host->host_lock,
  752. iflag);
  753. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  754. spin_lock_irqsave(phba->host->host_lock, iflag);
  755. }
  756. } else
  757. lpfc_sli_release_iocbq(phba, cmdiocbp);
  758. } else {
  759. /*
  760. * Unknown initiating command based on the response iotag.
  761. * This could be the case on the ELS ring because of
  762. * lpfc_els_abort().
  763. */
  764. if (pring->ringno != LPFC_ELS_RING) {
  765. /*
  766. * Ring <ringno> handler: unexpected completion IoTag
  767. * <IoTag>
  768. */
  769. lpfc_printf_log(phba,
  770. KERN_WARNING,
  771. LOG_SLI,
  772. "%d:0322 Ring %d handler: unexpected "
  773. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  774. phba->brd_no,
  775. pring->ringno,
  776. saveq->iocb.ulpIoTag,
  777. saveq->iocb.ulpStatus,
  778. saveq->iocb.un.ulpWord[4],
  779. saveq->iocb.ulpCommand,
  780. saveq->iocb.ulpContext);
  781. }
  782. }
  783. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  784. return rc;
  785. }
  786. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  787. struct lpfc_sli_ring * pring)
  788. {
  789. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  790. /*
  791. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  792. * rsp ring <portRspMax>
  793. */
  794. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  795. "%d:0312 Ring %d handler: portRspPut %d "
  796. "is bigger then rsp ring %d\n",
  797. phba->brd_no, pring->ringno,
  798. le32_to_cpu(pgp->rspPutInx),
  799. pring->numRiocb);
  800. phba->hba_state = LPFC_HBA_ERROR;
  801. /*
  802. * All error attention handlers are posted to
  803. * worker thread
  804. */
  805. phba->work_ha |= HA_ERATT;
  806. phba->work_hs = HS_FFER3;
  807. if (phba->work_wait)
  808. wake_up(phba->work_wait);
  809. return;
  810. }
  811. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  812. {
  813. struct lpfc_sli * psli = &phba->sli;
  814. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  815. IOCB_t *irsp = NULL;
  816. IOCB_t *entry = NULL;
  817. struct lpfc_iocbq *cmdiocbq = NULL;
  818. struct lpfc_iocbq rspiocbq;
  819. struct lpfc_pgp *pgp;
  820. uint32_t status;
  821. uint32_t portRspPut, portRspMax;
  822. int type;
  823. uint32_t rsp_cmpl = 0;
  824. void __iomem *to_slim;
  825. uint32_t ha_copy;
  826. pring->stats.iocb_event++;
  827. /* The driver assumes SLI-2 mode */
  828. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  829. /*
  830. * The next available response entry should never exceed the maximum
  831. * entries. If it does, treat it as an adapter hardware error.
  832. */
  833. portRspMax = pring->numRiocb;
  834. portRspPut = le32_to_cpu(pgp->rspPutInx);
  835. if (unlikely(portRspPut >= portRspMax)) {
  836. lpfc_sli_rsp_pointers_error(phba, pring);
  837. return;
  838. }
  839. rmb();
  840. while (pring->rspidx != portRspPut) {
  841. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  842. if (++pring->rspidx >= portRspMax)
  843. pring->rspidx = 0;
  844. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  845. (uint32_t *) &rspiocbq.iocb,
  846. sizeof (IOCB_t));
  847. irsp = &rspiocbq.iocb;
  848. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  849. pring->stats.iocb_rsp++;
  850. rsp_cmpl++;
  851. if (unlikely(irsp->ulpStatus)) {
  852. /* Rsp ring <ringno> error: IOCB */
  853. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  854. "%d:0326 Rsp Ring %d error: IOCB Data: "
  855. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  856. phba->brd_no, pring->ringno,
  857. irsp->un.ulpWord[0],
  858. irsp->un.ulpWord[1],
  859. irsp->un.ulpWord[2],
  860. irsp->un.ulpWord[3],
  861. irsp->un.ulpWord[4],
  862. irsp->un.ulpWord[5],
  863. *(((uint32_t *) irsp) + 6),
  864. *(((uint32_t *) irsp) + 7));
  865. }
  866. switch (type) {
  867. case LPFC_ABORT_IOCB:
  868. case LPFC_SOL_IOCB:
  869. /*
  870. * Idle exchange closed via ABTS from port. No iocb
  871. * resources need to be recovered.
  872. */
  873. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  874. printk(KERN_INFO "%s: IOCB cmd 0x%x processed."
  875. " Skipping completion\n", __FUNCTION__,
  876. irsp->ulpCommand);
  877. break;
  878. }
  879. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  880. &rspiocbq);
  881. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  882. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  883. &rspiocbq);
  884. }
  885. break;
  886. default:
  887. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  888. char adaptermsg[LPFC_MAX_ADPTMSG];
  889. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  890. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  891. MAX_MSG_DATA);
  892. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  893. phba->brd_no, adaptermsg);
  894. } else {
  895. /* Unknown IOCB command */
  896. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  897. "%d:0321 Unknown IOCB command "
  898. "Data: x%x, x%x x%x x%x x%x\n",
  899. phba->brd_no, type,
  900. irsp->ulpCommand,
  901. irsp->ulpStatus,
  902. irsp->ulpIoTag,
  903. irsp->ulpContext);
  904. }
  905. break;
  906. }
  907. /*
  908. * The response IOCB has been processed. Update the ring
  909. * pointer in SLIM. If the port response put pointer has not
  910. * been updated, sync the pgp->rspPutInx and fetch the new port
  911. * response put pointer.
  912. */
  913. to_slim = phba->MBslimaddr +
  914. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  915. writeb(pring->rspidx, to_slim);
  916. if (pring->rspidx == portRspPut)
  917. portRspPut = le32_to_cpu(pgp->rspPutInx);
  918. }
  919. ha_copy = readl(phba->HAregaddr);
  920. ha_copy >>= (LPFC_FCP_RING * 4);
  921. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  922. pring->stats.iocb_rsp_full++;
  923. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  924. writel(status, phba->CAregaddr);
  925. readl(phba->CAregaddr);
  926. }
  927. if ((ha_copy & HA_R0CE_RSP) &&
  928. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  929. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  930. pring->stats.iocb_cmd_empty++;
  931. /* Force update of the local copy of cmdGetInx */
  932. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  933. lpfc_sli_resume_iocb(phba, pring);
  934. if ((pring->lpfc_sli_cmd_available))
  935. (pring->lpfc_sli_cmd_available) (phba, pring);
  936. }
  937. return;
  938. }
  939. /*
  940. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  941. * to check it explicitly.
  942. */
  943. static int
  944. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  945. struct lpfc_sli_ring * pring, uint32_t mask)
  946. {
  947. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  948. IOCB_t *irsp = NULL;
  949. IOCB_t *entry = NULL;
  950. struct lpfc_iocbq *cmdiocbq = NULL;
  951. struct lpfc_iocbq rspiocbq;
  952. uint32_t status;
  953. uint32_t portRspPut, portRspMax;
  954. int rc = 1;
  955. lpfc_iocb_type type;
  956. unsigned long iflag;
  957. uint32_t rsp_cmpl = 0;
  958. void __iomem *to_slim;
  959. spin_lock_irqsave(phba->host->host_lock, iflag);
  960. pring->stats.iocb_event++;
  961. /*
  962. * The next available response entry should never exceed the maximum
  963. * entries. If it does, treat it as an adapter hardware error.
  964. */
  965. portRspMax = pring->numRiocb;
  966. portRspPut = le32_to_cpu(pgp->rspPutInx);
  967. if (unlikely(portRspPut >= portRspMax)) {
  968. lpfc_sli_rsp_pointers_error(phba, pring);
  969. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  970. return 1;
  971. }
  972. rmb();
  973. while (pring->rspidx != portRspPut) {
  974. /*
  975. * Fetch an entry off the ring and copy it into a local data
  976. * structure. The copy involves a byte-swap since the
  977. * network byte order and pci byte orders are different.
  978. */
  979. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  980. if (++pring->rspidx >= portRspMax)
  981. pring->rspidx = 0;
  982. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  983. (uint32_t *) &rspiocbq.iocb,
  984. sizeof (IOCB_t));
  985. irsp = &rspiocbq.iocb;
  986. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  987. pring->stats.iocb_rsp++;
  988. rsp_cmpl++;
  989. if (unlikely(irsp->ulpStatus)) {
  990. /* Rsp ring <ringno> error: IOCB */
  991. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  992. "%d:0326 Rsp Ring %d error: IOCB Data: "
  993. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  994. phba->brd_no, pring->ringno,
  995. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  996. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  997. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  998. *(((uint32_t *) irsp) + 6),
  999. *(((uint32_t *) irsp) + 7));
  1000. }
  1001. switch (type) {
  1002. case LPFC_ABORT_IOCB:
  1003. case LPFC_SOL_IOCB:
  1004. /*
  1005. * Idle exchange closed via ABTS from port. No iocb
  1006. * resources need to be recovered.
  1007. */
  1008. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1009. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  1010. "Skipping completion\n", __FUNCTION__,
  1011. irsp->ulpCommand);
  1012. break;
  1013. }
  1014. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1015. &rspiocbq);
  1016. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1017. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1018. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1019. &rspiocbq);
  1020. } else {
  1021. spin_unlock_irqrestore(
  1022. phba->host->host_lock, iflag);
  1023. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1024. &rspiocbq);
  1025. spin_lock_irqsave(phba->host->host_lock,
  1026. iflag);
  1027. }
  1028. }
  1029. break;
  1030. default:
  1031. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1032. char adaptermsg[LPFC_MAX_ADPTMSG];
  1033. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1034. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1035. MAX_MSG_DATA);
  1036. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1037. phba->brd_no, adaptermsg);
  1038. } else {
  1039. /* Unknown IOCB command */
  1040. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1041. "%d:0321 Unknown IOCB command "
  1042. "Data: x%x, x%x x%x x%x x%x\n",
  1043. phba->brd_no, type, irsp->ulpCommand,
  1044. irsp->ulpStatus, irsp->ulpIoTag,
  1045. irsp->ulpContext);
  1046. }
  1047. break;
  1048. }
  1049. /*
  1050. * The response IOCB has been processed. Update the ring
  1051. * pointer in SLIM. If the port response put pointer has not
  1052. * been updated, sync the pgp->rspPutInx and fetch the new port
  1053. * response put pointer.
  1054. */
  1055. to_slim = phba->MBslimaddr +
  1056. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1057. writel(pring->rspidx, to_slim);
  1058. if (pring->rspidx == portRspPut)
  1059. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1060. }
  1061. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1062. pring->stats.iocb_rsp_full++;
  1063. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1064. writel(status, phba->CAregaddr);
  1065. readl(phba->CAregaddr);
  1066. }
  1067. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1068. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1069. pring->stats.iocb_cmd_empty++;
  1070. /* Force update of the local copy of cmdGetInx */
  1071. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1072. lpfc_sli_resume_iocb(phba, pring);
  1073. if ((pring->lpfc_sli_cmd_available))
  1074. (pring->lpfc_sli_cmd_available) (phba, pring);
  1075. }
  1076. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1077. return rc;
  1078. }
  1079. int
  1080. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1081. struct lpfc_sli_ring * pring, uint32_t mask)
  1082. {
  1083. IOCB_t *entry;
  1084. IOCB_t *irsp = NULL;
  1085. struct lpfc_iocbq *rspiocbp = NULL;
  1086. struct lpfc_iocbq *next_iocb;
  1087. struct lpfc_iocbq *cmdiocbp;
  1088. struct lpfc_iocbq *saveq;
  1089. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1090. uint8_t iocb_cmd_type;
  1091. lpfc_iocb_type type;
  1092. uint32_t status, free_saveq;
  1093. uint32_t portRspPut, portRspMax;
  1094. int rc = 1;
  1095. unsigned long iflag;
  1096. void __iomem *to_slim;
  1097. spin_lock_irqsave(phba->host->host_lock, iflag);
  1098. pring->stats.iocb_event++;
  1099. /*
  1100. * The next available response entry should never exceed the maximum
  1101. * entries. If it does, treat it as an adapter hardware error.
  1102. */
  1103. portRspMax = pring->numRiocb;
  1104. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1105. if (portRspPut >= portRspMax) {
  1106. /*
  1107. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1108. * rsp ring <portRspMax>
  1109. */
  1110. lpfc_printf_log(phba,
  1111. KERN_ERR,
  1112. LOG_SLI,
  1113. "%d:0312 Ring %d handler: portRspPut %d "
  1114. "is bigger then rsp ring %d\n",
  1115. phba->brd_no,
  1116. pring->ringno, portRspPut, portRspMax);
  1117. phba->hba_state = LPFC_HBA_ERROR;
  1118. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1119. phba->work_hs = HS_FFER3;
  1120. lpfc_handle_eratt(phba);
  1121. return 1;
  1122. }
  1123. rmb();
  1124. while (pring->rspidx != portRspPut) {
  1125. /*
  1126. * Build a completion list and call the appropriate handler.
  1127. * The process is to get the next available response iocb, get
  1128. * a free iocb from the list, copy the response data into the
  1129. * free iocb, insert to the continuation list, and update the
  1130. * next response index to slim. This process makes response
  1131. * iocb's in the ring available to DMA as fast as possible but
  1132. * pays a penalty for a copy operation. Since the iocb is
  1133. * only 32 bytes, this penalty is considered small relative to
  1134. * the PCI reads for register values and a slim write. When
  1135. * the ulpLe field is set, the entire Command has been
  1136. * received.
  1137. */
  1138. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1139. rspiocbp = lpfc_sli_get_iocbq(phba);
  1140. if (rspiocbp == NULL) {
  1141. printk(KERN_ERR "%s: out of buffers! Failing "
  1142. "completion.\n", __FUNCTION__);
  1143. break;
  1144. }
  1145. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1146. irsp = &rspiocbp->iocb;
  1147. if (++pring->rspidx >= portRspMax)
  1148. pring->rspidx = 0;
  1149. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1150. + 1) * 4;
  1151. writel(pring->rspidx, to_slim);
  1152. if (list_empty(&(pring->iocb_continueq))) {
  1153. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1154. } else {
  1155. list_add_tail(&rspiocbp->list,
  1156. &(pring->iocb_continueq));
  1157. }
  1158. pring->iocb_continueq_cnt++;
  1159. if (irsp->ulpLe) {
  1160. /*
  1161. * By default, the driver expects to free all resources
  1162. * associated with this iocb completion.
  1163. */
  1164. free_saveq = 1;
  1165. saveq = list_get_first(&pring->iocb_continueq,
  1166. struct lpfc_iocbq, list);
  1167. irsp = &(saveq->iocb);
  1168. list_del_init(&pring->iocb_continueq);
  1169. pring->iocb_continueq_cnt = 0;
  1170. pring->stats.iocb_rsp++;
  1171. if (irsp->ulpStatus) {
  1172. /* Rsp ring <ringno> error: IOCB */
  1173. lpfc_printf_log(phba,
  1174. KERN_WARNING,
  1175. LOG_SLI,
  1176. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1177. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1178. phba->brd_no,
  1179. pring->ringno,
  1180. irsp->un.ulpWord[0],
  1181. irsp->un.ulpWord[1],
  1182. irsp->un.ulpWord[2],
  1183. irsp->un.ulpWord[3],
  1184. irsp->un.ulpWord[4],
  1185. irsp->un.ulpWord[5],
  1186. *(((uint32_t *) irsp) + 6),
  1187. *(((uint32_t *) irsp) + 7));
  1188. }
  1189. /*
  1190. * Fetch the IOCB command type and call the correct
  1191. * completion routine. Solicited and Unsolicited
  1192. * IOCBs on the ELS ring get freed back to the
  1193. * lpfc_iocb_list by the discovery kernel thread.
  1194. */
  1195. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1196. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1197. if (type == LPFC_SOL_IOCB) {
  1198. spin_unlock_irqrestore(phba->host->host_lock,
  1199. iflag);
  1200. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1201. saveq);
  1202. spin_lock_irqsave(phba->host->host_lock, iflag);
  1203. } else if (type == LPFC_UNSOL_IOCB) {
  1204. spin_unlock_irqrestore(phba->host->host_lock,
  1205. iflag);
  1206. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1207. saveq);
  1208. spin_lock_irqsave(phba->host->host_lock, iflag);
  1209. } else if (type == LPFC_ABORT_IOCB) {
  1210. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1211. ((cmdiocbp =
  1212. lpfc_sli_iocbq_lookup(phba, pring,
  1213. saveq)))) {
  1214. /* Call the specified completion
  1215. routine */
  1216. if (cmdiocbp->iocb_cmpl) {
  1217. spin_unlock_irqrestore(
  1218. phba->host->host_lock,
  1219. iflag);
  1220. (cmdiocbp->iocb_cmpl) (phba,
  1221. cmdiocbp, saveq);
  1222. spin_lock_irqsave(
  1223. phba->host->host_lock,
  1224. iflag);
  1225. } else
  1226. lpfc_sli_release_iocbq(phba,
  1227. cmdiocbp);
  1228. }
  1229. } else if (type == LPFC_UNKNOWN_IOCB) {
  1230. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1231. char adaptermsg[LPFC_MAX_ADPTMSG];
  1232. memset(adaptermsg, 0,
  1233. LPFC_MAX_ADPTMSG);
  1234. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1235. MAX_MSG_DATA);
  1236. dev_warn(&((phba->pcidev)->dev),
  1237. "lpfc%d: %s",
  1238. phba->brd_no, adaptermsg);
  1239. } else {
  1240. /* Unknown IOCB command */
  1241. lpfc_printf_log(phba,
  1242. KERN_ERR,
  1243. LOG_SLI,
  1244. "%d:0321 Unknown IOCB command "
  1245. "Data: x%x x%x x%x x%x\n",
  1246. phba->brd_no,
  1247. irsp->ulpCommand,
  1248. irsp->ulpStatus,
  1249. irsp->ulpIoTag,
  1250. irsp->ulpContext);
  1251. }
  1252. }
  1253. if (free_saveq) {
  1254. if (!list_empty(&saveq->list)) {
  1255. list_for_each_entry_safe(rspiocbp,
  1256. next_iocb,
  1257. &saveq->list,
  1258. list) {
  1259. list_del(&rspiocbp->list);
  1260. lpfc_sli_release_iocbq(phba,
  1261. rspiocbp);
  1262. }
  1263. }
  1264. lpfc_sli_release_iocbq(phba, saveq);
  1265. }
  1266. }
  1267. /*
  1268. * If the port response put pointer has not been updated, sync
  1269. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1270. * response put pointer.
  1271. */
  1272. if (pring->rspidx == portRspPut) {
  1273. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1274. }
  1275. } /* while (pring->rspidx != portRspPut) */
  1276. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1277. /* At least one response entry has been freed */
  1278. pring->stats.iocb_rsp_full++;
  1279. /* SET RxRE_RSP in Chip Att register */
  1280. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1281. writel(status, phba->CAregaddr);
  1282. readl(phba->CAregaddr); /* flush */
  1283. }
  1284. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1285. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1286. pring->stats.iocb_cmd_empty++;
  1287. /* Force update of the local copy of cmdGetInx */
  1288. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1289. lpfc_sli_resume_iocb(phba, pring);
  1290. if ((pring->lpfc_sli_cmd_available))
  1291. (pring->lpfc_sli_cmd_available) (phba, pring);
  1292. }
  1293. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1294. return rc;
  1295. }
  1296. int
  1297. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1298. {
  1299. struct lpfc_iocbq *iocb, *next_iocb;
  1300. IOCB_t *icmd = NULL, *cmd = NULL;
  1301. int errcnt;
  1302. errcnt = 0;
  1303. /* Error everything on txq and txcmplq
  1304. * First do the txq.
  1305. */
  1306. spin_lock_irq(phba->host->host_lock);
  1307. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1308. list_del_init(&iocb->list);
  1309. if (iocb->iocb_cmpl) {
  1310. icmd = &iocb->iocb;
  1311. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1312. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1313. spin_unlock_irq(phba->host->host_lock);
  1314. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1315. spin_lock_irq(phba->host->host_lock);
  1316. } else
  1317. lpfc_sli_release_iocbq(phba, iocb);
  1318. }
  1319. pring->txq_cnt = 0;
  1320. INIT_LIST_HEAD(&(pring->txq));
  1321. /* Next issue ABTS for everything on the txcmplq */
  1322. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1323. cmd = &iocb->iocb;
  1324. /*
  1325. * Imediate abort of IOCB, deque and call compl
  1326. */
  1327. list_del_init(&iocb->list);
  1328. pring->txcmplq_cnt--;
  1329. if (iocb->iocb_cmpl) {
  1330. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1331. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1332. spin_unlock_irq(phba->host->host_lock);
  1333. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1334. spin_lock_irq(phba->host->host_lock);
  1335. } else
  1336. lpfc_sli_release_iocbq(phba, iocb);
  1337. }
  1338. INIT_LIST_HEAD(&pring->txcmplq);
  1339. pring->txcmplq_cnt = 0;
  1340. spin_unlock_irq(phba->host->host_lock);
  1341. return errcnt;
  1342. }
  1343. int
  1344. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1345. {
  1346. uint32_t status;
  1347. int i = 0;
  1348. int retval = 0;
  1349. /* Read the HBA Host Status Register */
  1350. status = readl(phba->HSregaddr);
  1351. /*
  1352. * Check status register every 100ms for 5 retries, then every
  1353. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1354. * every 2.5 sec for 4.
  1355. * Break our of the loop if errors occurred during init.
  1356. */
  1357. while (((status & mask) != mask) &&
  1358. !(status & HS_FFERM) &&
  1359. i++ < 20) {
  1360. if (i <= 5)
  1361. msleep(10);
  1362. else if (i <= 10)
  1363. msleep(500);
  1364. else
  1365. msleep(2500);
  1366. if (i == 15) {
  1367. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1368. lpfc_sli_brdrestart(phba);
  1369. }
  1370. /* Read the HBA Host Status Register */
  1371. status = readl(phba->HSregaddr);
  1372. }
  1373. /* Check to see if any errors occurred during init */
  1374. if ((status & HS_FFERM) || (i >= 20)) {
  1375. phba->hba_state = LPFC_HBA_ERROR;
  1376. retval = 1;
  1377. }
  1378. return retval;
  1379. }
  1380. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1381. void lpfc_reset_barrier(struct lpfc_hba * phba)
  1382. {
  1383. uint32_t __iomem *resp_buf;
  1384. uint32_t __iomem *mbox_buf;
  1385. volatile uint32_t mbox;
  1386. uint32_t hc_copy;
  1387. int i;
  1388. uint8_t hdrtype;
  1389. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1390. if (hdrtype != 0x80 ||
  1391. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1392. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1393. return;
  1394. /*
  1395. * Tell the other part of the chip to suspend temporarily all
  1396. * its DMA activity.
  1397. */
  1398. resp_buf = phba->MBslimaddr;
  1399. /* Disable the error attention */
  1400. hc_copy = readl(phba->HCregaddr);
  1401. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1402. readl(phba->HCregaddr); /* flush */
  1403. if (readl(phba->HAregaddr) & HA_ERATT) {
  1404. /* Clear Chip error bit */
  1405. writel(HA_ERATT, phba->HAregaddr);
  1406. phba->stopped = 1;
  1407. }
  1408. mbox = 0;
  1409. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1410. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1411. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1412. mbox_buf = phba->MBslimaddr;
  1413. writel(mbox, mbox_buf);
  1414. for (i = 0;
  1415. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1416. mdelay(1);
  1417. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1418. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1419. phba->stopped)
  1420. goto restore_hc;
  1421. else
  1422. goto clear_errat;
  1423. }
  1424. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1425. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1426. mdelay(1);
  1427. clear_errat:
  1428. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1429. mdelay(1);
  1430. if (readl(phba->HAregaddr) & HA_ERATT) {
  1431. writel(HA_ERATT, phba->HAregaddr);
  1432. phba->stopped = 1;
  1433. }
  1434. restore_hc:
  1435. writel(hc_copy, phba->HCregaddr);
  1436. readl(phba->HCregaddr); /* flush */
  1437. }
  1438. int
  1439. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1440. {
  1441. struct lpfc_sli *psli;
  1442. LPFC_MBOXQ_t *pmb;
  1443. uint32_t status;
  1444. uint32_t ha_copy;
  1445. int retval;
  1446. int i = 0;
  1447. psli = &phba->sli;
  1448. /* Kill HBA */
  1449. lpfc_printf_log(phba,
  1450. KERN_INFO,
  1451. LOG_SLI,
  1452. "%d:0329 Kill HBA Data: x%x x%x\n",
  1453. phba->brd_no,
  1454. phba->hba_state,
  1455. psli->sli_flag);
  1456. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1457. GFP_KERNEL)) == 0)
  1458. return 1;
  1459. /* Disable the error attention */
  1460. spin_lock_irq(phba->host->host_lock);
  1461. status = readl(phba->HCregaddr);
  1462. status &= ~HC_ERINT_ENA;
  1463. writel(status, phba->HCregaddr);
  1464. readl(phba->HCregaddr); /* flush */
  1465. spin_unlock_irq(phba->host->host_lock);
  1466. lpfc_kill_board(phba, pmb);
  1467. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1468. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1469. if (retval != MBX_SUCCESS) {
  1470. if (retval != MBX_BUSY)
  1471. mempool_free(pmb, phba->mbox_mem_pool);
  1472. return 1;
  1473. }
  1474. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1475. mempool_free(pmb, phba->mbox_mem_pool);
  1476. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1477. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1478. * 3 seconds we still set HBA_ERROR state because the status of the
  1479. * board is now undefined.
  1480. */
  1481. ha_copy = readl(phba->HAregaddr);
  1482. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1483. mdelay(100);
  1484. ha_copy = readl(phba->HAregaddr);
  1485. }
  1486. del_timer_sync(&psli->mbox_tmo);
  1487. if (ha_copy & HA_ERATT) {
  1488. writel(HA_ERATT, phba->HAregaddr);
  1489. phba->stopped = 1;
  1490. }
  1491. spin_lock_irq(phba->host->host_lock);
  1492. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1493. spin_unlock_irq(phba->host->host_lock);
  1494. psli->mbox_active = NULL;
  1495. lpfc_hba_down_post(phba);
  1496. phba->hba_state = LPFC_HBA_ERROR;
  1497. return (ha_copy & HA_ERATT ? 0 : 1);
  1498. }
  1499. int
  1500. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1501. {
  1502. struct lpfc_sli *psli;
  1503. struct lpfc_sli_ring *pring;
  1504. uint16_t cfg_value;
  1505. int i;
  1506. psli = &phba->sli;
  1507. /* Reset HBA */
  1508. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1509. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1510. phba->hba_state, psli->sli_flag);
  1511. /* perform board reset */
  1512. phba->fc_eventTag = 0;
  1513. phba->fc_myDID = 0;
  1514. phba->fc_prevDID = 0;
  1515. /* Turn off parity checking and serr during the physical reset */
  1516. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1517. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1518. (cfg_value &
  1519. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1520. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1521. /* Now toggle INITFF bit in the Host Control Register */
  1522. writel(HC_INITFF, phba->HCregaddr);
  1523. mdelay(1);
  1524. readl(phba->HCregaddr); /* flush */
  1525. writel(0, phba->HCregaddr);
  1526. readl(phba->HCregaddr); /* flush */
  1527. /* Restore PCI cmd register */
  1528. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1529. /* Initialize relevant SLI info */
  1530. for (i = 0; i < psli->num_rings; i++) {
  1531. pring = &psli->ring[i];
  1532. pring->flag = 0;
  1533. pring->rspidx = 0;
  1534. pring->next_cmdidx = 0;
  1535. pring->local_getidx = 0;
  1536. pring->cmdidx = 0;
  1537. pring->missbufcnt = 0;
  1538. }
  1539. phba->hba_state = LPFC_WARM_START;
  1540. return 0;
  1541. }
  1542. int
  1543. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1544. {
  1545. MAILBOX_t *mb;
  1546. struct lpfc_sli *psli;
  1547. uint16_t skip_post;
  1548. volatile uint32_t word0;
  1549. void __iomem *to_slim;
  1550. spin_lock_irq(phba->host->host_lock);
  1551. psli = &phba->sli;
  1552. /* Restart HBA */
  1553. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1554. "%d:0328 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1555. phba->hba_state, psli->sli_flag);
  1556. word0 = 0;
  1557. mb = (MAILBOX_t *) &word0;
  1558. mb->mbxCommand = MBX_RESTART;
  1559. mb->mbxHc = 1;
  1560. lpfc_reset_barrier(phba);
  1561. to_slim = phba->MBslimaddr;
  1562. writel(*(uint32_t *) mb, to_slim);
  1563. readl(to_slim); /* flush */
  1564. /* Only skip post after fc_ffinit is completed */
  1565. if (phba->hba_state) {
  1566. skip_post = 1;
  1567. word0 = 1; /* This is really setting up word1 */
  1568. } else {
  1569. skip_post = 0;
  1570. word0 = 0; /* This is really setting up word1 */
  1571. }
  1572. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1573. writel(*(uint32_t *) mb, to_slim);
  1574. readl(to_slim); /* flush */
  1575. lpfc_sli_brdreset(phba);
  1576. phba->stopped = 0;
  1577. phba->hba_state = LPFC_INIT_START;
  1578. spin_unlock_irq(phba->host->host_lock);
  1579. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1580. psli->stats_start = get_seconds();
  1581. if (skip_post)
  1582. mdelay(100);
  1583. else
  1584. mdelay(2000);
  1585. lpfc_hba_down_post(phba);
  1586. return 0;
  1587. }
  1588. static int
  1589. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1590. {
  1591. uint32_t status, i = 0;
  1592. /* Read the HBA Host Status Register */
  1593. status = readl(phba->HSregaddr);
  1594. /* Check status register to see what current state is */
  1595. i = 0;
  1596. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1597. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1598. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1599. * 4.
  1600. */
  1601. if (i++ >= 20) {
  1602. /* Adapter failed to init, timeout, status reg
  1603. <status> */
  1604. lpfc_printf_log(phba,
  1605. KERN_ERR,
  1606. LOG_INIT,
  1607. "%d:0436 Adapter failed to init, "
  1608. "timeout, status reg x%x\n",
  1609. phba->brd_no,
  1610. status);
  1611. phba->hba_state = LPFC_HBA_ERROR;
  1612. return -ETIMEDOUT;
  1613. }
  1614. /* Check to see if any errors occurred during init */
  1615. if (status & HS_FFERM) {
  1616. /* ERROR: During chipset initialization */
  1617. /* Adapter failed to init, chipset, status reg
  1618. <status> */
  1619. lpfc_printf_log(phba,
  1620. KERN_ERR,
  1621. LOG_INIT,
  1622. "%d:0437 Adapter failed to init, "
  1623. "chipset, status reg x%x\n",
  1624. phba->brd_no,
  1625. status);
  1626. phba->hba_state = LPFC_HBA_ERROR;
  1627. return -EIO;
  1628. }
  1629. if (i <= 5) {
  1630. msleep(10);
  1631. } else if (i <= 10) {
  1632. msleep(500);
  1633. } else {
  1634. msleep(2500);
  1635. }
  1636. if (i == 15) {
  1637. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1638. lpfc_sli_brdrestart(phba);
  1639. }
  1640. /* Read the HBA Host Status Register */
  1641. status = readl(phba->HSregaddr);
  1642. }
  1643. /* Check to see if any errors occurred during init */
  1644. if (status & HS_FFERM) {
  1645. /* ERROR: During chipset initialization */
  1646. /* Adapter failed to init, chipset, status reg <status> */
  1647. lpfc_printf_log(phba,
  1648. KERN_ERR,
  1649. LOG_INIT,
  1650. "%d:0438 Adapter failed to init, chipset, "
  1651. "status reg x%x\n",
  1652. phba->brd_no,
  1653. status);
  1654. phba->hba_state = LPFC_HBA_ERROR;
  1655. return -EIO;
  1656. }
  1657. /* Clear all interrupt enable conditions */
  1658. writel(0, phba->HCregaddr);
  1659. readl(phba->HCregaddr); /* flush */
  1660. /* setup host attn register */
  1661. writel(0xffffffff, phba->HAregaddr);
  1662. readl(phba->HAregaddr); /* flush */
  1663. return 0;
  1664. }
  1665. int
  1666. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1667. {
  1668. LPFC_MBOXQ_t *pmb;
  1669. uint32_t resetcount = 0, rc = 0, done = 0;
  1670. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1671. if (!pmb) {
  1672. phba->hba_state = LPFC_HBA_ERROR;
  1673. return -ENOMEM;
  1674. }
  1675. while (resetcount < 2 && !done) {
  1676. spin_lock_irq(phba->host->host_lock);
  1677. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1678. spin_unlock_irq(phba->host->host_lock);
  1679. phba->hba_state = LPFC_STATE_UNKNOWN;
  1680. lpfc_sli_brdrestart(phba);
  1681. msleep(2500);
  1682. rc = lpfc_sli_chipset_init(phba);
  1683. if (rc)
  1684. break;
  1685. spin_lock_irq(phba->host->host_lock);
  1686. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1687. spin_unlock_irq(phba->host->host_lock);
  1688. resetcount++;
  1689. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1690. * means the call was successful. Any other nonzero value is a failure,
  1691. * but if ERESTART is returned, the driver may reset the HBA and try
  1692. * again.
  1693. */
  1694. rc = lpfc_config_port_prep(phba);
  1695. if (rc == -ERESTART) {
  1696. phba->hba_state = 0;
  1697. continue;
  1698. } else if (rc) {
  1699. break;
  1700. }
  1701. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1702. lpfc_config_port(phba, pmb);
  1703. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1704. if (rc == MBX_SUCCESS)
  1705. done = 1;
  1706. else {
  1707. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1708. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1709. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1710. phba->brd_no, pmb->mb.mbxCommand,
  1711. pmb->mb.mbxStatus, 0);
  1712. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1713. }
  1714. }
  1715. if (!done)
  1716. goto lpfc_sli_hba_setup_error;
  1717. rc = lpfc_sli_ring_map(phba, pmb);
  1718. if (rc)
  1719. goto lpfc_sli_hba_setup_error;
  1720. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1721. rc = lpfc_config_port_post(phba);
  1722. if (rc)
  1723. goto lpfc_sli_hba_setup_error;
  1724. goto lpfc_sli_hba_setup_exit;
  1725. lpfc_sli_hba_setup_error:
  1726. phba->hba_state = LPFC_HBA_ERROR;
  1727. lpfc_sli_hba_setup_exit:
  1728. mempool_free(pmb, phba->mbox_mem_pool);
  1729. return rc;
  1730. }
  1731. static void
  1732. lpfc_mbox_abort(struct lpfc_hba * phba)
  1733. {
  1734. LPFC_MBOXQ_t *pmbox;
  1735. MAILBOX_t *mb;
  1736. if (phba->sli.mbox_active) {
  1737. del_timer_sync(&phba->sli.mbox_tmo);
  1738. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1739. pmbox = phba->sli.mbox_active;
  1740. mb = &pmbox->mb;
  1741. phba->sli.mbox_active = NULL;
  1742. if (pmbox->mbox_cmpl) {
  1743. mb->mbxStatus = MBX_NOT_FINISHED;
  1744. (pmbox->mbox_cmpl) (phba, pmbox);
  1745. }
  1746. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1747. }
  1748. /* Abort all the non active mailbox commands. */
  1749. spin_lock_irq(phba->host->host_lock);
  1750. pmbox = lpfc_mbox_get(phba);
  1751. while (pmbox) {
  1752. mb = &pmbox->mb;
  1753. if (pmbox->mbox_cmpl) {
  1754. mb->mbxStatus = MBX_NOT_FINISHED;
  1755. spin_unlock_irq(phba->host->host_lock);
  1756. (pmbox->mbox_cmpl) (phba, pmbox);
  1757. spin_lock_irq(phba->host->host_lock);
  1758. }
  1759. pmbox = lpfc_mbox_get(phba);
  1760. }
  1761. spin_unlock_irq(phba->host->host_lock);
  1762. return;
  1763. }
  1764. /*! lpfc_mbox_timeout
  1765. *
  1766. * \pre
  1767. * \post
  1768. * \param hba Pointer to per struct lpfc_hba structure
  1769. * \param l1 Pointer to the driver's mailbox queue.
  1770. * \return
  1771. * void
  1772. *
  1773. * \b Description:
  1774. *
  1775. * This routine handles mailbox timeout events at timer interrupt context.
  1776. */
  1777. void
  1778. lpfc_mbox_timeout(unsigned long ptr)
  1779. {
  1780. struct lpfc_hba *phba;
  1781. unsigned long iflag;
  1782. phba = (struct lpfc_hba *)ptr;
  1783. spin_lock_irqsave(phba->host->host_lock, iflag);
  1784. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1785. phba->work_hba_events |= WORKER_MBOX_TMO;
  1786. if (phba->work_wait)
  1787. wake_up(phba->work_wait);
  1788. }
  1789. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1790. }
  1791. void
  1792. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1793. {
  1794. LPFC_MBOXQ_t *pmbox;
  1795. MAILBOX_t *mb;
  1796. spin_lock_irq(phba->host->host_lock);
  1797. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1798. spin_unlock_irq(phba->host->host_lock);
  1799. return;
  1800. }
  1801. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1802. pmbox = phba->sli.mbox_active;
  1803. mb = &pmbox->mb;
  1804. /* Mbox cmd <mbxCommand> timeout */
  1805. lpfc_printf_log(phba,
  1806. KERN_ERR,
  1807. LOG_MBOX | LOG_SLI,
  1808. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1809. phba->brd_no,
  1810. mb->mbxCommand,
  1811. phba->hba_state,
  1812. phba->sli.sli_flag,
  1813. phba->sli.mbox_active);
  1814. phba->sli.mbox_active = NULL;
  1815. if (pmbox->mbox_cmpl) {
  1816. mb->mbxStatus = MBX_NOT_FINISHED;
  1817. spin_unlock_irq(phba->host->host_lock);
  1818. (pmbox->mbox_cmpl) (phba, pmbox);
  1819. spin_lock_irq(phba->host->host_lock);
  1820. }
  1821. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1822. spin_unlock_irq(phba->host->host_lock);
  1823. lpfc_mbox_abort(phba);
  1824. return;
  1825. }
  1826. int
  1827. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1828. {
  1829. MAILBOX_t *mb;
  1830. struct lpfc_sli *psli;
  1831. uint32_t status, evtctr;
  1832. uint32_t ha_copy;
  1833. int i;
  1834. unsigned long drvr_flag = 0;
  1835. volatile uint32_t word0, ldata;
  1836. void __iomem *to_slim;
  1837. psli = &phba->sli;
  1838. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1839. mb = &pmbox->mb;
  1840. status = MBX_SUCCESS;
  1841. if (phba->hba_state == LPFC_HBA_ERROR) {
  1842. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1843. /* Mbox command <mbxCommand> cannot issue */
  1844. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1845. return (MBX_NOT_FINISHED);
  1846. }
  1847. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  1848. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  1849. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1850. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1851. return (MBX_NOT_FINISHED);
  1852. }
  1853. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1854. /* Polling for a mbox command when another one is already active
  1855. * is not allowed in SLI. Also, the driver must have established
  1856. * SLI2 mode to queue and process multiple mbox commands.
  1857. */
  1858. if (flag & MBX_POLL) {
  1859. spin_unlock_irqrestore(phba->host->host_lock,
  1860. drvr_flag);
  1861. /* Mbox command <mbxCommand> cannot issue */
  1862. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1863. return (MBX_NOT_FINISHED);
  1864. }
  1865. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1866. spin_unlock_irqrestore(phba->host->host_lock,
  1867. drvr_flag);
  1868. /* Mbox command <mbxCommand> cannot issue */
  1869. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1870. return (MBX_NOT_FINISHED);
  1871. }
  1872. /* Handle STOP IOCB processing flag. This is only meaningful
  1873. * if we are not polling for mbox completion.
  1874. */
  1875. if (flag & MBX_STOP_IOCB) {
  1876. flag &= ~MBX_STOP_IOCB;
  1877. /* Now flag each ring */
  1878. for (i = 0; i < psli->num_rings; i++) {
  1879. /* If the ring is active, flag it */
  1880. if (psli->ring[i].cmdringaddr) {
  1881. psli->ring[i].flag |=
  1882. LPFC_STOP_IOCB_MBX;
  1883. }
  1884. }
  1885. }
  1886. /* Another mailbox command is still being processed, queue this
  1887. * command to be processed later.
  1888. */
  1889. lpfc_mbox_put(phba, pmbox);
  1890. /* Mbox cmd issue - BUSY */
  1891. lpfc_printf_log(phba,
  1892. KERN_INFO,
  1893. LOG_MBOX | LOG_SLI,
  1894. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1895. phba->brd_no,
  1896. mb->mbxCommand,
  1897. phba->hba_state,
  1898. psli->sli_flag,
  1899. flag);
  1900. psli->slistat.mbox_busy++;
  1901. spin_unlock_irqrestore(phba->host->host_lock,
  1902. drvr_flag);
  1903. return (MBX_BUSY);
  1904. }
  1905. /* Handle STOP IOCB processing flag. This is only meaningful
  1906. * if we are not polling for mbox completion.
  1907. */
  1908. if (flag & MBX_STOP_IOCB) {
  1909. flag &= ~MBX_STOP_IOCB;
  1910. if (flag == MBX_NOWAIT) {
  1911. /* Now flag each ring */
  1912. for (i = 0; i < psli->num_rings; i++) {
  1913. /* If the ring is active, flag it */
  1914. if (psli->ring[i].cmdringaddr) {
  1915. psli->ring[i].flag |=
  1916. LPFC_STOP_IOCB_MBX;
  1917. }
  1918. }
  1919. }
  1920. }
  1921. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1922. /* If we are not polling, we MUST be in SLI2 mode */
  1923. if (flag != MBX_POLL) {
  1924. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1925. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1926. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1927. spin_unlock_irqrestore(phba->host->host_lock,
  1928. drvr_flag);
  1929. /* Mbox command <mbxCommand> cannot issue */
  1930. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1931. return (MBX_NOT_FINISHED);
  1932. }
  1933. /* timeout active mbox command */
  1934. mod_timer(&psli->mbox_tmo, (jiffies +
  1935. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  1936. }
  1937. /* Mailbox cmd <cmd> issue */
  1938. lpfc_printf_log(phba,
  1939. KERN_INFO,
  1940. LOG_MBOX | LOG_SLI,
  1941. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1942. phba->brd_no,
  1943. mb->mbxCommand,
  1944. phba->hba_state,
  1945. psli->sli_flag,
  1946. flag);
  1947. psli->slistat.mbox_cmd++;
  1948. evtctr = psli->slistat.mbox_event;
  1949. /* next set own bit for the adapter and copy over command word */
  1950. mb->mbxOwner = OWN_CHIP;
  1951. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1952. /* First copy command data to host SLIM area */
  1953. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1954. } else {
  1955. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1956. /* copy command data into host mbox for cmpl */
  1957. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1958. MAILBOX_CMD_SIZE);
  1959. }
  1960. /* First copy mbox command data to HBA SLIM, skip past first
  1961. word */
  1962. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1963. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1964. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1965. /* Next copy over first word, with mbxOwner set */
  1966. ldata = *((volatile uint32_t *)mb);
  1967. to_slim = phba->MBslimaddr;
  1968. writel(ldata, to_slim);
  1969. readl(to_slim); /* flush */
  1970. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1971. /* switch over to host mailbox */
  1972. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1973. }
  1974. }
  1975. wmb();
  1976. /* interrupt board to doit right away */
  1977. writel(CA_MBATT, phba->CAregaddr);
  1978. readl(phba->CAregaddr); /* flush */
  1979. switch (flag) {
  1980. case MBX_NOWAIT:
  1981. /* Don't wait for it to finish, just return */
  1982. psli->mbox_active = pmbox;
  1983. break;
  1984. case MBX_POLL:
  1985. psli->mbox_active = NULL;
  1986. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1987. /* First read mbox status word */
  1988. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1989. word0 = le32_to_cpu(word0);
  1990. } else {
  1991. /* First read mbox status word */
  1992. word0 = readl(phba->MBslimaddr);
  1993. }
  1994. /* Read the HBA Host Attention Register */
  1995. ha_copy = readl(phba->HAregaddr);
  1996. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  1997. i *= 1000; /* Convert to ms */
  1998. /* Wait for command to complete */
  1999. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2000. (!(ha_copy & HA_MBATT) &&
  2001. (phba->hba_state > LPFC_WARM_START))) {
  2002. if (i-- <= 0) {
  2003. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2004. spin_unlock_irqrestore(phba->host->host_lock,
  2005. drvr_flag);
  2006. return (MBX_NOT_FINISHED);
  2007. }
  2008. /* Check if we took a mbox interrupt while we were
  2009. polling */
  2010. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2011. && (evtctr != psli->slistat.mbox_event))
  2012. break;
  2013. spin_unlock_irqrestore(phba->host->host_lock,
  2014. drvr_flag);
  2015. /* Can be in interrupt context, do not sleep */
  2016. /* (or might be called with interrupts disabled) */
  2017. mdelay(1);
  2018. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  2019. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2020. /* First copy command data */
  2021. word0 = *((volatile uint32_t *)
  2022. &phba->slim2p->mbx);
  2023. word0 = le32_to_cpu(word0);
  2024. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2025. MAILBOX_t *slimmb;
  2026. volatile uint32_t slimword0;
  2027. /* Check real SLIM for any errors */
  2028. slimword0 = readl(phba->MBslimaddr);
  2029. slimmb = (MAILBOX_t *) & slimword0;
  2030. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2031. && slimmb->mbxStatus) {
  2032. psli->sli_flag &=
  2033. ~LPFC_SLI2_ACTIVE;
  2034. word0 = slimword0;
  2035. }
  2036. }
  2037. } else {
  2038. /* First copy command data */
  2039. word0 = readl(phba->MBslimaddr);
  2040. }
  2041. /* Read the HBA Host Attention Register */
  2042. ha_copy = readl(phba->HAregaddr);
  2043. }
  2044. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2045. /* copy results back to user */
  2046. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2047. MAILBOX_CMD_SIZE);
  2048. } else {
  2049. /* First copy command data */
  2050. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2051. MAILBOX_CMD_SIZE);
  2052. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2053. pmbox->context2) {
  2054. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2055. phba->MBslimaddr + DMP_RSP_OFFSET,
  2056. mb->un.varDmp.word_cnt);
  2057. }
  2058. }
  2059. writel(HA_MBATT, phba->HAregaddr);
  2060. readl(phba->HAregaddr); /* flush */
  2061. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2062. status = mb->mbxStatus;
  2063. }
  2064. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  2065. return (status);
  2066. }
  2067. static int
  2068. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2069. struct lpfc_iocbq * piocb)
  2070. {
  2071. /* Insert the caller's iocb in the txq tail for later processing. */
  2072. list_add_tail(&piocb->list, &pring->txq);
  2073. pring->txq_cnt++;
  2074. return (0);
  2075. }
  2076. static struct lpfc_iocbq *
  2077. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2078. struct lpfc_iocbq ** piocb)
  2079. {
  2080. struct lpfc_iocbq * nextiocb;
  2081. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2082. if (!nextiocb) {
  2083. nextiocb = *piocb;
  2084. *piocb = NULL;
  2085. }
  2086. return nextiocb;
  2087. }
  2088. int
  2089. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2090. struct lpfc_iocbq *piocb, uint32_t flag)
  2091. {
  2092. struct lpfc_iocbq *nextiocb;
  2093. IOCB_t *iocb;
  2094. /*
  2095. * We should never get an IOCB if we are in a < LINK_DOWN state
  2096. */
  2097. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2098. return IOCB_ERROR;
  2099. /*
  2100. * Check to see if we are blocking IOCB processing because of a
  2101. * outstanding mbox command.
  2102. */
  2103. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2104. goto iocb_busy;
  2105. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2106. /*
  2107. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2108. * can be issued if the link is not up.
  2109. */
  2110. switch (piocb->iocb.ulpCommand) {
  2111. case CMD_QUE_RING_BUF_CN:
  2112. case CMD_QUE_RING_BUF64_CN:
  2113. /*
  2114. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2115. * completion, iocb_cmpl MUST be 0.
  2116. */
  2117. if (piocb->iocb_cmpl)
  2118. piocb->iocb_cmpl = NULL;
  2119. /*FALLTHROUGH*/
  2120. case CMD_CREATE_XRI_CR:
  2121. break;
  2122. default:
  2123. goto iocb_busy;
  2124. }
  2125. /*
  2126. * For FCP commands, we must be in a state where we can process link
  2127. * attention events.
  2128. */
  2129. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2130. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2131. goto iocb_busy;
  2132. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2133. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2134. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2135. if (iocb)
  2136. lpfc_sli_update_ring(phba, pring);
  2137. else
  2138. lpfc_sli_update_full_ring(phba, pring);
  2139. if (!piocb)
  2140. return IOCB_SUCCESS;
  2141. goto out_busy;
  2142. iocb_busy:
  2143. pring->stats.iocb_cmd_delay++;
  2144. out_busy:
  2145. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2146. lpfc_sli_ringtx_put(phba, pring, piocb);
  2147. return IOCB_SUCCESS;
  2148. }
  2149. return IOCB_BUSY;
  2150. }
  2151. static int
  2152. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2153. {
  2154. struct lpfc_sli *psli;
  2155. struct lpfc_sli_ring *pring;
  2156. psli = &phba->sli;
  2157. /* Adjust cmd/rsp ring iocb entries more evenly */
  2158. pring = &psli->ring[psli->fcp_ring];
  2159. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2160. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2161. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2162. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2163. pring = &psli->ring[1];
  2164. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2165. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2166. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2167. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2168. /* Setup default profile for this ring */
  2169. pring->iotag_max = 4096;
  2170. pring->num_mask = 1;
  2171. pring->prt[0].profile = 0; /* Mask 0 */
  2172. pring->prt[0].rctl = FC_UNSOL_DATA;
  2173. pring->prt[0].type = 5;
  2174. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2175. return 0;
  2176. }
  2177. int
  2178. lpfc_sli_setup(struct lpfc_hba *phba)
  2179. {
  2180. int i, totiocb = 0;
  2181. struct lpfc_sli *psli = &phba->sli;
  2182. struct lpfc_sli_ring *pring;
  2183. psli->num_rings = MAX_CONFIGURED_RINGS;
  2184. psli->sli_flag = 0;
  2185. psli->fcp_ring = LPFC_FCP_RING;
  2186. psli->next_ring = LPFC_FCP_NEXT_RING;
  2187. psli->ip_ring = LPFC_IP_RING;
  2188. psli->iocbq_lookup = NULL;
  2189. psli->iocbq_lookup_len = 0;
  2190. psli->last_iotag = 0;
  2191. for (i = 0; i < psli->num_rings; i++) {
  2192. pring = &psli->ring[i];
  2193. switch (i) {
  2194. case LPFC_FCP_RING: /* ring 0 - FCP */
  2195. /* numCiocb and numRiocb are used in config_port */
  2196. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2197. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2198. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2199. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2200. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2201. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2202. pring->iotag_ctr = 0;
  2203. pring->iotag_max =
  2204. (phba->cfg_hba_queue_depth * 2);
  2205. pring->fast_iotag = pring->iotag_max;
  2206. pring->num_mask = 0;
  2207. break;
  2208. case LPFC_IP_RING: /* ring 1 - IP */
  2209. /* numCiocb and numRiocb are used in config_port */
  2210. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2211. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2212. pring->num_mask = 0;
  2213. break;
  2214. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2215. /* numCiocb and numRiocb are used in config_port */
  2216. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2217. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2218. pring->fast_iotag = 0;
  2219. pring->iotag_ctr = 0;
  2220. pring->iotag_max = 4096;
  2221. pring->num_mask = 4;
  2222. pring->prt[0].profile = 0; /* Mask 0 */
  2223. pring->prt[0].rctl = FC_ELS_REQ;
  2224. pring->prt[0].type = FC_ELS_DATA;
  2225. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2226. lpfc_els_unsol_event;
  2227. pring->prt[1].profile = 0; /* Mask 1 */
  2228. pring->prt[1].rctl = FC_ELS_RSP;
  2229. pring->prt[1].type = FC_ELS_DATA;
  2230. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2231. lpfc_els_unsol_event;
  2232. pring->prt[2].profile = 0; /* Mask 2 */
  2233. /* NameServer Inquiry */
  2234. pring->prt[2].rctl = FC_UNSOL_CTL;
  2235. /* NameServer */
  2236. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2237. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2238. lpfc_ct_unsol_event;
  2239. pring->prt[3].profile = 0; /* Mask 3 */
  2240. /* NameServer response */
  2241. pring->prt[3].rctl = FC_SOL_CTL;
  2242. /* NameServer */
  2243. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2244. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2245. lpfc_ct_unsol_event;
  2246. break;
  2247. }
  2248. totiocb += (pring->numCiocb + pring->numRiocb);
  2249. }
  2250. if (totiocb > MAX_SLI2_IOCB) {
  2251. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2252. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2253. "%d:0462 Too many cmd / rsp ring entries in "
  2254. "SLI2 SLIM Data: x%x x%x\n",
  2255. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2256. }
  2257. if (phba->cfg_multi_ring_support == 2)
  2258. lpfc_extra_ring_setup(phba);
  2259. return 0;
  2260. }
  2261. int
  2262. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2263. {
  2264. struct lpfc_sli *psli;
  2265. struct lpfc_sli_ring *pring;
  2266. int i;
  2267. psli = &phba->sli;
  2268. spin_lock_irq(phba->host->host_lock);
  2269. INIT_LIST_HEAD(&psli->mboxq);
  2270. /* Initialize list headers for txq and txcmplq as double linked lists */
  2271. for (i = 0; i < psli->num_rings; i++) {
  2272. pring = &psli->ring[i];
  2273. pring->ringno = i;
  2274. pring->next_cmdidx = 0;
  2275. pring->local_getidx = 0;
  2276. pring->cmdidx = 0;
  2277. INIT_LIST_HEAD(&pring->txq);
  2278. INIT_LIST_HEAD(&pring->txcmplq);
  2279. INIT_LIST_HEAD(&pring->iocb_continueq);
  2280. INIT_LIST_HEAD(&pring->postbufq);
  2281. }
  2282. spin_unlock_irq(phba->host->host_lock);
  2283. return (1);
  2284. }
  2285. int
  2286. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2287. {
  2288. struct lpfc_sli *psli;
  2289. struct lpfc_sli_ring *pring;
  2290. LPFC_MBOXQ_t *pmb;
  2291. struct lpfc_iocbq *iocb, *next_iocb;
  2292. IOCB_t *icmd = NULL;
  2293. int i;
  2294. unsigned long flags = 0;
  2295. psli = &phba->sli;
  2296. lpfc_hba_down_prep(phba);
  2297. spin_lock_irqsave(phba->host->host_lock, flags);
  2298. for (i = 0; i < psli->num_rings; i++) {
  2299. pring = &psli->ring[i];
  2300. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2301. /*
  2302. * Error everything on the txq since these iocbs have not been
  2303. * given to the FW yet.
  2304. */
  2305. pring->txq_cnt = 0;
  2306. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2307. list_del_init(&iocb->list);
  2308. if (iocb->iocb_cmpl) {
  2309. icmd = &iocb->iocb;
  2310. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2311. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2312. spin_unlock_irqrestore(phba->host->host_lock,
  2313. flags);
  2314. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2315. spin_lock_irqsave(phba->host->host_lock, flags);
  2316. } else
  2317. lpfc_sli_release_iocbq(phba, iocb);
  2318. }
  2319. INIT_LIST_HEAD(&(pring->txq));
  2320. }
  2321. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2322. /* Return any active mbox cmds */
  2323. del_timer_sync(&psli->mbox_tmo);
  2324. spin_lock_irqsave(phba->host->host_lock, flags);
  2325. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2326. if (psli->mbox_active) {
  2327. pmb = psli->mbox_active;
  2328. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2329. if (pmb->mbox_cmpl) {
  2330. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2331. pmb->mbox_cmpl(phba,pmb);
  2332. spin_lock_irqsave(phba->host->host_lock, flags);
  2333. }
  2334. }
  2335. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2336. psli->mbox_active = NULL;
  2337. /* Return any pending mbox cmds */
  2338. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2339. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2340. if (pmb->mbox_cmpl) {
  2341. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2342. pmb->mbox_cmpl(phba,pmb);
  2343. spin_lock_irqsave(phba->host->host_lock, flags);
  2344. }
  2345. }
  2346. INIT_LIST_HEAD(&psli->mboxq);
  2347. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2348. return 1;
  2349. }
  2350. void
  2351. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2352. {
  2353. uint32_t *src = srcp;
  2354. uint32_t *dest = destp;
  2355. uint32_t ldata;
  2356. int i;
  2357. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2358. ldata = *src;
  2359. ldata = le32_to_cpu(ldata);
  2360. *dest = ldata;
  2361. src++;
  2362. dest++;
  2363. }
  2364. }
  2365. int
  2366. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2367. struct lpfc_dmabuf * mp)
  2368. {
  2369. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2370. later */
  2371. list_add_tail(&mp->list, &pring->postbufq);
  2372. pring->postbufq_cnt++;
  2373. return 0;
  2374. }
  2375. struct lpfc_dmabuf *
  2376. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2377. dma_addr_t phys)
  2378. {
  2379. struct lpfc_dmabuf *mp, *next_mp;
  2380. struct list_head *slp = &pring->postbufq;
  2381. /* Search postbufq, from the begining, looking for a match on phys */
  2382. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2383. if (mp->phys == phys) {
  2384. list_del_init(&mp->list);
  2385. pring->postbufq_cnt--;
  2386. return mp;
  2387. }
  2388. }
  2389. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2390. "%d:0410 Cannot find virtual addr for mapped buf on "
  2391. "ring %d Data x%llx x%p x%p x%x\n",
  2392. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2393. slp->next, slp->prev, pring->postbufq_cnt);
  2394. return NULL;
  2395. }
  2396. static void
  2397. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2398. struct lpfc_iocbq * rspiocb)
  2399. {
  2400. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2401. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2402. * just aborted.
  2403. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2404. */
  2405. if (cmdiocb->context2) {
  2406. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2407. /* Free the response IOCB before completing the abort
  2408. command. */
  2409. buf_ptr = NULL;
  2410. list_remove_head((&buf_ptr1->list), buf_ptr,
  2411. struct lpfc_dmabuf, list);
  2412. if (buf_ptr) {
  2413. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2414. kfree(buf_ptr);
  2415. }
  2416. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2417. kfree(buf_ptr1);
  2418. }
  2419. if (cmdiocb->context3) {
  2420. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2421. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2422. kfree(buf_ptr);
  2423. }
  2424. lpfc_sli_release_iocbq(phba, cmdiocb);
  2425. return;
  2426. }
  2427. int
  2428. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2429. struct lpfc_sli_ring * pring,
  2430. struct lpfc_iocbq * cmdiocb)
  2431. {
  2432. struct lpfc_iocbq *abtsiocbp;
  2433. IOCB_t *icmd = NULL;
  2434. IOCB_t *iabt = NULL;
  2435. /* issue ABTS for this IOCB based on iotag */
  2436. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2437. if (abtsiocbp == NULL)
  2438. return 0;
  2439. iabt = &abtsiocbp->iocb;
  2440. icmd = &cmdiocb->iocb;
  2441. switch (icmd->ulpCommand) {
  2442. case CMD_ELS_REQUEST64_CR:
  2443. /* Even though we abort the ELS command, the firmware may access
  2444. * the BPL or other resources before it processes our
  2445. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2446. * resources till the actual abort request completes.
  2447. */
  2448. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2449. abtsiocbp->context2 = cmdiocb->context2;
  2450. abtsiocbp->context3 = cmdiocb->context3;
  2451. cmdiocb->context2 = NULL;
  2452. cmdiocb->context3 = NULL;
  2453. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2454. break;
  2455. default:
  2456. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2457. return 0;
  2458. }
  2459. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2460. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2461. iabt->ulpLe = 1;
  2462. iabt->ulpClass = CLASS3;
  2463. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2464. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2465. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2466. return 0;
  2467. }
  2468. return 1;
  2469. }
  2470. static int
  2471. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2472. uint64_t lun_id, uint32_t ctx,
  2473. lpfc_ctx_cmd ctx_cmd)
  2474. {
  2475. struct lpfc_scsi_buf *lpfc_cmd;
  2476. struct scsi_cmnd *cmnd;
  2477. int rc = 1;
  2478. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2479. return rc;
  2480. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2481. cmnd = lpfc_cmd->pCmd;
  2482. if (cmnd == NULL)
  2483. return rc;
  2484. switch (ctx_cmd) {
  2485. case LPFC_CTX_LUN:
  2486. if ((cmnd->device->id == tgt_id) &&
  2487. (cmnd->device->lun == lun_id))
  2488. rc = 0;
  2489. break;
  2490. case LPFC_CTX_TGT:
  2491. if (cmnd->device->id == tgt_id)
  2492. rc = 0;
  2493. break;
  2494. case LPFC_CTX_CTX:
  2495. if (iocbq->iocb.ulpContext == ctx)
  2496. rc = 0;
  2497. break;
  2498. case LPFC_CTX_HOST:
  2499. rc = 0;
  2500. break;
  2501. default:
  2502. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2503. __FUNCTION__, ctx_cmd);
  2504. break;
  2505. }
  2506. return rc;
  2507. }
  2508. int
  2509. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2510. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2511. {
  2512. struct lpfc_iocbq *iocbq;
  2513. int sum, i;
  2514. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2515. iocbq = phba->sli.iocbq_lookup[i];
  2516. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2517. 0, ctx_cmd) == 0)
  2518. sum++;
  2519. }
  2520. return sum;
  2521. }
  2522. void
  2523. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2524. struct lpfc_iocbq * rspiocb)
  2525. {
  2526. spin_lock_irq(phba->host->host_lock);
  2527. lpfc_sli_release_iocbq(phba, cmdiocb);
  2528. spin_unlock_irq(phba->host->host_lock);
  2529. return;
  2530. }
  2531. int
  2532. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2533. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2534. lpfc_ctx_cmd abort_cmd)
  2535. {
  2536. struct lpfc_iocbq *iocbq;
  2537. struct lpfc_iocbq *abtsiocb;
  2538. IOCB_t *cmd = NULL;
  2539. int errcnt = 0, ret_val = 0;
  2540. int i;
  2541. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2542. iocbq = phba->sli.iocbq_lookup[i];
  2543. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2544. 0, abort_cmd) != 0)
  2545. continue;
  2546. /* issue ABTS for this IOCB based on iotag */
  2547. abtsiocb = lpfc_sli_get_iocbq(phba);
  2548. if (abtsiocb == NULL) {
  2549. errcnt++;
  2550. continue;
  2551. }
  2552. cmd = &iocbq->iocb;
  2553. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2554. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2555. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2556. abtsiocb->iocb.ulpLe = 1;
  2557. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2558. if (phba->hba_state >= LPFC_LINK_UP)
  2559. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2560. else
  2561. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2562. /* Setup callback routine and issue the command. */
  2563. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2564. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2565. if (ret_val == IOCB_ERROR) {
  2566. lpfc_sli_release_iocbq(phba, abtsiocb);
  2567. errcnt++;
  2568. continue;
  2569. }
  2570. }
  2571. return errcnt;
  2572. }
  2573. static void
  2574. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2575. struct lpfc_iocbq *cmdiocbq,
  2576. struct lpfc_iocbq *rspiocbq)
  2577. {
  2578. wait_queue_head_t *pdone_q;
  2579. unsigned long iflags;
  2580. spin_lock_irqsave(phba->host->host_lock, iflags);
  2581. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2582. if (cmdiocbq->context2 && rspiocbq)
  2583. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2584. &rspiocbq->iocb, sizeof(IOCB_t));
  2585. pdone_q = cmdiocbq->context_un.wait_queue;
  2586. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2587. if (pdone_q)
  2588. wake_up(pdone_q);
  2589. return;
  2590. }
  2591. /*
  2592. * Issue the caller's iocb and wait for its completion, but no longer than the
  2593. * caller's timeout. Note that iocb_flags is cleared before the
  2594. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2595. * definition this is a wait function.
  2596. */
  2597. int
  2598. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2599. struct lpfc_sli_ring * pring,
  2600. struct lpfc_iocbq * piocb,
  2601. struct lpfc_iocbq * prspiocbq,
  2602. uint32_t timeout)
  2603. {
  2604. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2605. long timeleft, timeout_req = 0;
  2606. int retval = IOCB_SUCCESS;
  2607. uint32_t creg_val;
  2608. /*
  2609. * If the caller has provided a response iocbq buffer, then context2
  2610. * is NULL or its an error.
  2611. */
  2612. if (prspiocbq) {
  2613. if (piocb->context2)
  2614. return IOCB_ERROR;
  2615. piocb->context2 = prspiocbq;
  2616. }
  2617. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2618. piocb->context_un.wait_queue = &done_q;
  2619. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2620. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2621. creg_val = readl(phba->HCregaddr);
  2622. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2623. writel(creg_val, phba->HCregaddr);
  2624. readl(phba->HCregaddr); /* flush */
  2625. }
  2626. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2627. if (retval == IOCB_SUCCESS) {
  2628. timeout_req = timeout * HZ;
  2629. spin_unlock_irq(phba->host->host_lock);
  2630. timeleft = wait_event_timeout(done_q,
  2631. piocb->iocb_flag & LPFC_IO_WAKE,
  2632. timeout_req);
  2633. spin_lock_irq(phba->host->host_lock);
  2634. if (timeleft == 0) {
  2635. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2636. "%d:0329 IOCB wait timeout error - no "
  2637. "wake response Data x%x\n",
  2638. phba->brd_no, timeout);
  2639. retval = IOCB_TIMEDOUT;
  2640. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2641. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2642. "%d:0330 IOCB wake NOT set, "
  2643. "Data x%x x%lx\n", phba->brd_no,
  2644. timeout, (timeleft / jiffies));
  2645. retval = IOCB_TIMEDOUT;
  2646. } else {
  2647. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2648. "%d:0331 IOCB wake signaled\n",
  2649. phba->brd_no);
  2650. }
  2651. } else {
  2652. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2653. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2654. phba->brd_no, retval);
  2655. retval = IOCB_ERROR;
  2656. }
  2657. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2658. creg_val = readl(phba->HCregaddr);
  2659. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2660. writel(creg_val, phba->HCregaddr);
  2661. readl(phba->HCregaddr); /* flush */
  2662. }
  2663. if (prspiocbq)
  2664. piocb->context2 = NULL;
  2665. piocb->context_un.wait_queue = NULL;
  2666. piocb->iocb_cmpl = NULL;
  2667. return retval;
  2668. }
  2669. int
  2670. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2671. uint32_t timeout)
  2672. {
  2673. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2674. DECLARE_WAITQUEUE(wq_entry, current);
  2675. uint32_t timeleft = 0;
  2676. int retval;
  2677. /* The caller must leave context1 empty. */
  2678. if (pmboxq->context1 != 0) {
  2679. return (MBX_NOT_FINISHED);
  2680. }
  2681. /* setup wake call as IOCB callback */
  2682. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2683. /* setup context field to pass wait_queue pointer to wake function */
  2684. pmboxq->context1 = &done_q;
  2685. /* start to sleep before we wait, to avoid races */
  2686. set_current_state(TASK_INTERRUPTIBLE);
  2687. add_wait_queue(&done_q, &wq_entry);
  2688. /* now issue the command */
  2689. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2690. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2691. timeleft = schedule_timeout(timeout * HZ);
  2692. pmboxq->context1 = NULL;
  2693. /* if schedule_timeout returns 0, we timed out and were not
  2694. woken up */
  2695. if ((timeleft == 0) || signal_pending(current))
  2696. retval = MBX_TIMEOUT;
  2697. else
  2698. retval = MBX_SUCCESS;
  2699. }
  2700. set_current_state(TASK_RUNNING);
  2701. remove_wait_queue(&done_q, &wq_entry);
  2702. return retval;
  2703. }
  2704. int
  2705. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  2706. {
  2707. int i = 0;
  2708. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
  2709. if (i++ > LPFC_MBOX_TMO * 1000)
  2710. return 1;
  2711. if (lpfc_sli_handle_mb_event(phba) == 0)
  2712. i = 0;
  2713. msleep(1);
  2714. }
  2715. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  2716. }
  2717. irqreturn_t
  2718. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2719. {
  2720. struct lpfc_hba *phba;
  2721. uint32_t ha_copy;
  2722. uint32_t work_ha_copy;
  2723. unsigned long status;
  2724. int i;
  2725. uint32_t control;
  2726. /*
  2727. * Get the driver's phba structure from the dev_id and
  2728. * assume the HBA is not interrupting.
  2729. */
  2730. phba = (struct lpfc_hba *) dev_id;
  2731. if (unlikely(!phba))
  2732. return IRQ_NONE;
  2733. phba->sli.slistat.sli_intr++;
  2734. /*
  2735. * Call the HBA to see if it is interrupting. If not, don't claim
  2736. * the interrupt
  2737. */
  2738. /* Ignore all interrupts during initialization. */
  2739. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2740. return IRQ_NONE;
  2741. /*
  2742. * Read host attention register to determine interrupt source
  2743. * Clear Attention Sources, except Error Attention (to
  2744. * preserve status) and Link Attention
  2745. */
  2746. spin_lock(phba->host->host_lock);
  2747. ha_copy = readl(phba->HAregaddr);
  2748. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2749. readl(phba->HAregaddr); /* flush */
  2750. spin_unlock(phba->host->host_lock);
  2751. if (unlikely(!ha_copy))
  2752. return IRQ_NONE;
  2753. work_ha_copy = ha_copy & phba->work_ha_mask;
  2754. if (unlikely(work_ha_copy)) {
  2755. if (work_ha_copy & HA_LATT) {
  2756. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2757. /*
  2758. * Turn off Link Attention interrupts
  2759. * until CLEAR_LA done
  2760. */
  2761. spin_lock(phba->host->host_lock);
  2762. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2763. control = readl(phba->HCregaddr);
  2764. control &= ~HC_LAINT_ENA;
  2765. writel(control, phba->HCregaddr);
  2766. readl(phba->HCregaddr); /* flush */
  2767. spin_unlock(phba->host->host_lock);
  2768. }
  2769. else
  2770. work_ha_copy &= ~HA_LATT;
  2771. }
  2772. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2773. for (i = 0; i < phba->sli.num_rings; i++) {
  2774. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2775. /*
  2776. * Turn off Slow Rings interrupts
  2777. */
  2778. spin_lock(phba->host->host_lock);
  2779. control = readl(phba->HCregaddr);
  2780. control &= ~(HC_R0INT_ENA << i);
  2781. writel(control, phba->HCregaddr);
  2782. readl(phba->HCregaddr); /* flush */
  2783. spin_unlock(phba->host->host_lock);
  2784. }
  2785. }
  2786. }
  2787. if (work_ha_copy & HA_ERATT) {
  2788. phba->hba_state = LPFC_HBA_ERROR;
  2789. /*
  2790. * There was a link/board error. Read the
  2791. * status register to retrieve the error event
  2792. * and process it.
  2793. */
  2794. phba->sli.slistat.err_attn_event++;
  2795. /* Save status info */
  2796. phba->work_hs = readl(phba->HSregaddr);
  2797. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2798. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2799. /* Clear Chip error bit */
  2800. writel(HA_ERATT, phba->HAregaddr);
  2801. readl(phba->HAregaddr); /* flush */
  2802. phba->stopped = 1;
  2803. }
  2804. spin_lock(phba->host->host_lock);
  2805. phba->work_ha |= work_ha_copy;
  2806. if (phba->work_wait)
  2807. wake_up(phba->work_wait);
  2808. spin_unlock(phba->host->host_lock);
  2809. }
  2810. ha_copy &= ~(phba->work_ha_mask);
  2811. /*
  2812. * Process all events on FCP ring. Take the optimized path for
  2813. * FCP IO. Any other IO is slow path and is handled by
  2814. * the worker thread.
  2815. */
  2816. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2817. status >>= (4*LPFC_FCP_RING);
  2818. if (status & HA_RXATT)
  2819. lpfc_sli_handle_fast_ring_event(phba,
  2820. &phba->sli.ring[LPFC_FCP_RING],
  2821. status);
  2822. return IRQ_HANDLED;
  2823. } /* lpfc_intr_handler */