omap_hwmod.c 96 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "prm2xxx_3xxx.h"
  150. #include "prm44xx.h"
  151. #include "prminst44xx.h"
  152. #include "mux.h"
  153. /* Maximum microseconds to wait for OMAP module to softreset */
  154. #define MAX_MODULE_SOFTRESET_WAIT 10000
  155. /* Name of the OMAP hwmod for the MPU */
  156. #define MPU_INITIATOR_NAME "mpu"
  157. /*
  158. * Number of struct omap_hwmod_link records per struct
  159. * omap_hwmod_ocp_if record (master->slave and slave->master)
  160. */
  161. #define LINKS_PER_OCP_IF 2
  162. /**
  163. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  164. * @enable_module: function to enable a module (via MODULEMODE)
  165. * @disable_module: function to disable a module (via MODULEMODE)
  166. *
  167. * XXX Eventually this functionality will be hidden inside the PRM/CM
  168. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  169. * conditionals in this code.
  170. */
  171. struct omap_hwmod_soc_ops {
  172. void (*enable_module)(struct omap_hwmod *oh);
  173. int (*disable_module)(struct omap_hwmod *oh);
  174. int (*wait_target_ready)(struct omap_hwmod *oh);
  175. };
  176. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  177. static struct omap_hwmod_soc_ops soc_ops;
  178. /* omap_hwmod_list contains all registered struct omap_hwmods */
  179. static LIST_HEAD(omap_hwmod_list);
  180. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  181. static struct omap_hwmod *mpu_oh;
  182. /*
  183. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  184. * allocated from - used to reduce the number of small memory
  185. * allocations, which has a significant impact on performance
  186. */
  187. static struct omap_hwmod_link *linkspace;
  188. /*
  189. * free_ls, max_ls: array indexes into linkspace; representing the
  190. * next free struct omap_hwmod_link index, and the maximum number of
  191. * struct omap_hwmod_link records allocated (respectively)
  192. */
  193. static unsigned short free_ls, max_ls, ls_supp;
  194. /* inited: set to true once the hwmod code is initialized */
  195. static bool inited;
  196. /* Private functions */
  197. /**
  198. * _fetch_next_ocp_if - return the next OCP interface in a list
  199. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  200. * @i: pointer to the index of the element pointed to by @p in the list
  201. *
  202. * Return a pointer to the struct omap_hwmod_ocp_if record
  203. * containing the struct list_head pointed to by @p, and increment
  204. * @p such that a future call to this routine will return the next
  205. * record.
  206. */
  207. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  208. int *i)
  209. {
  210. struct omap_hwmod_ocp_if *oi;
  211. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  212. *p = (*p)->next;
  213. *i = *i + 1;
  214. return oi;
  215. }
  216. /**
  217. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  218. * @oh: struct omap_hwmod *
  219. *
  220. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  221. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  222. * OCP_SYSCONFIG register or 0 upon success.
  223. */
  224. static int _update_sysc_cache(struct omap_hwmod *oh)
  225. {
  226. if (!oh->class->sysc) {
  227. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  228. return -EINVAL;
  229. }
  230. /* XXX ensure module interface clock is up */
  231. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  232. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  233. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  234. return 0;
  235. }
  236. /**
  237. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  238. * @v: OCP_SYSCONFIG value to write
  239. * @oh: struct omap_hwmod *
  240. *
  241. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  242. * one. No return value.
  243. */
  244. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  245. {
  246. if (!oh->class->sysc) {
  247. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  248. return;
  249. }
  250. /* XXX ensure module interface clock is up */
  251. /* Module might have lost context, always update cache and register */
  252. oh->_sysc_cache = v;
  253. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  254. }
  255. /**
  256. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  257. * @oh: struct omap_hwmod *
  258. * @standbymode: MIDLEMODE field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the master standby mode bits in @v to be @standbymode for
  262. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  263. * upon error or 0 upon success.
  264. */
  265. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  266. u32 *v)
  267. {
  268. u32 mstandby_mask;
  269. u8 mstandby_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  278. mstandby_mask = (0x3 << mstandby_shift);
  279. *v &= ~mstandby_mask;
  280. *v |= __ffs(standbymode) << mstandby_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  285. * @oh: struct omap_hwmod *
  286. * @idlemode: SIDLEMODE field bits
  287. * @v: pointer to register contents to modify
  288. *
  289. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  290. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  291. * or 0 upon success.
  292. */
  293. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  294. {
  295. u32 sidle_mask;
  296. u8 sidle_shift;
  297. if (!oh->class->sysc ||
  298. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  299. return -EINVAL;
  300. if (!oh->class->sysc->sysc_fields) {
  301. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  302. return -EINVAL;
  303. }
  304. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  305. sidle_mask = (0x3 << sidle_shift);
  306. *v &= ~sidle_mask;
  307. *v |= __ffs(idlemode) << sidle_shift;
  308. return 0;
  309. }
  310. /**
  311. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  312. * @oh: struct omap_hwmod *
  313. * @clockact: CLOCKACTIVITY field bits
  314. * @v: pointer to register contents to modify
  315. *
  316. * Update the clockactivity mode bits in @v to be @clockact for the
  317. * @oh hwmod. Used for additional powersaving on some modules. Does
  318. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  319. * success.
  320. */
  321. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  322. {
  323. u32 clkact_mask;
  324. u8 clkact_shift;
  325. if (!oh->class->sysc ||
  326. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  327. return -EINVAL;
  328. if (!oh->class->sysc->sysc_fields) {
  329. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  330. return -EINVAL;
  331. }
  332. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  333. clkact_mask = (0x3 << clkact_shift);
  334. *v &= ~clkact_mask;
  335. *v |= clockact << clkact_shift;
  336. return 0;
  337. }
  338. /**
  339. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  340. * @oh: struct omap_hwmod *
  341. * @v: pointer to register contents to modify
  342. *
  343. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  344. * error or 0 upon success.
  345. */
  346. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  347. {
  348. u32 softrst_mask;
  349. if (!oh->class->sysc ||
  350. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  351. return -EINVAL;
  352. if (!oh->class->sysc->sysc_fields) {
  353. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  354. return -EINVAL;
  355. }
  356. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  357. *v |= softrst_mask;
  358. return 0;
  359. }
  360. /**
  361. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  362. * @oh: struct omap_hwmod *
  363. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  364. * @v: pointer to register contents to modify
  365. *
  366. * Update the module autoidle bit in @v to be @autoidle for the @oh
  367. * hwmod. The autoidle bit controls whether the module can gate
  368. * internal clocks automatically when it isn't doing anything; the
  369. * exact function of this bit varies on a per-module basis. This
  370. * function does not write to the hardware. Returns -EINVAL upon
  371. * error or 0 upon success.
  372. */
  373. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  374. u32 *v)
  375. {
  376. u32 autoidle_mask;
  377. u8 autoidle_shift;
  378. if (!oh->class->sysc ||
  379. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  380. return -EINVAL;
  381. if (!oh->class->sysc->sysc_fields) {
  382. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  383. return -EINVAL;
  384. }
  385. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  386. autoidle_mask = (0x1 << autoidle_shift);
  387. *v &= ~autoidle_mask;
  388. *v |= autoidle << autoidle_shift;
  389. return 0;
  390. }
  391. /**
  392. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  393. * @oh: struct omap_hwmod *
  394. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  395. *
  396. * Set or clear the I/O pad wakeup flag in the mux entries for the
  397. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  398. * in memory. If the hwmod is currently idled, and the new idle
  399. * values don't match the previous ones, this function will also
  400. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  401. * currently idled, this function won't touch the hardware: the new
  402. * mux settings are written to the SCM PADCTRL registers when the
  403. * hwmod is idled. No return value.
  404. */
  405. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  406. {
  407. struct omap_device_pad *pad;
  408. bool change = false;
  409. u16 prev_idle;
  410. int j;
  411. if (!oh->mux || !oh->mux->enabled)
  412. return;
  413. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  414. pad = oh->mux->pads_dynamic[j];
  415. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  416. continue;
  417. prev_idle = pad->idle;
  418. if (set_wake)
  419. pad->idle |= OMAP_WAKEUP_EN;
  420. else
  421. pad->idle &= ~OMAP_WAKEUP_EN;
  422. if (prev_idle != pad->idle)
  423. change = true;
  424. }
  425. if (change && oh->_state == _HWMOD_STATE_IDLE)
  426. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  427. }
  428. /**
  429. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  430. * @oh: struct omap_hwmod *
  431. *
  432. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  433. * upon error or 0 upon success.
  434. */
  435. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  436. {
  437. if (!oh->class->sysc ||
  438. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  439. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  440. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  441. return -EINVAL;
  442. if (!oh->class->sysc->sysc_fields) {
  443. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  444. return -EINVAL;
  445. }
  446. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  447. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  448. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  449. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  450. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  451. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  452. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  453. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  454. return 0;
  455. }
  456. /**
  457. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  458. * @oh: struct omap_hwmod *
  459. *
  460. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  461. * upon error or 0 upon success.
  462. */
  463. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  464. {
  465. if (!oh->class->sysc ||
  466. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  467. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  468. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  469. return -EINVAL;
  470. if (!oh->class->sysc->sysc_fields) {
  471. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  472. return -EINVAL;
  473. }
  474. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  475. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  476. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  477. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  478. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  479. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  480. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  481. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  482. return 0;
  483. }
  484. /**
  485. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  486. * @oh: struct omap_hwmod *
  487. *
  488. * Prevent the hardware module @oh from entering idle while the
  489. * hardare module initiator @init_oh is active. Useful when a module
  490. * will be accessed by a particular initiator (e.g., if a module will
  491. * be accessed by the IVA, there should be a sleepdep between the IVA
  492. * initiator and the module). Only applies to modules in smart-idle
  493. * mode. If the clockdomain is marked as not needing autodeps, return
  494. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  495. * passes along clkdm_add_sleepdep() value upon success.
  496. */
  497. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  498. {
  499. if (!oh->_clk)
  500. return -EINVAL;
  501. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  502. return 0;
  503. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  504. }
  505. /**
  506. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  507. * @oh: struct omap_hwmod *
  508. *
  509. * Allow the hardware module @oh to enter idle while the hardare
  510. * module initiator @init_oh is active. Useful when a module will not
  511. * be accessed by a particular initiator (e.g., if a module will not
  512. * be accessed by the IVA, there should be no sleepdep between the IVA
  513. * initiator and the module). Only applies to modules in smart-idle
  514. * mode. If the clockdomain is marked as not needing autodeps, return
  515. * 0 without doing anything. Returns -EINVAL upon error or passes
  516. * along clkdm_del_sleepdep() value upon success.
  517. */
  518. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  519. {
  520. if (!oh->_clk)
  521. return -EINVAL;
  522. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  523. return 0;
  524. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  525. }
  526. /**
  527. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  528. * @oh: struct omap_hwmod *
  529. *
  530. * Called from _init_clocks(). Populates the @oh _clk (main
  531. * functional clock pointer) if a main_clk is present. Returns 0 on
  532. * success or -EINVAL on error.
  533. */
  534. static int _init_main_clk(struct omap_hwmod *oh)
  535. {
  536. int ret = 0;
  537. if (!oh->main_clk)
  538. return 0;
  539. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  540. if (!oh->_clk) {
  541. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  542. oh->name, oh->main_clk);
  543. return -EINVAL;
  544. }
  545. if (!oh->_clk->clkdm)
  546. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  547. oh->main_clk, oh->_clk->name);
  548. return ret;
  549. }
  550. /**
  551. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  552. * @oh: struct omap_hwmod *
  553. *
  554. * Called from _init_clocks(). Populates the @oh OCP slave interface
  555. * clock pointers. Returns 0 on success or -EINVAL on error.
  556. */
  557. static int _init_interface_clks(struct omap_hwmod *oh)
  558. {
  559. struct omap_hwmod_ocp_if *os;
  560. struct list_head *p;
  561. struct clk *c;
  562. int i = 0;
  563. int ret = 0;
  564. p = oh->slave_ports.next;
  565. while (i < oh->slaves_cnt) {
  566. os = _fetch_next_ocp_if(&p, &i);
  567. if (!os->clk)
  568. continue;
  569. c = omap_clk_get_by_name(os->clk);
  570. if (!c) {
  571. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  572. oh->name, os->clk);
  573. ret = -EINVAL;
  574. }
  575. os->_clk = c;
  576. }
  577. return ret;
  578. }
  579. /**
  580. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  581. * @oh: struct omap_hwmod *
  582. *
  583. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  584. * clock pointers. Returns 0 on success or -EINVAL on error.
  585. */
  586. static int _init_opt_clks(struct omap_hwmod *oh)
  587. {
  588. struct omap_hwmod_opt_clk *oc;
  589. struct clk *c;
  590. int i;
  591. int ret = 0;
  592. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  593. c = omap_clk_get_by_name(oc->clk);
  594. if (!c) {
  595. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  596. oh->name, oc->clk);
  597. ret = -EINVAL;
  598. }
  599. oc->_clk = c;
  600. }
  601. return ret;
  602. }
  603. /**
  604. * _enable_clocks - enable hwmod main clock and interface clocks
  605. * @oh: struct omap_hwmod *
  606. *
  607. * Enables all clocks necessary for register reads and writes to succeed
  608. * on the hwmod @oh. Returns 0.
  609. */
  610. static int _enable_clocks(struct omap_hwmod *oh)
  611. {
  612. struct omap_hwmod_ocp_if *os;
  613. struct list_head *p;
  614. int i = 0;
  615. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  616. if (oh->_clk)
  617. clk_enable(oh->_clk);
  618. p = oh->slave_ports.next;
  619. while (i < oh->slaves_cnt) {
  620. os = _fetch_next_ocp_if(&p, &i);
  621. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  622. clk_enable(os->_clk);
  623. }
  624. /* The opt clocks are controlled by the device driver. */
  625. return 0;
  626. }
  627. /**
  628. * _disable_clocks - disable hwmod main clock and interface clocks
  629. * @oh: struct omap_hwmod *
  630. *
  631. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  632. */
  633. static int _disable_clocks(struct omap_hwmod *oh)
  634. {
  635. struct omap_hwmod_ocp_if *os;
  636. struct list_head *p;
  637. int i = 0;
  638. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  639. if (oh->_clk)
  640. clk_disable(oh->_clk);
  641. p = oh->slave_ports.next;
  642. while (i < oh->slaves_cnt) {
  643. os = _fetch_next_ocp_if(&p, &i);
  644. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  645. clk_disable(os->_clk);
  646. }
  647. /* The opt clocks are controlled by the device driver. */
  648. return 0;
  649. }
  650. static void _enable_optional_clocks(struct omap_hwmod *oh)
  651. {
  652. struct omap_hwmod_opt_clk *oc;
  653. int i;
  654. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  655. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  656. if (oc->_clk) {
  657. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  658. oc->_clk->name);
  659. clk_enable(oc->_clk);
  660. }
  661. }
  662. static void _disable_optional_clocks(struct omap_hwmod *oh)
  663. {
  664. struct omap_hwmod_opt_clk *oc;
  665. int i;
  666. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  667. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  668. if (oc->_clk) {
  669. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  670. oc->_clk->name);
  671. clk_disable(oc->_clk);
  672. }
  673. }
  674. /**
  675. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  676. * @oh: struct omap_hwmod *
  677. *
  678. * Enables the PRCM module mode related to the hwmod @oh.
  679. * No return value.
  680. */
  681. static void _omap4_enable_module(struct omap_hwmod *oh)
  682. {
  683. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  684. return;
  685. pr_debug("omap_hwmod: %s: %s: %d\n",
  686. oh->name, __func__, oh->prcm.omap4.modulemode);
  687. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  688. oh->clkdm->prcm_partition,
  689. oh->clkdm->cm_inst,
  690. oh->clkdm->clkdm_offs,
  691. oh->prcm.omap4.clkctrl_offs);
  692. }
  693. /**
  694. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  695. * @oh: struct omap_hwmod *
  696. *
  697. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  698. * does not have an IDLEST bit or if the module successfully enters
  699. * slave idle; otherwise, pass along the return value of the
  700. * appropriate *_cm*_wait_module_idle() function.
  701. */
  702. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  703. {
  704. if (!oh)
  705. return -EINVAL;
  706. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  707. return 0;
  708. if (oh->flags & HWMOD_NO_IDLEST)
  709. return 0;
  710. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  711. oh->clkdm->cm_inst,
  712. oh->clkdm->clkdm_offs,
  713. oh->prcm.omap4.clkctrl_offs);
  714. }
  715. /**
  716. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  717. * @oh: struct omap_hwmod *oh
  718. *
  719. * Count and return the number of MPU IRQs associated with the hwmod
  720. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  721. * NULL.
  722. */
  723. static int _count_mpu_irqs(struct omap_hwmod *oh)
  724. {
  725. struct omap_hwmod_irq_info *ohii;
  726. int i = 0;
  727. if (!oh || !oh->mpu_irqs)
  728. return 0;
  729. do {
  730. ohii = &oh->mpu_irqs[i++];
  731. } while (ohii->irq != -1);
  732. return i-1;
  733. }
  734. /**
  735. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  736. * @oh: struct omap_hwmod *oh
  737. *
  738. * Count and return the number of SDMA request lines associated with
  739. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  740. * if @oh is NULL.
  741. */
  742. static int _count_sdma_reqs(struct omap_hwmod *oh)
  743. {
  744. struct omap_hwmod_dma_info *ohdi;
  745. int i = 0;
  746. if (!oh || !oh->sdma_reqs)
  747. return 0;
  748. do {
  749. ohdi = &oh->sdma_reqs[i++];
  750. } while (ohdi->dma_req != -1);
  751. return i-1;
  752. }
  753. /**
  754. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  755. * @oh: struct omap_hwmod *oh
  756. *
  757. * Count and return the number of address space ranges associated with
  758. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  759. * if @oh is NULL.
  760. */
  761. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  762. {
  763. struct omap_hwmod_addr_space *mem;
  764. int i = 0;
  765. if (!os || !os->addr)
  766. return 0;
  767. do {
  768. mem = &os->addr[i++];
  769. } while (mem->pa_start != mem->pa_end);
  770. return i-1;
  771. }
  772. /**
  773. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  774. * @oh: struct omap_hwmod * to operate on
  775. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  776. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  777. *
  778. * Retrieve a MPU hardware IRQ line number named by @name associated
  779. * with the IP block pointed to by @oh. The IRQ number will be filled
  780. * into the address pointed to by @dma. When @name is non-null, the
  781. * IRQ line number associated with the named entry will be returned.
  782. * If @name is null, the first matching entry will be returned. Data
  783. * order is not meaningful in hwmod data, so callers are strongly
  784. * encouraged to use a non-null @name whenever possible to avoid
  785. * unpredictable effects if hwmod data is later added that causes data
  786. * ordering to change. Returns 0 upon success or a negative error
  787. * code upon error.
  788. */
  789. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  790. unsigned int *irq)
  791. {
  792. int i;
  793. bool found = false;
  794. if (!oh->mpu_irqs)
  795. return -ENOENT;
  796. i = 0;
  797. while (oh->mpu_irqs[i].irq != -1) {
  798. if (name == oh->mpu_irqs[i].name ||
  799. !strcmp(name, oh->mpu_irqs[i].name)) {
  800. found = true;
  801. break;
  802. }
  803. i++;
  804. }
  805. if (!found)
  806. return -ENOENT;
  807. *irq = oh->mpu_irqs[i].irq;
  808. return 0;
  809. }
  810. /**
  811. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  812. * @oh: struct omap_hwmod * to operate on
  813. * @name: pointer to the name of the SDMA request line to fetch (optional)
  814. * @dma: pointer to an unsigned int to store the request line ID to
  815. *
  816. * Retrieve an SDMA request line ID named by @name on the IP block
  817. * pointed to by @oh. The ID will be filled into the address pointed
  818. * to by @dma. When @name is non-null, the request line ID associated
  819. * with the named entry will be returned. If @name is null, the first
  820. * matching entry will be returned. Data order is not meaningful in
  821. * hwmod data, so callers are strongly encouraged to use a non-null
  822. * @name whenever possible to avoid unpredictable effects if hwmod
  823. * data is later added that causes data ordering to change. Returns 0
  824. * upon success or a negative error code upon error.
  825. */
  826. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  827. unsigned int *dma)
  828. {
  829. int i;
  830. bool found = false;
  831. if (!oh->sdma_reqs)
  832. return -ENOENT;
  833. i = 0;
  834. while (oh->sdma_reqs[i].dma_req != -1) {
  835. if (name == oh->sdma_reqs[i].name ||
  836. !strcmp(name, oh->sdma_reqs[i].name)) {
  837. found = true;
  838. break;
  839. }
  840. i++;
  841. }
  842. if (!found)
  843. return -ENOENT;
  844. *dma = oh->sdma_reqs[i].dma_req;
  845. return 0;
  846. }
  847. /**
  848. * _get_addr_space_by_name - fetch address space start & end by name
  849. * @oh: struct omap_hwmod * to operate on
  850. * @name: pointer to the name of the address space to fetch (optional)
  851. * @pa_start: pointer to a u32 to store the starting address to
  852. * @pa_end: pointer to a u32 to store the ending address to
  853. *
  854. * Retrieve address space start and end addresses for the IP block
  855. * pointed to by @oh. The data will be filled into the addresses
  856. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  857. * address space data associated with the named entry will be
  858. * returned. If @name is null, the first matching entry will be
  859. * returned. Data order is not meaningful in hwmod data, so callers
  860. * are strongly encouraged to use a non-null @name whenever possible
  861. * to avoid unpredictable effects if hwmod data is later added that
  862. * causes data ordering to change. Returns 0 upon success or a
  863. * negative error code upon error.
  864. */
  865. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  866. u32 *pa_start, u32 *pa_end)
  867. {
  868. int i, j;
  869. struct omap_hwmod_ocp_if *os;
  870. struct list_head *p = NULL;
  871. bool found = false;
  872. p = oh->slave_ports.next;
  873. i = 0;
  874. while (i < oh->slaves_cnt) {
  875. os = _fetch_next_ocp_if(&p, &i);
  876. if (!os->addr)
  877. return -ENOENT;
  878. j = 0;
  879. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  880. if (name == os->addr[j].name ||
  881. !strcmp(name, os->addr[j].name)) {
  882. found = true;
  883. break;
  884. }
  885. j++;
  886. }
  887. if (found)
  888. break;
  889. }
  890. if (!found)
  891. return -ENOENT;
  892. *pa_start = os->addr[j].pa_start;
  893. *pa_end = os->addr[j].pa_end;
  894. return 0;
  895. }
  896. /**
  897. * _save_mpu_port_index - find and save the index to @oh's MPU port
  898. * @oh: struct omap_hwmod *
  899. *
  900. * Determines the array index of the OCP slave port that the MPU uses
  901. * to address the device, and saves it into the struct omap_hwmod.
  902. * Intended to be called during hwmod registration only. No return
  903. * value.
  904. */
  905. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  906. {
  907. struct omap_hwmod_ocp_if *os = NULL;
  908. struct list_head *p;
  909. int i = 0;
  910. if (!oh)
  911. return;
  912. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  913. p = oh->slave_ports.next;
  914. while (i < oh->slaves_cnt) {
  915. os = _fetch_next_ocp_if(&p, &i);
  916. if (os->user & OCP_USER_MPU) {
  917. oh->_mpu_port = os;
  918. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  919. break;
  920. }
  921. }
  922. return;
  923. }
  924. /**
  925. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  926. * @oh: struct omap_hwmod *
  927. *
  928. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  929. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  930. * communicate with the IP block. This interface need not be directly
  931. * connected to the MPU (and almost certainly is not), but is directly
  932. * connected to the IP block represented by @oh. Returns a pointer
  933. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  934. * error or if there does not appear to be a path from the MPU to this
  935. * IP block.
  936. */
  937. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  938. {
  939. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  940. return NULL;
  941. return oh->_mpu_port;
  942. };
  943. /**
  944. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  945. * @oh: struct omap_hwmod *
  946. *
  947. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  948. * the register target MPU address space; or returns NULL upon error.
  949. */
  950. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  951. {
  952. struct omap_hwmod_ocp_if *os;
  953. struct omap_hwmod_addr_space *mem;
  954. int found = 0, i = 0;
  955. os = _find_mpu_rt_port(oh);
  956. if (!os || !os->addr)
  957. return NULL;
  958. do {
  959. mem = &os->addr[i++];
  960. if (mem->flags & ADDR_TYPE_RT)
  961. found = 1;
  962. } while (!found && mem->pa_start != mem->pa_end);
  963. return (found) ? mem : NULL;
  964. }
  965. /**
  966. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  967. * @oh: struct omap_hwmod *
  968. *
  969. * If module is marked as SWSUP_SIDLE, force the module out of slave
  970. * idle; otherwise, configure it for smart-idle. If module is marked
  971. * as SWSUP_MSUSPEND, force the module out of master standby;
  972. * otherwise, configure it for smart-standby. No return value.
  973. */
  974. static void _enable_sysc(struct omap_hwmod *oh)
  975. {
  976. u8 idlemode, sf;
  977. u32 v;
  978. if (!oh->class->sysc)
  979. return;
  980. v = oh->_sysc_cache;
  981. sf = oh->class->sysc->sysc_flags;
  982. if (sf & SYSC_HAS_SIDLEMODE) {
  983. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  984. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  985. _set_slave_idlemode(oh, idlemode, &v);
  986. }
  987. if (sf & SYSC_HAS_MIDLEMODE) {
  988. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  989. idlemode = HWMOD_IDLEMODE_NO;
  990. } else {
  991. if (sf & SYSC_HAS_ENAWAKEUP)
  992. _enable_wakeup(oh, &v);
  993. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  994. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  995. else
  996. idlemode = HWMOD_IDLEMODE_SMART;
  997. }
  998. _set_master_standbymode(oh, idlemode, &v);
  999. }
  1000. /*
  1001. * XXX The clock framework should handle this, by
  1002. * calling into this code. But this must wait until the
  1003. * clock structures are tagged with omap_hwmod entries
  1004. */
  1005. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1006. (sf & SYSC_HAS_CLOCKACTIVITY))
  1007. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1008. /* If slave is in SMARTIDLE, also enable wakeup */
  1009. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1010. _enable_wakeup(oh, &v);
  1011. _write_sysconfig(v, oh);
  1012. /*
  1013. * Set the autoidle bit only after setting the smartidle bit
  1014. * Setting this will not have any impact on the other modules.
  1015. */
  1016. if (sf & SYSC_HAS_AUTOIDLE) {
  1017. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1018. 0 : 1;
  1019. _set_module_autoidle(oh, idlemode, &v);
  1020. _write_sysconfig(v, oh);
  1021. }
  1022. }
  1023. /**
  1024. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1025. * @oh: struct omap_hwmod *
  1026. *
  1027. * If module is marked as SWSUP_SIDLE, force the module into slave
  1028. * idle; otherwise, configure it for smart-idle. If module is marked
  1029. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1030. * configure it for smart-standby. No return value.
  1031. */
  1032. static void _idle_sysc(struct omap_hwmod *oh)
  1033. {
  1034. u8 idlemode, sf;
  1035. u32 v;
  1036. if (!oh->class->sysc)
  1037. return;
  1038. v = oh->_sysc_cache;
  1039. sf = oh->class->sysc->sysc_flags;
  1040. if (sf & SYSC_HAS_SIDLEMODE) {
  1041. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1042. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  1043. _set_slave_idlemode(oh, idlemode, &v);
  1044. }
  1045. if (sf & SYSC_HAS_MIDLEMODE) {
  1046. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1047. idlemode = HWMOD_IDLEMODE_FORCE;
  1048. } else {
  1049. if (sf & SYSC_HAS_ENAWAKEUP)
  1050. _enable_wakeup(oh, &v);
  1051. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1052. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1053. else
  1054. idlemode = HWMOD_IDLEMODE_SMART;
  1055. }
  1056. _set_master_standbymode(oh, idlemode, &v);
  1057. }
  1058. /* If slave is in SMARTIDLE, also enable wakeup */
  1059. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1060. _enable_wakeup(oh, &v);
  1061. _write_sysconfig(v, oh);
  1062. }
  1063. /**
  1064. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1065. * @oh: struct omap_hwmod *
  1066. *
  1067. * Force the module into slave idle and master suspend. No return
  1068. * value.
  1069. */
  1070. static void _shutdown_sysc(struct omap_hwmod *oh)
  1071. {
  1072. u32 v;
  1073. u8 sf;
  1074. if (!oh->class->sysc)
  1075. return;
  1076. v = oh->_sysc_cache;
  1077. sf = oh->class->sysc->sysc_flags;
  1078. if (sf & SYSC_HAS_SIDLEMODE)
  1079. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1080. if (sf & SYSC_HAS_MIDLEMODE)
  1081. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1082. if (sf & SYSC_HAS_AUTOIDLE)
  1083. _set_module_autoidle(oh, 1, &v);
  1084. _write_sysconfig(v, oh);
  1085. }
  1086. /**
  1087. * _lookup - find an omap_hwmod by name
  1088. * @name: find an omap_hwmod by name
  1089. *
  1090. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1091. */
  1092. static struct omap_hwmod *_lookup(const char *name)
  1093. {
  1094. struct omap_hwmod *oh, *temp_oh;
  1095. oh = NULL;
  1096. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1097. if (!strcmp(name, temp_oh->name)) {
  1098. oh = temp_oh;
  1099. break;
  1100. }
  1101. }
  1102. return oh;
  1103. }
  1104. /**
  1105. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1106. * @oh: struct omap_hwmod *
  1107. *
  1108. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1109. * clockdomain pointer, and save it into the struct omap_hwmod.
  1110. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  1111. */
  1112. static int _init_clkdm(struct omap_hwmod *oh)
  1113. {
  1114. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1115. return 0;
  1116. if (!oh->clkdm_name) {
  1117. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  1118. return -EINVAL;
  1119. }
  1120. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1121. if (!oh->clkdm) {
  1122. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1123. oh->name, oh->clkdm_name);
  1124. return -EINVAL;
  1125. }
  1126. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1127. oh->name, oh->clkdm_name);
  1128. return 0;
  1129. }
  1130. /**
  1131. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1132. * well the clockdomain.
  1133. * @oh: struct omap_hwmod *
  1134. * @data: not used; pass NULL
  1135. *
  1136. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1137. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1138. * success, or a negative error code on failure.
  1139. */
  1140. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1141. {
  1142. int ret = 0;
  1143. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1144. return 0;
  1145. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1146. ret |= _init_main_clk(oh);
  1147. ret |= _init_interface_clks(oh);
  1148. ret |= _init_opt_clks(oh);
  1149. ret |= _init_clkdm(oh);
  1150. if (!ret)
  1151. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1152. else
  1153. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1154. return ret;
  1155. }
  1156. /**
  1157. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1158. * @oh: struct omap_hwmod *
  1159. * @name: name of the reset line in the context of this hwmod
  1160. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1161. *
  1162. * Return the bit position of the reset line that match the
  1163. * input name. Return -ENOENT if not found.
  1164. */
  1165. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1166. struct omap_hwmod_rst_info *ohri)
  1167. {
  1168. int i;
  1169. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1170. const char *rst_line = oh->rst_lines[i].name;
  1171. if (!strcmp(rst_line, name)) {
  1172. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1173. ohri->st_shift = oh->rst_lines[i].st_shift;
  1174. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1175. oh->name, __func__, rst_line, ohri->rst_shift,
  1176. ohri->st_shift);
  1177. return 0;
  1178. }
  1179. }
  1180. return -ENOENT;
  1181. }
  1182. /**
  1183. * _assert_hardreset - assert the HW reset line of submodules
  1184. * contained in the hwmod module.
  1185. * @oh: struct omap_hwmod *
  1186. * @name: name of the reset line to lookup and assert
  1187. *
  1188. * Some IP like dsp, ipu or iva contain processor that require
  1189. * an HW reset line to be assert / deassert in order to enable fully
  1190. * the IP.
  1191. */
  1192. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1193. {
  1194. struct omap_hwmod_rst_info ohri;
  1195. u8 ret;
  1196. if (!oh)
  1197. return -EINVAL;
  1198. ret = _lookup_hardreset(oh, name, &ohri);
  1199. if (IS_ERR_VALUE(ret))
  1200. return ret;
  1201. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1202. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1203. ohri.rst_shift);
  1204. else if (cpu_is_omap44xx())
  1205. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1206. oh->clkdm->pwrdm.ptr->prcm_partition,
  1207. oh->clkdm->pwrdm.ptr->prcm_offs,
  1208. oh->prcm.omap4.rstctrl_offs);
  1209. else
  1210. return -EINVAL;
  1211. }
  1212. /**
  1213. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1214. * in the hwmod module.
  1215. * @oh: struct omap_hwmod *
  1216. * @name: name of the reset line to look up and deassert
  1217. *
  1218. * Some IP like dsp, ipu or iva contain processor that require
  1219. * an HW reset line to be assert / deassert in order to enable fully
  1220. * the IP.
  1221. */
  1222. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1223. {
  1224. struct omap_hwmod_rst_info ohri;
  1225. int ret;
  1226. if (!oh)
  1227. return -EINVAL;
  1228. ret = _lookup_hardreset(oh, name, &ohri);
  1229. if (IS_ERR_VALUE(ret))
  1230. return ret;
  1231. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1232. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1233. ohri.rst_shift,
  1234. ohri.st_shift);
  1235. } else if (cpu_is_omap44xx()) {
  1236. if (ohri.st_shift)
  1237. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1238. oh->name, name);
  1239. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1240. oh->clkdm->pwrdm.ptr->prcm_partition,
  1241. oh->clkdm->pwrdm.ptr->prcm_offs,
  1242. oh->prcm.omap4.rstctrl_offs);
  1243. } else {
  1244. return -EINVAL;
  1245. }
  1246. if (ret == -EBUSY)
  1247. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1248. return ret;
  1249. }
  1250. /**
  1251. * _read_hardreset - read the HW reset line state of submodules
  1252. * contained in the hwmod module
  1253. * @oh: struct omap_hwmod *
  1254. * @name: name of the reset line to look up and read
  1255. *
  1256. * Return the state of the reset line.
  1257. */
  1258. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1259. {
  1260. struct omap_hwmod_rst_info ohri;
  1261. u8 ret;
  1262. if (!oh)
  1263. return -EINVAL;
  1264. ret = _lookup_hardreset(oh, name, &ohri);
  1265. if (IS_ERR_VALUE(ret))
  1266. return ret;
  1267. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1268. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1269. ohri.st_shift);
  1270. } else if (cpu_is_omap44xx()) {
  1271. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1272. oh->clkdm->pwrdm.ptr->prcm_partition,
  1273. oh->clkdm->pwrdm.ptr->prcm_offs,
  1274. oh->prcm.omap4.rstctrl_offs);
  1275. } else {
  1276. return -EINVAL;
  1277. }
  1278. }
  1279. /**
  1280. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1281. * @oh: struct omap_hwmod *
  1282. *
  1283. * If any hardreset line associated with @oh is asserted, then return true.
  1284. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1285. * no hardreset lines associated with @oh are asserted, then return false.
  1286. * This function is used to avoid executing some parts of the IP block
  1287. * enable/disable sequence if a hardreset line is set.
  1288. */
  1289. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1290. {
  1291. int i;
  1292. if (oh->rst_lines_cnt == 0)
  1293. return false;
  1294. for (i = 0; i < oh->rst_lines_cnt; i++)
  1295. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1296. return true;
  1297. return false;
  1298. }
  1299. /**
  1300. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1301. * @oh: struct omap_hwmod *
  1302. *
  1303. * Disable the PRCM module mode related to the hwmod @oh.
  1304. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1305. */
  1306. static int _omap4_disable_module(struct omap_hwmod *oh)
  1307. {
  1308. int v;
  1309. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1310. return -EINVAL;
  1311. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1312. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1313. oh->clkdm->cm_inst,
  1314. oh->clkdm->clkdm_offs,
  1315. oh->prcm.omap4.clkctrl_offs);
  1316. if (_are_any_hardreset_lines_asserted(oh))
  1317. return 0;
  1318. v = _omap4_wait_target_disable(oh);
  1319. if (v)
  1320. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1321. oh->name);
  1322. return 0;
  1323. }
  1324. /**
  1325. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1326. * @oh: struct omap_hwmod *
  1327. *
  1328. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1329. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1330. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1331. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1332. *
  1333. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1334. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1335. * use the SYSCONFIG softreset bit to provide the status.
  1336. *
  1337. * Note that some IP like McBSP do have reset control but don't have
  1338. * reset status.
  1339. */
  1340. static int _ocp_softreset(struct omap_hwmod *oh)
  1341. {
  1342. u32 v, softrst_mask;
  1343. int c = 0;
  1344. int ret = 0;
  1345. if (!oh->class->sysc ||
  1346. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1347. return -ENOENT;
  1348. /* clocks must be on for this operation */
  1349. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1350. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1351. "enabled state\n", oh->name);
  1352. return -EINVAL;
  1353. }
  1354. /* For some modules, all optionnal clocks need to be enabled as well */
  1355. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1356. _enable_optional_clocks(oh);
  1357. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1358. v = oh->_sysc_cache;
  1359. ret = _set_softreset(oh, &v);
  1360. if (ret)
  1361. goto dis_opt_clks;
  1362. _write_sysconfig(v, oh);
  1363. if (oh->class->sysc->srst_udelay)
  1364. udelay(oh->class->sysc->srst_udelay);
  1365. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1366. omap_test_timeout((omap_hwmod_read(oh,
  1367. oh->class->sysc->syss_offs)
  1368. & SYSS_RESETDONE_MASK),
  1369. MAX_MODULE_SOFTRESET_WAIT, c);
  1370. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1371. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1372. omap_test_timeout(!(omap_hwmod_read(oh,
  1373. oh->class->sysc->sysc_offs)
  1374. & softrst_mask),
  1375. MAX_MODULE_SOFTRESET_WAIT, c);
  1376. }
  1377. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1378. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1379. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1380. else
  1381. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1382. /*
  1383. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1384. * _wait_target_ready() or _reset()
  1385. */
  1386. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1387. dis_opt_clks:
  1388. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1389. _disable_optional_clocks(oh);
  1390. return ret;
  1391. }
  1392. /**
  1393. * _reset - reset an omap_hwmod
  1394. * @oh: struct omap_hwmod *
  1395. *
  1396. * Resets an omap_hwmod @oh. If the module has a custom reset
  1397. * function pointer defined, then call it to reset the IP block, and
  1398. * pass along its return value to the caller. Otherwise, if the IP
  1399. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1400. * associated with it, call a function to reset the IP block via that
  1401. * method, and pass along the return value to the caller. Finally, if
  1402. * the IP block has some hardreset lines associated with it, assert
  1403. * all of those, but do _not_ deassert them. (This is because driver
  1404. * authors have expressed an apparent requirement to control the
  1405. * deassertion of the hardreset lines themselves.)
  1406. *
  1407. * The default software reset mechanism for most OMAP IP blocks is
  1408. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1409. * hwmods cannot be reset via this method. Some are not targets and
  1410. * therefore have no OCP header registers to access. Others (like the
  1411. * IVA) have idiosyncratic reset sequences. So for these relatively
  1412. * rare cases, custom reset code can be supplied in the struct
  1413. * omap_hwmod_class .reset function pointer. Passes along the return
  1414. * value from either _ocp_softreset() or the custom reset function -
  1415. * these must return -EINVAL if the hwmod cannot be reset this way or
  1416. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1417. * not reset in time, or 0 upon success.
  1418. */
  1419. static int _reset(struct omap_hwmod *oh)
  1420. {
  1421. int i, r;
  1422. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1423. if (oh->class->reset) {
  1424. r = oh->class->reset(oh);
  1425. } else {
  1426. if (oh->rst_lines_cnt > 0) {
  1427. for (i = 0; i < oh->rst_lines_cnt; i++)
  1428. _assert_hardreset(oh, oh->rst_lines[i].name);
  1429. return 0;
  1430. } else {
  1431. r = _ocp_softreset(oh);
  1432. if (r == -ENOENT)
  1433. r = 0;
  1434. }
  1435. }
  1436. /*
  1437. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1438. * softreset. The _enable() function should be split to avoid
  1439. * the rewrite of the OCP_SYSCONFIG register.
  1440. */
  1441. if (oh->class->sysc) {
  1442. _update_sysc_cache(oh);
  1443. _enable_sysc(oh);
  1444. }
  1445. return r;
  1446. }
  1447. /**
  1448. * _enable - enable an omap_hwmod
  1449. * @oh: struct omap_hwmod *
  1450. *
  1451. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1452. * register target. Returns -EINVAL if the hwmod is in the wrong
  1453. * state or passes along the return value of _wait_target_ready().
  1454. */
  1455. static int _enable(struct omap_hwmod *oh)
  1456. {
  1457. int r;
  1458. int hwsup = 0;
  1459. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1460. /*
  1461. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1462. * state at init. Now that someone is really trying to enable
  1463. * them, just ensure that the hwmod mux is set.
  1464. */
  1465. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1466. /*
  1467. * If the caller has mux data populated, do the mux'ing
  1468. * which wouldn't have been done as part of the _enable()
  1469. * done during setup.
  1470. */
  1471. if (oh->mux)
  1472. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1473. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1474. return 0;
  1475. }
  1476. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1477. oh->_state != _HWMOD_STATE_IDLE &&
  1478. oh->_state != _HWMOD_STATE_DISABLED) {
  1479. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1480. oh->name);
  1481. return -EINVAL;
  1482. }
  1483. /*
  1484. * If an IP block contains HW reset lines and any of them are
  1485. * asserted, we let integration code associated with that
  1486. * block handle the enable. We've received very little
  1487. * information on what those driver authors need, and until
  1488. * detailed information is provided and the driver code is
  1489. * posted to the public lists, this is probably the best we
  1490. * can do.
  1491. */
  1492. if (_are_any_hardreset_lines_asserted(oh))
  1493. return 0;
  1494. /* Mux pins for device runtime if populated */
  1495. if (oh->mux && (!oh->mux->enabled ||
  1496. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1497. oh->mux->pads_dynamic)))
  1498. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1499. _add_initiator_dep(oh, mpu_oh);
  1500. if (oh->clkdm) {
  1501. /*
  1502. * A clockdomain must be in SW_SUP before enabling
  1503. * completely the module. The clockdomain can be set
  1504. * in HW_AUTO only when the module become ready.
  1505. */
  1506. hwsup = clkdm_in_hwsup(oh->clkdm);
  1507. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1508. if (r) {
  1509. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1510. oh->name, oh->clkdm->name, r);
  1511. return r;
  1512. }
  1513. }
  1514. _enable_clocks(oh);
  1515. if (soc_ops.enable_module)
  1516. soc_ops.enable_module(oh);
  1517. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1518. -EINVAL;
  1519. if (!r) {
  1520. /*
  1521. * Set the clockdomain to HW_AUTO only if the target is ready,
  1522. * assuming that the previous state was HW_AUTO
  1523. */
  1524. if (oh->clkdm && hwsup)
  1525. clkdm_allow_idle(oh->clkdm);
  1526. oh->_state = _HWMOD_STATE_ENABLED;
  1527. /* Access the sysconfig only if the target is ready */
  1528. if (oh->class->sysc) {
  1529. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1530. _update_sysc_cache(oh);
  1531. _enable_sysc(oh);
  1532. }
  1533. } else {
  1534. _disable_clocks(oh);
  1535. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1536. oh->name, r);
  1537. if (oh->clkdm)
  1538. clkdm_hwmod_disable(oh->clkdm, oh);
  1539. }
  1540. return r;
  1541. }
  1542. /**
  1543. * _idle - idle an omap_hwmod
  1544. * @oh: struct omap_hwmod *
  1545. *
  1546. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1547. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1548. * state or returns 0.
  1549. */
  1550. static int _idle(struct omap_hwmod *oh)
  1551. {
  1552. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1553. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1554. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1555. oh->name);
  1556. return -EINVAL;
  1557. }
  1558. if (_are_any_hardreset_lines_asserted(oh))
  1559. return 0;
  1560. if (oh->class->sysc)
  1561. _idle_sysc(oh);
  1562. _del_initiator_dep(oh, mpu_oh);
  1563. if (soc_ops.disable_module)
  1564. soc_ops.disable_module(oh);
  1565. /*
  1566. * The module must be in idle mode before disabling any parents
  1567. * clocks. Otherwise, the parent clock might be disabled before
  1568. * the module transition is done, and thus will prevent the
  1569. * transition to complete properly.
  1570. */
  1571. _disable_clocks(oh);
  1572. if (oh->clkdm)
  1573. clkdm_hwmod_disable(oh->clkdm, oh);
  1574. /* Mux pins for device idle if populated */
  1575. if (oh->mux && oh->mux->pads_dynamic)
  1576. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1577. oh->_state = _HWMOD_STATE_IDLE;
  1578. return 0;
  1579. }
  1580. /**
  1581. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1582. * @oh: struct omap_hwmod *
  1583. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1584. *
  1585. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1586. * local copy. Intended to be used by drivers that require
  1587. * direct manipulation of the AUTOIDLE bits.
  1588. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1589. * along the return value from _set_module_autoidle().
  1590. *
  1591. * Any users of this function should be scrutinized carefully.
  1592. */
  1593. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1594. {
  1595. u32 v;
  1596. int retval = 0;
  1597. unsigned long flags;
  1598. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1599. return -EINVAL;
  1600. spin_lock_irqsave(&oh->_lock, flags);
  1601. v = oh->_sysc_cache;
  1602. retval = _set_module_autoidle(oh, autoidle, &v);
  1603. if (!retval)
  1604. _write_sysconfig(v, oh);
  1605. spin_unlock_irqrestore(&oh->_lock, flags);
  1606. return retval;
  1607. }
  1608. /**
  1609. * _shutdown - shutdown an omap_hwmod
  1610. * @oh: struct omap_hwmod *
  1611. *
  1612. * Shut down an omap_hwmod @oh. This should be called when the driver
  1613. * used for the hwmod is removed or unloaded or if the driver is not
  1614. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1615. * state or returns 0.
  1616. */
  1617. static int _shutdown(struct omap_hwmod *oh)
  1618. {
  1619. int ret, i;
  1620. u8 prev_state;
  1621. if (oh->_state != _HWMOD_STATE_IDLE &&
  1622. oh->_state != _HWMOD_STATE_ENABLED) {
  1623. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1624. oh->name);
  1625. return -EINVAL;
  1626. }
  1627. if (_are_any_hardreset_lines_asserted(oh))
  1628. return 0;
  1629. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1630. if (oh->class->pre_shutdown) {
  1631. prev_state = oh->_state;
  1632. if (oh->_state == _HWMOD_STATE_IDLE)
  1633. _enable(oh);
  1634. ret = oh->class->pre_shutdown(oh);
  1635. if (ret) {
  1636. if (prev_state == _HWMOD_STATE_IDLE)
  1637. _idle(oh);
  1638. return ret;
  1639. }
  1640. }
  1641. if (oh->class->sysc) {
  1642. if (oh->_state == _HWMOD_STATE_IDLE)
  1643. _enable(oh);
  1644. _shutdown_sysc(oh);
  1645. }
  1646. /* clocks and deps are already disabled in idle */
  1647. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1648. _del_initiator_dep(oh, mpu_oh);
  1649. /* XXX what about the other system initiators here? dma, dsp */
  1650. if (soc_ops.disable_module)
  1651. soc_ops.disable_module(oh);
  1652. _disable_clocks(oh);
  1653. if (oh->clkdm)
  1654. clkdm_hwmod_disable(oh->clkdm, oh);
  1655. }
  1656. /* XXX Should this code also force-disable the optional clocks? */
  1657. for (i = 0; i < oh->rst_lines_cnt; i++)
  1658. _assert_hardreset(oh, oh->rst_lines[i].name);
  1659. /* Mux pins to safe mode or use populated off mode values */
  1660. if (oh->mux)
  1661. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1662. oh->_state = _HWMOD_STATE_DISABLED;
  1663. return 0;
  1664. }
  1665. /**
  1666. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1667. * @oh: struct omap_hwmod * to locate the virtual address
  1668. *
  1669. * Cache the virtual address used by the MPU to access this IP block's
  1670. * registers. This address is needed early so the OCP registers that
  1671. * are part of the device's address space can be ioremapped properly.
  1672. * No return value.
  1673. */
  1674. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1675. {
  1676. struct omap_hwmod_addr_space *mem;
  1677. void __iomem *va_start;
  1678. if (!oh)
  1679. return;
  1680. _save_mpu_port_index(oh);
  1681. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1682. return;
  1683. mem = _find_mpu_rt_addr_space(oh);
  1684. if (!mem) {
  1685. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1686. oh->name);
  1687. return;
  1688. }
  1689. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1690. if (!va_start) {
  1691. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1692. return;
  1693. }
  1694. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1695. oh->name, va_start);
  1696. oh->_mpu_rt_va = va_start;
  1697. }
  1698. /**
  1699. * _init - initialize internal data for the hwmod @oh
  1700. * @oh: struct omap_hwmod *
  1701. * @n: (unused)
  1702. *
  1703. * Look up the clocks and the address space used by the MPU to access
  1704. * registers belonging to the hwmod @oh. @oh must already be
  1705. * registered at this point. This is the first of two phases for
  1706. * hwmod initialization. Code called here does not touch any hardware
  1707. * registers, it simply prepares internal data structures. Returns 0
  1708. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1709. * failure.
  1710. */
  1711. static int __init _init(struct omap_hwmod *oh, void *data)
  1712. {
  1713. int r;
  1714. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1715. return 0;
  1716. _init_mpu_rt_base(oh, NULL);
  1717. r = _init_clocks(oh, NULL);
  1718. if (IS_ERR_VALUE(r)) {
  1719. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1720. return -EINVAL;
  1721. }
  1722. oh->_state = _HWMOD_STATE_INITIALIZED;
  1723. return 0;
  1724. }
  1725. /**
  1726. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1727. * @oh: struct omap_hwmod *
  1728. *
  1729. * Set up the module's interface clocks. XXX This function is still mostly
  1730. * a stub; implementing this properly requires iclk autoidle usecounting in
  1731. * the clock code. No return value.
  1732. */
  1733. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1734. {
  1735. struct omap_hwmod_ocp_if *os;
  1736. struct list_head *p;
  1737. int i = 0;
  1738. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1739. return;
  1740. p = oh->slave_ports.next;
  1741. while (i < oh->slaves_cnt) {
  1742. os = _fetch_next_ocp_if(&p, &i);
  1743. if (!os->_clk)
  1744. continue;
  1745. if (os->flags & OCPIF_SWSUP_IDLE) {
  1746. /* XXX omap_iclk_deny_idle(c); */
  1747. } else {
  1748. /* XXX omap_iclk_allow_idle(c); */
  1749. clk_enable(os->_clk);
  1750. }
  1751. }
  1752. return;
  1753. }
  1754. /**
  1755. * _setup_reset - reset an IP block during the setup process
  1756. * @oh: struct omap_hwmod *
  1757. *
  1758. * Reset the IP block corresponding to the hwmod @oh during the setup
  1759. * process. The IP block is first enabled so it can be successfully
  1760. * reset. Returns 0 upon success or a negative error code upon
  1761. * failure.
  1762. */
  1763. static int __init _setup_reset(struct omap_hwmod *oh)
  1764. {
  1765. int r;
  1766. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1767. return -EINVAL;
  1768. if (oh->rst_lines_cnt == 0) {
  1769. r = _enable(oh);
  1770. if (r) {
  1771. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1772. oh->name, oh->_state);
  1773. return -EINVAL;
  1774. }
  1775. }
  1776. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1777. r = _reset(oh);
  1778. return r;
  1779. }
  1780. /**
  1781. * _setup_postsetup - transition to the appropriate state after _setup
  1782. * @oh: struct omap_hwmod *
  1783. *
  1784. * Place an IP block represented by @oh into a "post-setup" state --
  1785. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1786. * this function is called at the end of _setup().) The postsetup
  1787. * state for an IP block can be changed by calling
  1788. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1789. * before one of the omap_hwmod_setup*() functions are called for the
  1790. * IP block.
  1791. *
  1792. * The IP block stays in this state until a PM runtime-based driver is
  1793. * loaded for that IP block. A post-setup state of IDLE is
  1794. * appropriate for almost all IP blocks with runtime PM-enabled
  1795. * drivers, since those drivers are able to enable the IP block. A
  1796. * post-setup state of ENABLED is appropriate for kernels with PM
  1797. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1798. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1799. * included, since the WDTIMER starts running on reset and will reset
  1800. * the MPU if left active.
  1801. *
  1802. * This post-setup mechanism is deprecated. Once all of the OMAP
  1803. * drivers have been converted to use PM runtime, and all of the IP
  1804. * block data and interconnect data is available to the hwmod code, it
  1805. * should be possible to replace this mechanism with a "lazy reset"
  1806. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1807. * when the driver first probes, then all remaining IP blocks without
  1808. * drivers are either shut down or enabled after the drivers have
  1809. * loaded. However, this cannot take place until the above
  1810. * preconditions have been met, since otherwise the late reset code
  1811. * has no way of knowing which IP blocks are in use by drivers, and
  1812. * which ones are unused.
  1813. *
  1814. * No return value.
  1815. */
  1816. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1817. {
  1818. u8 postsetup_state;
  1819. if (oh->rst_lines_cnt > 0)
  1820. return;
  1821. postsetup_state = oh->_postsetup_state;
  1822. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1823. postsetup_state = _HWMOD_STATE_ENABLED;
  1824. /*
  1825. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1826. * it should be set by the core code as a runtime flag during startup
  1827. */
  1828. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1829. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1830. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1831. postsetup_state = _HWMOD_STATE_ENABLED;
  1832. }
  1833. if (postsetup_state == _HWMOD_STATE_IDLE)
  1834. _idle(oh);
  1835. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1836. _shutdown(oh);
  1837. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1838. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1839. oh->name, postsetup_state);
  1840. return;
  1841. }
  1842. /**
  1843. * _setup - prepare IP block hardware for use
  1844. * @oh: struct omap_hwmod *
  1845. * @n: (unused, pass NULL)
  1846. *
  1847. * Configure the IP block represented by @oh. This may include
  1848. * enabling the IP block, resetting it, and placing it into a
  1849. * post-setup state, depending on the type of IP block and applicable
  1850. * flags. IP blocks are reset to prevent any previous configuration
  1851. * by the bootloader or previous operating system from interfering
  1852. * with power management or other parts of the system. The reset can
  1853. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1854. * two phases for hwmod initialization. Code called here generally
  1855. * affects the IP block hardware, or system integration hardware
  1856. * associated with the IP block. Returns 0.
  1857. */
  1858. static int __init _setup(struct omap_hwmod *oh, void *data)
  1859. {
  1860. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1861. return 0;
  1862. _setup_iclk_autoidle(oh);
  1863. if (!_setup_reset(oh))
  1864. _setup_postsetup(oh);
  1865. return 0;
  1866. }
  1867. /**
  1868. * _register - register a struct omap_hwmod
  1869. * @oh: struct omap_hwmod *
  1870. *
  1871. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1872. * already has been registered by the same name; -EINVAL if the
  1873. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1874. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1875. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1876. * success.
  1877. *
  1878. * XXX The data should be copied into bootmem, so the original data
  1879. * should be marked __initdata and freed after init. This would allow
  1880. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1881. * that the copy process would be relatively complex due to the large number
  1882. * of substructures.
  1883. */
  1884. static int __init _register(struct omap_hwmod *oh)
  1885. {
  1886. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1887. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1888. return -EINVAL;
  1889. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1890. if (_lookup(oh->name))
  1891. return -EEXIST;
  1892. list_add_tail(&oh->node, &omap_hwmod_list);
  1893. INIT_LIST_HEAD(&oh->master_ports);
  1894. INIT_LIST_HEAD(&oh->slave_ports);
  1895. spin_lock_init(&oh->_lock);
  1896. oh->_state = _HWMOD_STATE_REGISTERED;
  1897. /*
  1898. * XXX Rather than doing a strcmp(), this should test a flag
  1899. * set in the hwmod data, inserted by the autogenerator code.
  1900. */
  1901. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1902. mpu_oh = oh;
  1903. return 0;
  1904. }
  1905. /**
  1906. * _alloc_links - return allocated memory for hwmod links
  1907. * @ml: pointer to a struct omap_hwmod_link * for the master link
  1908. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  1909. *
  1910. * Return pointers to two struct omap_hwmod_link records, via the
  1911. * addresses pointed to by @ml and @sl. Will first attempt to return
  1912. * memory allocated as part of a large initial block, but if that has
  1913. * been exhausted, will allocate memory itself. Since ideally this
  1914. * second allocation path will never occur, the number of these
  1915. * 'supplemental' allocations will be logged when debugging is
  1916. * enabled. Returns 0.
  1917. */
  1918. static int __init _alloc_links(struct omap_hwmod_link **ml,
  1919. struct omap_hwmod_link **sl)
  1920. {
  1921. unsigned int sz;
  1922. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  1923. *ml = &linkspace[free_ls++];
  1924. *sl = &linkspace[free_ls++];
  1925. return 0;
  1926. }
  1927. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  1928. *sl = NULL;
  1929. *ml = alloc_bootmem(sz);
  1930. memset(*ml, 0, sz);
  1931. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  1932. ls_supp++;
  1933. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  1934. ls_supp * LINKS_PER_OCP_IF);
  1935. return 0;
  1936. };
  1937. /**
  1938. * _add_link - add an interconnect between two IP blocks
  1939. * @oi: pointer to a struct omap_hwmod_ocp_if record
  1940. *
  1941. * Add struct omap_hwmod_link records connecting the master IP block
  1942. * specified in @oi->master to @oi, and connecting the slave IP block
  1943. * specified in @oi->slave to @oi. This code is assumed to run before
  1944. * preemption or SMP has been enabled, thus avoiding the need for
  1945. * locking in this code. Changes to this assumption will require
  1946. * additional locking. Returns 0.
  1947. */
  1948. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  1949. {
  1950. struct omap_hwmod_link *ml, *sl;
  1951. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  1952. oi->slave->name);
  1953. _alloc_links(&ml, &sl);
  1954. ml->ocp_if = oi;
  1955. INIT_LIST_HEAD(&ml->node);
  1956. list_add(&ml->node, &oi->master->master_ports);
  1957. oi->master->masters_cnt++;
  1958. sl->ocp_if = oi;
  1959. INIT_LIST_HEAD(&sl->node);
  1960. list_add(&sl->node, &oi->slave->slave_ports);
  1961. oi->slave->slaves_cnt++;
  1962. return 0;
  1963. }
  1964. /**
  1965. * _register_link - register a struct omap_hwmod_ocp_if
  1966. * @oi: struct omap_hwmod_ocp_if *
  1967. *
  1968. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  1969. * has already been registered; -EINVAL if @oi is NULL or if the
  1970. * record pointed to by @oi is missing required fields; or 0 upon
  1971. * success.
  1972. *
  1973. * XXX The data should be copied into bootmem, so the original data
  1974. * should be marked __initdata and freed after init. This would allow
  1975. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  1976. */
  1977. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  1978. {
  1979. if (!oi || !oi->master || !oi->slave || !oi->user)
  1980. return -EINVAL;
  1981. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  1982. return -EEXIST;
  1983. pr_debug("omap_hwmod: registering link from %s to %s\n",
  1984. oi->master->name, oi->slave->name);
  1985. /*
  1986. * Register the connected hwmods, if they haven't been
  1987. * registered already
  1988. */
  1989. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  1990. _register(oi->master);
  1991. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  1992. _register(oi->slave);
  1993. _add_link(oi);
  1994. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  1995. return 0;
  1996. }
  1997. /**
  1998. * _alloc_linkspace - allocate large block of hwmod links
  1999. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2000. *
  2001. * Allocate a large block of struct omap_hwmod_link records. This
  2002. * improves boot time significantly by avoiding the need to allocate
  2003. * individual records one by one. If the number of records to
  2004. * allocate in the block hasn't been manually specified, this function
  2005. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2006. * and use that to determine the allocation size. For SoC families
  2007. * that require multiple list registrations, such as OMAP3xxx, this
  2008. * estimation process isn't optimal, so manual estimation is advised
  2009. * in those cases. Returns -EEXIST if the allocation has already occurred
  2010. * or 0 upon success.
  2011. */
  2012. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2013. {
  2014. unsigned int i = 0;
  2015. unsigned int sz;
  2016. if (linkspace) {
  2017. WARN(1, "linkspace already allocated\n");
  2018. return -EEXIST;
  2019. }
  2020. if (max_ls == 0)
  2021. while (ois[i++])
  2022. max_ls += LINKS_PER_OCP_IF;
  2023. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2024. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2025. __func__, sz, max_ls);
  2026. linkspace = alloc_bootmem(sz);
  2027. memset(linkspace, 0, sz);
  2028. return 0;
  2029. }
  2030. /* Static functions intended only for use in soc_ops field function pointers */
  2031. /**
  2032. * _omap2_wait_target_ready - wait for a module to leave slave idle
  2033. * @oh: struct omap_hwmod *
  2034. *
  2035. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2036. * does not have an IDLEST bit or if the module successfully leaves
  2037. * slave idle; otherwise, pass along the return value of the
  2038. * appropriate *_cm*_wait_module_ready() function.
  2039. */
  2040. static int _omap2_wait_target_ready(struct omap_hwmod *oh)
  2041. {
  2042. if (!oh)
  2043. return -EINVAL;
  2044. if (oh->flags & HWMOD_NO_IDLEST)
  2045. return 0;
  2046. if (!_find_mpu_rt_port(oh))
  2047. return 0;
  2048. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2049. return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2050. oh->prcm.omap2.idlest_reg_id,
  2051. oh->prcm.omap2.idlest_idle_bit);
  2052. }
  2053. /**
  2054. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2055. * @oh: struct omap_hwmod *
  2056. *
  2057. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2058. * does not have an IDLEST bit or if the module successfully leaves
  2059. * slave idle; otherwise, pass along the return value of the
  2060. * appropriate *_cm*_wait_module_ready() function.
  2061. */
  2062. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2063. {
  2064. if (!oh || !oh->clkdm)
  2065. return -EINVAL;
  2066. if (oh->flags & HWMOD_NO_IDLEST)
  2067. return 0;
  2068. if (!_find_mpu_rt_port(oh))
  2069. return 0;
  2070. /* XXX check module SIDLEMODE, hardreset status */
  2071. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2072. oh->clkdm->cm_inst,
  2073. oh->clkdm->clkdm_offs,
  2074. oh->prcm.omap4.clkctrl_offs);
  2075. }
  2076. /* Public functions */
  2077. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2078. {
  2079. if (oh->flags & HWMOD_16BIT_REG)
  2080. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2081. else
  2082. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2083. }
  2084. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2085. {
  2086. if (oh->flags & HWMOD_16BIT_REG)
  2087. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2088. else
  2089. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2090. }
  2091. /**
  2092. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2093. * @oh: struct omap_hwmod *
  2094. *
  2095. * This is a public function exposed to drivers. Some drivers may need to do
  2096. * some settings before and after resetting the device. Those drivers after
  2097. * doing the necessary settings could use this function to start a reset by
  2098. * setting the SYSCONFIG.SOFTRESET bit.
  2099. */
  2100. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2101. {
  2102. u32 v;
  2103. int ret;
  2104. if (!oh || !(oh->_sysc_cache))
  2105. return -EINVAL;
  2106. v = oh->_sysc_cache;
  2107. ret = _set_softreset(oh, &v);
  2108. if (ret)
  2109. goto error;
  2110. _write_sysconfig(v, oh);
  2111. error:
  2112. return ret;
  2113. }
  2114. /**
  2115. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2116. * @oh: struct omap_hwmod *
  2117. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2118. *
  2119. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2120. * local copy. Intended to be used by drivers that have some erratum
  2121. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2122. * -EINVAL if @oh is null, or passes along the return value from
  2123. * _set_slave_idlemode().
  2124. *
  2125. * XXX Does this function have any current users? If not, we should
  2126. * remove it; it is better to let the rest of the hwmod code handle this.
  2127. * Any users of this function should be scrutinized carefully.
  2128. */
  2129. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2130. {
  2131. u32 v;
  2132. int retval = 0;
  2133. if (!oh)
  2134. return -EINVAL;
  2135. v = oh->_sysc_cache;
  2136. retval = _set_slave_idlemode(oh, idlemode, &v);
  2137. if (!retval)
  2138. _write_sysconfig(v, oh);
  2139. return retval;
  2140. }
  2141. /**
  2142. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2143. * @name: name of the omap_hwmod to look up
  2144. *
  2145. * Given a @name of an omap_hwmod, return a pointer to the registered
  2146. * struct omap_hwmod *, or NULL upon error.
  2147. */
  2148. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2149. {
  2150. struct omap_hwmod *oh;
  2151. if (!name)
  2152. return NULL;
  2153. oh = _lookup(name);
  2154. return oh;
  2155. }
  2156. /**
  2157. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2158. * @fn: pointer to a callback function
  2159. * @data: void * data to pass to callback function
  2160. *
  2161. * Call @fn for each registered omap_hwmod, passing @data to each
  2162. * function. @fn must return 0 for success or any other value for
  2163. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2164. * will stop and the non-zero return value will be passed to the
  2165. * caller of omap_hwmod_for_each(). @fn is called with
  2166. * omap_hwmod_for_each() held.
  2167. */
  2168. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2169. void *data)
  2170. {
  2171. struct omap_hwmod *temp_oh;
  2172. int ret = 0;
  2173. if (!fn)
  2174. return -EINVAL;
  2175. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2176. ret = (*fn)(temp_oh, data);
  2177. if (ret)
  2178. break;
  2179. }
  2180. return ret;
  2181. }
  2182. /**
  2183. * omap_hwmod_register_links - register an array of hwmod links
  2184. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2185. *
  2186. * Intended to be called early in boot before the clock framework is
  2187. * initialized. If @ois is not null, will register all omap_hwmods
  2188. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2189. * omap_hwmod_init() hasn't been called before calling this function,
  2190. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2191. * success.
  2192. */
  2193. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2194. {
  2195. int r, i;
  2196. if (!inited)
  2197. return -EINVAL;
  2198. if (!ois)
  2199. return 0;
  2200. if (!linkspace) {
  2201. if (_alloc_linkspace(ois)) {
  2202. pr_err("omap_hwmod: could not allocate link space\n");
  2203. return -ENOMEM;
  2204. }
  2205. }
  2206. i = 0;
  2207. do {
  2208. r = _register_link(ois[i]);
  2209. WARN(r && r != -EEXIST,
  2210. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2211. ois[i]->master->name, ois[i]->slave->name, r);
  2212. } while (ois[++i]);
  2213. return 0;
  2214. }
  2215. /**
  2216. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2217. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2218. *
  2219. * If the hwmod data corresponding to the MPU subsystem IP block
  2220. * hasn't been initialized and set up yet, do so now. This must be
  2221. * done first since sleep dependencies may be added from other hwmods
  2222. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2223. * return value.
  2224. */
  2225. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2226. {
  2227. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2228. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2229. __func__, MPU_INITIATOR_NAME);
  2230. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2231. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2232. }
  2233. /**
  2234. * omap_hwmod_setup_one - set up a single hwmod
  2235. * @oh_name: const char * name of the already-registered hwmod to set up
  2236. *
  2237. * Initialize and set up a single hwmod. Intended to be used for a
  2238. * small number of early devices, such as the timer IP blocks used for
  2239. * the scheduler clock. Must be called after omap2_clk_init().
  2240. * Resolves the struct clk names to struct clk pointers for each
  2241. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2242. * -EINVAL upon error or 0 upon success.
  2243. */
  2244. int __init omap_hwmod_setup_one(const char *oh_name)
  2245. {
  2246. struct omap_hwmod *oh;
  2247. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2248. oh = _lookup(oh_name);
  2249. if (!oh) {
  2250. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2251. return -EINVAL;
  2252. }
  2253. _ensure_mpu_hwmod_is_setup(oh);
  2254. _init(oh, NULL);
  2255. _setup(oh, NULL);
  2256. return 0;
  2257. }
  2258. /**
  2259. * omap_hwmod_setup_all - set up all registered IP blocks
  2260. *
  2261. * Initialize and set up all IP blocks registered with the hwmod code.
  2262. * Must be called after omap2_clk_init(). Resolves the struct clk
  2263. * names to struct clk pointers for each registered omap_hwmod. Also
  2264. * calls _setup() on each hwmod. Returns 0 upon success.
  2265. */
  2266. static int __init omap_hwmod_setup_all(void)
  2267. {
  2268. _ensure_mpu_hwmod_is_setup(NULL);
  2269. omap_hwmod_for_each(_init, NULL);
  2270. omap_hwmod_for_each(_setup, NULL);
  2271. return 0;
  2272. }
  2273. core_initcall(omap_hwmod_setup_all);
  2274. /**
  2275. * omap_hwmod_enable - enable an omap_hwmod
  2276. * @oh: struct omap_hwmod *
  2277. *
  2278. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2279. * Returns -EINVAL on error or passes along the return value from _enable().
  2280. */
  2281. int omap_hwmod_enable(struct omap_hwmod *oh)
  2282. {
  2283. int r;
  2284. unsigned long flags;
  2285. if (!oh)
  2286. return -EINVAL;
  2287. spin_lock_irqsave(&oh->_lock, flags);
  2288. r = _enable(oh);
  2289. spin_unlock_irqrestore(&oh->_lock, flags);
  2290. return r;
  2291. }
  2292. /**
  2293. * omap_hwmod_idle - idle an omap_hwmod
  2294. * @oh: struct omap_hwmod *
  2295. *
  2296. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2297. * Returns -EINVAL on error or passes along the return value from _idle().
  2298. */
  2299. int omap_hwmod_idle(struct omap_hwmod *oh)
  2300. {
  2301. unsigned long flags;
  2302. if (!oh)
  2303. return -EINVAL;
  2304. spin_lock_irqsave(&oh->_lock, flags);
  2305. _idle(oh);
  2306. spin_unlock_irqrestore(&oh->_lock, flags);
  2307. return 0;
  2308. }
  2309. /**
  2310. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2311. * @oh: struct omap_hwmod *
  2312. *
  2313. * Shutdown an omap_hwmod @oh. Intended to be called by
  2314. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2315. * the return value from _shutdown().
  2316. */
  2317. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2318. {
  2319. unsigned long flags;
  2320. if (!oh)
  2321. return -EINVAL;
  2322. spin_lock_irqsave(&oh->_lock, flags);
  2323. _shutdown(oh);
  2324. spin_unlock_irqrestore(&oh->_lock, flags);
  2325. return 0;
  2326. }
  2327. /**
  2328. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2329. * @oh: struct omap_hwmod *oh
  2330. *
  2331. * Intended to be called by the omap_device code.
  2332. */
  2333. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2334. {
  2335. unsigned long flags;
  2336. spin_lock_irqsave(&oh->_lock, flags);
  2337. _enable_clocks(oh);
  2338. spin_unlock_irqrestore(&oh->_lock, flags);
  2339. return 0;
  2340. }
  2341. /**
  2342. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2343. * @oh: struct omap_hwmod *oh
  2344. *
  2345. * Intended to be called by the omap_device code.
  2346. */
  2347. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2348. {
  2349. unsigned long flags;
  2350. spin_lock_irqsave(&oh->_lock, flags);
  2351. _disable_clocks(oh);
  2352. spin_unlock_irqrestore(&oh->_lock, flags);
  2353. return 0;
  2354. }
  2355. /**
  2356. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2357. * @oh: struct omap_hwmod *oh
  2358. *
  2359. * Intended to be called by drivers and core code when all posted
  2360. * writes to a device must complete before continuing further
  2361. * execution (for example, after clearing some device IRQSTATUS
  2362. * register bits)
  2363. *
  2364. * XXX what about targets with multiple OCP threads?
  2365. */
  2366. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2367. {
  2368. BUG_ON(!oh);
  2369. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2370. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2371. oh->name);
  2372. return;
  2373. }
  2374. /*
  2375. * Forces posted writes to complete on the OCP thread handling
  2376. * register writes
  2377. */
  2378. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2379. }
  2380. /**
  2381. * omap_hwmod_reset - reset the hwmod
  2382. * @oh: struct omap_hwmod *
  2383. *
  2384. * Under some conditions, a driver may wish to reset the entire device.
  2385. * Called from omap_device code. Returns -EINVAL on error or passes along
  2386. * the return value from _reset().
  2387. */
  2388. int omap_hwmod_reset(struct omap_hwmod *oh)
  2389. {
  2390. int r;
  2391. unsigned long flags;
  2392. if (!oh)
  2393. return -EINVAL;
  2394. spin_lock_irqsave(&oh->_lock, flags);
  2395. r = _reset(oh);
  2396. spin_unlock_irqrestore(&oh->_lock, flags);
  2397. return r;
  2398. }
  2399. /*
  2400. * IP block data retrieval functions
  2401. */
  2402. /**
  2403. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2404. * @oh: struct omap_hwmod *
  2405. * @res: pointer to the first element of an array of struct resource to fill
  2406. *
  2407. * Count the number of struct resource array elements necessary to
  2408. * contain omap_hwmod @oh resources. Intended to be called by code
  2409. * that registers omap_devices. Intended to be used to determine the
  2410. * size of a dynamically-allocated struct resource array, before
  2411. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2412. * resource array elements needed.
  2413. *
  2414. * XXX This code is not optimized. It could attempt to merge adjacent
  2415. * resource IDs.
  2416. *
  2417. */
  2418. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2419. {
  2420. struct omap_hwmod_ocp_if *os;
  2421. struct list_head *p;
  2422. int ret;
  2423. int i = 0;
  2424. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2425. p = oh->slave_ports.next;
  2426. while (i < oh->slaves_cnt) {
  2427. os = _fetch_next_ocp_if(&p, &i);
  2428. ret += _count_ocp_if_addr_spaces(os);
  2429. }
  2430. return ret;
  2431. }
  2432. /**
  2433. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2434. * @oh: struct omap_hwmod *
  2435. * @res: pointer to the first element of an array of struct resource to fill
  2436. *
  2437. * Fill the struct resource array @res with resource data from the
  2438. * omap_hwmod @oh. Intended to be called by code that registers
  2439. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2440. * number of array elements filled.
  2441. */
  2442. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2443. {
  2444. struct omap_hwmod_ocp_if *os;
  2445. struct list_head *p;
  2446. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2447. int r = 0;
  2448. /* For each IRQ, DMA, memory area, fill in array.*/
  2449. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2450. for (i = 0; i < mpu_irqs_cnt; i++) {
  2451. (res + r)->name = (oh->mpu_irqs + i)->name;
  2452. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2453. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2454. (res + r)->flags = IORESOURCE_IRQ;
  2455. r++;
  2456. }
  2457. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2458. for (i = 0; i < sdma_reqs_cnt; i++) {
  2459. (res + r)->name = (oh->sdma_reqs + i)->name;
  2460. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2461. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2462. (res + r)->flags = IORESOURCE_DMA;
  2463. r++;
  2464. }
  2465. p = oh->slave_ports.next;
  2466. i = 0;
  2467. while (i < oh->slaves_cnt) {
  2468. os = _fetch_next_ocp_if(&p, &i);
  2469. addr_cnt = _count_ocp_if_addr_spaces(os);
  2470. for (j = 0; j < addr_cnt; j++) {
  2471. (res + r)->name = (os->addr + j)->name;
  2472. (res + r)->start = (os->addr + j)->pa_start;
  2473. (res + r)->end = (os->addr + j)->pa_end;
  2474. (res + r)->flags = IORESOURCE_MEM;
  2475. r++;
  2476. }
  2477. }
  2478. return r;
  2479. }
  2480. /**
  2481. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2482. * @oh: struct omap_hwmod * to operate on
  2483. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2484. * @name: pointer to the name of the data to fetch (optional)
  2485. * @rsrc: pointer to a struct resource, allocated by the caller
  2486. *
  2487. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2488. * data for the IP block pointed to by @oh. The data will be filled
  2489. * into a struct resource record pointed to by @rsrc. The struct
  2490. * resource must be allocated by the caller. When @name is non-null,
  2491. * the data associated with the matching entry in the IRQ/SDMA/address
  2492. * space hwmod data arrays will be returned. If @name is null, the
  2493. * first array entry will be returned. Data order is not meaningful
  2494. * in hwmod data, so callers are strongly encouraged to use a non-null
  2495. * @name whenever possible to avoid unpredictable effects if hwmod
  2496. * data is later added that causes data ordering to change. This
  2497. * function is only intended for use by OMAP core code. Device
  2498. * drivers should not call this function - the appropriate bus-related
  2499. * data accessor functions should be used instead. Returns 0 upon
  2500. * success or a negative error code upon error.
  2501. */
  2502. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2503. const char *name, struct resource *rsrc)
  2504. {
  2505. int r;
  2506. unsigned int irq, dma;
  2507. u32 pa_start, pa_end;
  2508. if (!oh || !rsrc)
  2509. return -EINVAL;
  2510. if (type == IORESOURCE_IRQ) {
  2511. r = _get_mpu_irq_by_name(oh, name, &irq);
  2512. if (r)
  2513. return r;
  2514. rsrc->start = irq;
  2515. rsrc->end = irq;
  2516. } else if (type == IORESOURCE_DMA) {
  2517. r = _get_sdma_req_by_name(oh, name, &dma);
  2518. if (r)
  2519. return r;
  2520. rsrc->start = dma;
  2521. rsrc->end = dma;
  2522. } else if (type == IORESOURCE_MEM) {
  2523. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2524. if (r)
  2525. return r;
  2526. rsrc->start = pa_start;
  2527. rsrc->end = pa_end;
  2528. } else {
  2529. return -EINVAL;
  2530. }
  2531. rsrc->flags = type;
  2532. rsrc->name = name;
  2533. return 0;
  2534. }
  2535. /**
  2536. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2537. * @oh: struct omap_hwmod *
  2538. *
  2539. * Return the powerdomain pointer associated with the OMAP module
  2540. * @oh's main clock. If @oh does not have a main clk, return the
  2541. * powerdomain associated with the interface clock associated with the
  2542. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2543. * instead?) Returns NULL on error, or a struct powerdomain * on
  2544. * success.
  2545. */
  2546. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2547. {
  2548. struct clk *c;
  2549. struct omap_hwmod_ocp_if *oi;
  2550. if (!oh)
  2551. return NULL;
  2552. if (oh->_clk) {
  2553. c = oh->_clk;
  2554. } else {
  2555. oi = _find_mpu_rt_port(oh);
  2556. if (!oi)
  2557. return NULL;
  2558. c = oi->_clk;
  2559. }
  2560. if (!c->clkdm)
  2561. return NULL;
  2562. return c->clkdm->pwrdm.ptr;
  2563. }
  2564. /**
  2565. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2566. * @oh: struct omap_hwmod *
  2567. *
  2568. * Returns the virtual address corresponding to the beginning of the
  2569. * module's register target, in the address range that is intended to
  2570. * be used by the MPU. Returns the virtual address upon success or NULL
  2571. * upon error.
  2572. */
  2573. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2574. {
  2575. if (!oh)
  2576. return NULL;
  2577. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2578. return NULL;
  2579. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2580. return NULL;
  2581. return oh->_mpu_rt_va;
  2582. }
  2583. /**
  2584. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2585. * @oh: struct omap_hwmod *
  2586. * @init_oh: struct omap_hwmod * (initiator)
  2587. *
  2588. * Add a sleep dependency between the initiator @init_oh and @oh.
  2589. * Intended to be called by DSP/Bridge code via platform_data for the
  2590. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2591. * code needs to add/del initiator dependencies dynamically
  2592. * before/after accessing a device. Returns the return value from
  2593. * _add_initiator_dep().
  2594. *
  2595. * XXX Keep a usecount in the clockdomain code
  2596. */
  2597. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2598. struct omap_hwmod *init_oh)
  2599. {
  2600. return _add_initiator_dep(oh, init_oh);
  2601. }
  2602. /*
  2603. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2604. * for context save/restore operations?
  2605. */
  2606. /**
  2607. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2608. * @oh: struct omap_hwmod *
  2609. * @init_oh: struct omap_hwmod * (initiator)
  2610. *
  2611. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2612. * Intended to be called by DSP/Bridge code via platform_data for the
  2613. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2614. * code needs to add/del initiator dependencies dynamically
  2615. * before/after accessing a device. Returns the return value from
  2616. * _del_initiator_dep().
  2617. *
  2618. * XXX Keep a usecount in the clockdomain code
  2619. */
  2620. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2621. struct omap_hwmod *init_oh)
  2622. {
  2623. return _del_initiator_dep(oh, init_oh);
  2624. }
  2625. /**
  2626. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2627. * @oh: struct omap_hwmod *
  2628. *
  2629. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2630. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2631. * this IP block if it has dynamic mux entries. Eventually this
  2632. * should set PRCM wakeup registers to cause the PRCM to receive
  2633. * wakeup events from the module. Does not set any wakeup routing
  2634. * registers beyond this point - if the module is to wake up any other
  2635. * module or subsystem, that must be set separately. Called by
  2636. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2637. */
  2638. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2639. {
  2640. unsigned long flags;
  2641. u32 v;
  2642. spin_lock_irqsave(&oh->_lock, flags);
  2643. if (oh->class->sysc &&
  2644. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2645. v = oh->_sysc_cache;
  2646. _enable_wakeup(oh, &v);
  2647. _write_sysconfig(v, oh);
  2648. }
  2649. _set_idle_ioring_wakeup(oh, true);
  2650. spin_unlock_irqrestore(&oh->_lock, flags);
  2651. return 0;
  2652. }
  2653. /**
  2654. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2655. * @oh: struct omap_hwmod *
  2656. *
  2657. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2658. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2659. * events for this IP block if it has dynamic mux entries. Eventually
  2660. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2661. * wakeup events from the module. Does not set any wakeup routing
  2662. * registers beyond this point - if the module is to wake up any other
  2663. * module or subsystem, that must be set separately. Called by
  2664. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2665. */
  2666. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2667. {
  2668. unsigned long flags;
  2669. u32 v;
  2670. spin_lock_irqsave(&oh->_lock, flags);
  2671. if (oh->class->sysc &&
  2672. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2673. v = oh->_sysc_cache;
  2674. _disable_wakeup(oh, &v);
  2675. _write_sysconfig(v, oh);
  2676. }
  2677. _set_idle_ioring_wakeup(oh, false);
  2678. spin_unlock_irqrestore(&oh->_lock, flags);
  2679. return 0;
  2680. }
  2681. /**
  2682. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2683. * contained in the hwmod module.
  2684. * @oh: struct omap_hwmod *
  2685. * @name: name of the reset line to lookup and assert
  2686. *
  2687. * Some IP like dsp, ipu or iva contain processor that require
  2688. * an HW reset line to be assert / deassert in order to enable fully
  2689. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2690. * yet supported on this OMAP; otherwise, passes along the return value
  2691. * from _assert_hardreset().
  2692. */
  2693. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2694. {
  2695. int ret;
  2696. unsigned long flags;
  2697. if (!oh)
  2698. return -EINVAL;
  2699. spin_lock_irqsave(&oh->_lock, flags);
  2700. ret = _assert_hardreset(oh, name);
  2701. spin_unlock_irqrestore(&oh->_lock, flags);
  2702. return ret;
  2703. }
  2704. /**
  2705. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2706. * contained in the hwmod module.
  2707. * @oh: struct omap_hwmod *
  2708. * @name: name of the reset line to look up and deassert
  2709. *
  2710. * Some IP like dsp, ipu or iva contain processor that require
  2711. * an HW reset line to be assert / deassert in order to enable fully
  2712. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2713. * yet supported on this OMAP; otherwise, passes along the return value
  2714. * from _deassert_hardreset().
  2715. */
  2716. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2717. {
  2718. int ret;
  2719. unsigned long flags;
  2720. if (!oh)
  2721. return -EINVAL;
  2722. spin_lock_irqsave(&oh->_lock, flags);
  2723. ret = _deassert_hardreset(oh, name);
  2724. spin_unlock_irqrestore(&oh->_lock, flags);
  2725. return ret;
  2726. }
  2727. /**
  2728. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2729. * contained in the hwmod module
  2730. * @oh: struct omap_hwmod *
  2731. * @name: name of the reset line to look up and read
  2732. *
  2733. * Return the current state of the hwmod @oh's reset line named @name:
  2734. * returns -EINVAL upon parameter error or if this operation
  2735. * is unsupported on the current OMAP; otherwise, passes along the return
  2736. * value from _read_hardreset().
  2737. */
  2738. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2739. {
  2740. int ret;
  2741. unsigned long flags;
  2742. if (!oh)
  2743. return -EINVAL;
  2744. spin_lock_irqsave(&oh->_lock, flags);
  2745. ret = _read_hardreset(oh, name);
  2746. spin_unlock_irqrestore(&oh->_lock, flags);
  2747. return ret;
  2748. }
  2749. /**
  2750. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2751. * @classname: struct omap_hwmod_class name to search for
  2752. * @fn: callback function pointer to call for each hwmod in class @classname
  2753. * @user: arbitrary context data to pass to the callback function
  2754. *
  2755. * For each omap_hwmod of class @classname, call @fn.
  2756. * If the callback function returns something other than
  2757. * zero, the iterator is terminated, and the callback function's return
  2758. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2759. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2760. */
  2761. int omap_hwmod_for_each_by_class(const char *classname,
  2762. int (*fn)(struct omap_hwmod *oh,
  2763. void *user),
  2764. void *user)
  2765. {
  2766. struct omap_hwmod *temp_oh;
  2767. int ret = 0;
  2768. if (!classname || !fn)
  2769. return -EINVAL;
  2770. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2771. __func__, classname);
  2772. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2773. if (!strcmp(temp_oh->class->name, classname)) {
  2774. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2775. __func__, temp_oh->name);
  2776. ret = (*fn)(temp_oh, user);
  2777. if (ret)
  2778. break;
  2779. }
  2780. }
  2781. if (ret)
  2782. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2783. __func__, ret);
  2784. return ret;
  2785. }
  2786. /**
  2787. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2788. * @oh: struct omap_hwmod *
  2789. * @state: state that _setup() should leave the hwmod in
  2790. *
  2791. * Sets the hwmod state that @oh will enter at the end of _setup()
  2792. * (called by omap_hwmod_setup_*()). See also the documentation
  2793. * for _setup_postsetup(), above. Returns 0 upon success or
  2794. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2795. * in the wrong state.
  2796. */
  2797. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2798. {
  2799. int ret;
  2800. unsigned long flags;
  2801. if (!oh)
  2802. return -EINVAL;
  2803. if (state != _HWMOD_STATE_DISABLED &&
  2804. state != _HWMOD_STATE_ENABLED &&
  2805. state != _HWMOD_STATE_IDLE)
  2806. return -EINVAL;
  2807. spin_lock_irqsave(&oh->_lock, flags);
  2808. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2809. ret = -EINVAL;
  2810. goto ohsps_unlock;
  2811. }
  2812. oh->_postsetup_state = state;
  2813. ret = 0;
  2814. ohsps_unlock:
  2815. spin_unlock_irqrestore(&oh->_lock, flags);
  2816. return ret;
  2817. }
  2818. /**
  2819. * omap_hwmod_get_context_loss_count - get lost context count
  2820. * @oh: struct omap_hwmod *
  2821. *
  2822. * Query the powerdomain of of @oh to get the context loss
  2823. * count for this device.
  2824. *
  2825. * Returns the context loss count of the powerdomain assocated with @oh
  2826. * upon success, or zero if no powerdomain exists for @oh.
  2827. */
  2828. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2829. {
  2830. struct powerdomain *pwrdm;
  2831. int ret = 0;
  2832. pwrdm = omap_hwmod_get_pwrdm(oh);
  2833. if (pwrdm)
  2834. ret = pwrdm_get_context_loss_count(pwrdm);
  2835. return ret;
  2836. }
  2837. /**
  2838. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2839. * @oh: struct omap_hwmod *
  2840. *
  2841. * Prevent the hwmod @oh from being reset during the setup process.
  2842. * Intended for use by board-*.c files on boards with devices that
  2843. * cannot tolerate being reset. Must be called before the hwmod has
  2844. * been set up. Returns 0 upon success or negative error code upon
  2845. * failure.
  2846. */
  2847. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2848. {
  2849. if (!oh)
  2850. return -EINVAL;
  2851. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2852. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2853. oh->name);
  2854. return -EINVAL;
  2855. }
  2856. oh->flags |= HWMOD_INIT_NO_RESET;
  2857. return 0;
  2858. }
  2859. /**
  2860. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2861. * @oh: struct omap_hwmod * containing hwmod mux entries
  2862. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2863. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2864. *
  2865. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2866. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2867. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2868. * this function is not called for a given pad_idx, then the ISR
  2869. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2870. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2871. * the _dynamic or wakeup_ entry: if there are other entries not
  2872. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2873. * entries are NOT COUNTED in the dynamic pad index. This function
  2874. * must be called separately for each pad that requires its interrupt
  2875. * to be re-routed this way. Returns -EINVAL if there is an argument
  2876. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2877. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2878. *
  2879. * XXX This function interface is fragile. Rather than using array
  2880. * indexes, which are subject to unpredictable change, it should be
  2881. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2882. * pad records.
  2883. */
  2884. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2885. {
  2886. int nr_irqs;
  2887. might_sleep();
  2888. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2889. pad_idx >= oh->mux->nr_pads_dynamic)
  2890. return -EINVAL;
  2891. /* Check the number of available mpu_irqs */
  2892. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2893. ;
  2894. if (irq_idx >= nr_irqs)
  2895. return -EINVAL;
  2896. if (!oh->mux->irqs) {
  2897. /* XXX What frees this? */
  2898. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2899. GFP_KERNEL);
  2900. if (!oh->mux->irqs)
  2901. return -ENOMEM;
  2902. }
  2903. oh->mux->irqs[pad_idx] = irq_idx;
  2904. return 0;
  2905. }
  2906. /**
  2907. * omap_hwmod_init - initialize the hwmod code
  2908. *
  2909. * Sets up some function pointers needed by the hwmod code to operate on the
  2910. * currently-booted SoC. Intended to be called once during kernel init
  2911. * before any hwmods are registered. No return value.
  2912. */
  2913. void __init omap_hwmod_init(void)
  2914. {
  2915. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  2916. soc_ops.wait_target_ready = _omap2_wait_target_ready;
  2917. } else if (cpu_is_omap44xx()) {
  2918. soc_ops.enable_module = _omap4_enable_module;
  2919. soc_ops.disable_module = _omap4_disable_module;
  2920. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  2921. } else {
  2922. WARN(1, "omap_hwmod: unknown SoC type\n");
  2923. }
  2924. inited = true;
  2925. }