radeon_irq_kms.c 13 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/radeon_drm.h>
  31. #include "radeon_reg.h"
  32. #include "radeon.h"
  33. #include "atom.h"
  34. #define RADEON_WAIT_IDLE_TIMEOUT 200
  35. /**
  36. * radeon_driver_irq_handler_kms - irq handler for KMS
  37. *
  38. * @DRM_IRQ_ARGS: args
  39. *
  40. * This is the irq handler for the radeon KMS driver (all asics).
  41. * radeon_irq_process is a macro that points to the per-asic
  42. * irq handler callback.
  43. */
  44. irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  45. {
  46. struct drm_device *dev = (struct drm_device *) arg;
  47. struct radeon_device *rdev = dev->dev_private;
  48. return radeon_irq_process(rdev);
  49. }
  50. /*
  51. * Handle hotplug events outside the interrupt handler proper.
  52. */
  53. /**
  54. * radeon_hotplug_work_func - display hotplug work handler
  55. *
  56. * @work: work struct
  57. *
  58. * This is the hot plug event work handler (all asics).
  59. * The work gets scheduled from the irq handler if there
  60. * was a hot plug interrupt. It walks the connector table
  61. * and calls the hotplug handler for each one, then sends
  62. * a drm hotplug event to alert userspace.
  63. */
  64. static void radeon_hotplug_work_func(struct work_struct *work)
  65. {
  66. struct radeon_device *rdev = container_of(work, struct radeon_device,
  67. hotplug_work);
  68. struct drm_device *dev = rdev->ddev;
  69. struct drm_mode_config *mode_config = &dev->mode_config;
  70. struct drm_connector *connector;
  71. if (mode_config->num_connector) {
  72. list_for_each_entry(connector, &mode_config->connector_list, head)
  73. radeon_connector_hotplug(connector);
  74. }
  75. /* Just fire off a uevent and let userspace tell us what to do */
  76. drm_helper_hpd_irq_event(dev);
  77. }
  78. /**
  79. * radeon_irq_reset_work_func - execute gpu reset
  80. *
  81. * @work: work struct
  82. *
  83. * Execute scheduled gpu reset (cayman+).
  84. * This function is called when the irq handler
  85. * thinks we need a gpu reset.
  86. */
  87. static void radeon_irq_reset_work_func(struct work_struct *work)
  88. {
  89. struct radeon_device *rdev = container_of(work, struct radeon_device,
  90. reset_work);
  91. radeon_gpu_reset(rdev);
  92. }
  93. /**
  94. * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
  95. *
  96. * @dev: drm dev pointer
  97. *
  98. * Gets the hw ready to enable irqs (all asics).
  99. * This function disables all interrupt sources on the GPU.
  100. */
  101. void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  102. {
  103. struct radeon_device *rdev = dev->dev_private;
  104. unsigned long irqflags;
  105. unsigned i;
  106. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  107. /* Disable *all* interrupts */
  108. for (i = 0; i < RADEON_NUM_RINGS; i++)
  109. atomic_set(&rdev->irq.ring_int[i], 0);
  110. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  111. rdev->irq.hpd[i] = false;
  112. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  113. rdev->irq.crtc_vblank_int[i] = false;
  114. atomic_set(&rdev->irq.pflip[i], 0);
  115. rdev->irq.afmt[i] = false;
  116. }
  117. radeon_irq_set(rdev);
  118. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  119. /* Clear bits */
  120. radeon_irq_process(rdev);
  121. }
  122. /**
  123. * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
  124. *
  125. * @dev: drm dev pointer
  126. *
  127. * Handles stuff to be done after enabling irqs (all asics).
  128. * Returns 0 on success.
  129. */
  130. int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  131. {
  132. dev->max_vblank_count = 0x001fffff;
  133. return 0;
  134. }
  135. /**
  136. * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
  137. *
  138. * @dev: drm dev pointer
  139. *
  140. * This function disables all interrupt sources on the GPU (all asics).
  141. */
  142. void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  143. {
  144. struct radeon_device *rdev = dev->dev_private;
  145. unsigned long irqflags;
  146. unsigned i;
  147. if (rdev == NULL) {
  148. return;
  149. }
  150. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  151. /* Disable *all* interrupts */
  152. for (i = 0; i < RADEON_NUM_RINGS; i++)
  153. atomic_set(&rdev->irq.ring_int[i], 0);
  154. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  155. rdev->irq.hpd[i] = false;
  156. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  157. rdev->irq.crtc_vblank_int[i] = false;
  158. atomic_set(&rdev->irq.pflip[i], 0);
  159. rdev->irq.afmt[i] = false;
  160. }
  161. radeon_irq_set(rdev);
  162. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  163. }
  164. /**
  165. * radeon_msi_ok - asic specific msi checks
  166. *
  167. * @rdev: radeon device pointer
  168. *
  169. * Handles asic specific MSI checks to determine if
  170. * MSIs should be enabled on a particular chip (all asics).
  171. * Returns true if MSIs should be enabled, false if MSIs
  172. * should not be enabled.
  173. */
  174. static bool radeon_msi_ok(struct radeon_device *rdev)
  175. {
  176. /* RV370/RV380 was first asic with MSI support */
  177. if (rdev->family < CHIP_RV380)
  178. return false;
  179. /* MSIs don't work on AGP */
  180. if (rdev->flags & RADEON_IS_AGP)
  181. return false;
  182. /* force MSI on */
  183. if (radeon_msi == 1)
  184. return true;
  185. else if (radeon_msi == 0)
  186. return false;
  187. /* Quirks */
  188. /* HP RS690 only seems to work with MSIs. */
  189. if ((rdev->pdev->device == 0x791f) &&
  190. (rdev->pdev->subsystem_vendor == 0x103c) &&
  191. (rdev->pdev->subsystem_device == 0x30c2))
  192. return true;
  193. /* Dell RS690 only seems to work with MSIs. */
  194. if ((rdev->pdev->device == 0x791f) &&
  195. (rdev->pdev->subsystem_vendor == 0x1028) &&
  196. (rdev->pdev->subsystem_device == 0x01fc))
  197. return true;
  198. /* Dell RS690 only seems to work with MSIs. */
  199. if ((rdev->pdev->device == 0x791f) &&
  200. (rdev->pdev->subsystem_vendor == 0x1028) &&
  201. (rdev->pdev->subsystem_device == 0x01fd))
  202. return true;
  203. /* Gateway RS690 only seems to work with MSIs. */
  204. if ((rdev->pdev->device == 0x791f) &&
  205. (rdev->pdev->subsystem_vendor == 0x107b) &&
  206. (rdev->pdev->subsystem_device == 0x0185))
  207. return true;
  208. /* try and enable MSIs by default on all RS690s */
  209. if (rdev->family == CHIP_RS690)
  210. return true;
  211. /* RV515 seems to have MSI issues where it loses
  212. * MSI rearms occasionally. This leads to lockups and freezes.
  213. * disable it by default.
  214. */
  215. if (rdev->family == CHIP_RV515)
  216. return false;
  217. if (rdev->flags & RADEON_IS_IGP) {
  218. /* APUs work fine with MSIs */
  219. if (rdev->family >= CHIP_PALM)
  220. return true;
  221. /* lots of IGPs have problems with MSIs */
  222. return false;
  223. }
  224. return true;
  225. }
  226. /**
  227. * radeon_irq_kms_init - init driver interrupt info
  228. *
  229. * @rdev: radeon device pointer
  230. *
  231. * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
  232. * Returns 0 for success, error for failure.
  233. */
  234. int radeon_irq_kms_init(struct radeon_device *rdev)
  235. {
  236. int r = 0;
  237. INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
  238. INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
  239. INIT_WORK(&rdev->reset_work, radeon_irq_reset_work_func);
  240. spin_lock_init(&rdev->irq.lock);
  241. r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
  242. if (r) {
  243. return r;
  244. }
  245. /* enable msi */
  246. rdev->msi_enabled = 0;
  247. if (radeon_msi_ok(rdev)) {
  248. int ret = pci_enable_msi(rdev->pdev);
  249. if (!ret) {
  250. rdev->msi_enabled = 1;
  251. dev_info(rdev->dev, "radeon: using MSI.\n");
  252. }
  253. }
  254. rdev->irq.installed = true;
  255. r = drm_irq_install(rdev->ddev);
  256. if (r) {
  257. rdev->irq.installed = false;
  258. return r;
  259. }
  260. DRM_INFO("radeon: irq initialized.\n");
  261. return 0;
  262. }
  263. /**
  264. * radeon_irq_kms_fini - tear down driver interrupt info
  265. *
  266. * @rdev: radeon device pointer
  267. *
  268. * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
  269. */
  270. void radeon_irq_kms_fini(struct radeon_device *rdev)
  271. {
  272. drm_vblank_cleanup(rdev->ddev);
  273. if (rdev->irq.installed) {
  274. drm_irq_uninstall(rdev->ddev);
  275. rdev->irq.installed = false;
  276. if (rdev->msi_enabled)
  277. pci_disable_msi(rdev->pdev);
  278. }
  279. flush_work(&rdev->hotplug_work);
  280. }
  281. /**
  282. * radeon_irq_kms_sw_irq_get - enable software interrupt
  283. *
  284. * @rdev: radeon device pointer
  285. * @ring: ring whose interrupt you want to enable
  286. *
  287. * Enables the software interrupt for a specific ring (all asics).
  288. * The software interrupt is generally used to signal a fence on
  289. * a particular ring.
  290. */
  291. void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
  292. {
  293. unsigned long irqflags;
  294. if (!rdev->ddev->irq_enabled)
  295. return;
  296. if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
  297. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  298. radeon_irq_set(rdev);
  299. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  300. }
  301. }
  302. /**
  303. * radeon_irq_kms_sw_irq_put - disable software interrupt
  304. *
  305. * @rdev: radeon device pointer
  306. * @ring: ring whose interrupt you want to disable
  307. *
  308. * Disables the software interrupt for a specific ring (all asics).
  309. * The software interrupt is generally used to signal a fence on
  310. * a particular ring.
  311. */
  312. void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
  313. {
  314. unsigned long irqflags;
  315. if (!rdev->ddev->irq_enabled)
  316. return;
  317. if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
  318. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  319. radeon_irq_set(rdev);
  320. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  321. }
  322. }
  323. /**
  324. * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
  325. *
  326. * @rdev: radeon device pointer
  327. * @crtc: crtc whose interrupt you want to enable
  328. *
  329. * Enables the pageflip interrupt for a specific crtc (all asics).
  330. * For pageflips we use the vblank interrupt source.
  331. */
  332. void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
  333. {
  334. unsigned long irqflags;
  335. if (crtc < 0 || crtc >= rdev->num_crtc)
  336. return;
  337. if (!rdev->ddev->irq_enabled)
  338. return;
  339. if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
  340. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  341. radeon_irq_set(rdev);
  342. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  343. }
  344. }
  345. /**
  346. * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
  347. *
  348. * @rdev: radeon device pointer
  349. * @crtc: crtc whose interrupt you want to disable
  350. *
  351. * Disables the pageflip interrupt for a specific crtc (all asics).
  352. * For pageflips we use the vblank interrupt source.
  353. */
  354. void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
  355. {
  356. unsigned long irqflags;
  357. if (crtc < 0 || crtc >= rdev->num_crtc)
  358. return;
  359. if (!rdev->ddev->irq_enabled)
  360. return;
  361. if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
  362. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  363. radeon_irq_set(rdev);
  364. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  365. }
  366. }
  367. /**
  368. * radeon_irq_kms_enable_afmt - enable audio format change interrupt
  369. *
  370. * @rdev: radeon device pointer
  371. * @block: afmt block whose interrupt you want to enable
  372. *
  373. * Enables the afmt change interrupt for a specific afmt block (all asics).
  374. */
  375. void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
  376. {
  377. unsigned long irqflags;
  378. if (!rdev->ddev->irq_enabled)
  379. return;
  380. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  381. rdev->irq.afmt[block] = true;
  382. radeon_irq_set(rdev);
  383. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  384. }
  385. /**
  386. * radeon_irq_kms_disable_afmt - disable audio format change interrupt
  387. *
  388. * @rdev: radeon device pointer
  389. * @block: afmt block whose interrupt you want to disable
  390. *
  391. * Disables the afmt change interrupt for a specific afmt block (all asics).
  392. */
  393. void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
  394. {
  395. unsigned long irqflags;
  396. if (!rdev->ddev->irq_enabled)
  397. return;
  398. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  399. rdev->irq.afmt[block] = false;
  400. radeon_irq_set(rdev);
  401. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  402. }
  403. /**
  404. * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
  405. *
  406. * @rdev: radeon device pointer
  407. * @hpd_mask: mask of hpd pins you want to enable.
  408. *
  409. * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
  410. */
  411. void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  412. {
  413. unsigned long irqflags;
  414. int i;
  415. if (!rdev->ddev->irq_enabled)
  416. return;
  417. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  418. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  419. rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
  420. radeon_irq_set(rdev);
  421. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  422. }
  423. /**
  424. * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
  425. *
  426. * @rdev: radeon device pointer
  427. * @hpd_mask: mask of hpd pins you want to disable.
  428. *
  429. * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
  430. */
  431. void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  432. {
  433. unsigned long irqflags;
  434. int i;
  435. if (!rdev->ddev->irq_enabled)
  436. return;
  437. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  438. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  439. rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
  440. radeon_irq_set(rdev);
  441. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  442. }