imx53-ard.dts 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164
  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. /include/ "imx53.dtsi"
  14. / {
  15. model = "Freescale i.MX53 Automotive Reference Design Board";
  16. compatible = "fsl,imx53-ard", "fsl,imx53";
  17. memory {
  18. reg = <0x70000000 0x40000000>;
  19. };
  20. soc {
  21. aips@50000000 { /* AIPS1 */
  22. spba@50000000 {
  23. esdhc@50004000 { /* ESDHC1 */
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_esdhc1_2>;
  26. cd-gpios = <&gpio1 1 0>;
  27. wp-gpios = <&gpio1 9 0>;
  28. status = "okay";
  29. };
  30. };
  31. iomuxc@53fa8000 {
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_hog>;
  34. hog {
  35. pinctrl_hog: hoggrp {
  36. fsl,pins = <
  37. 1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
  38. 1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
  39. 486 0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
  40. 739 0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
  41. 218 0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
  42. 226 0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
  43. 233 0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
  44. 241 0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
  45. 429 0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
  46. 435 0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
  47. 441 0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
  48. 448 0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
  49. 456 0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
  50. 464 0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
  51. 471 0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
  52. 477 0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
  53. 492 0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
  54. 500 0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
  55. 508 0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
  56. 516 0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
  57. 524 0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
  58. 532 0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
  59. 540 0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
  60. 548 0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
  61. 637 0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
  62. 642 0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
  63. 647 0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
  64. 652 0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
  65. 657 0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
  66. 662 0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
  67. 667 0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
  68. 611 0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
  69. 616 0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
  70. 607 0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
  71. >;
  72. };
  73. };
  74. };
  75. uart1: serial@53fbc000 {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&pinctrl_uart1_2>;
  78. status = "okay";
  79. };
  80. };
  81. };
  82. eim-cs1@f4000000 {
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. compatible = "fsl,eim-bus", "simple-bus";
  86. reg = <0xf4000000 0x3ff0000>;
  87. ranges;
  88. lan9220@f4000000 {
  89. compatible = "smsc,lan9220", "smsc,lan9115";
  90. reg = <0xf4000000 0x2000000>;
  91. phy-mode = "mii";
  92. interrupt-parent = <&gpio2>;
  93. interrupts = <31 0x8>;
  94. reg-io-width = <4>;
  95. /*
  96. * VDD33A and VDDVARIO of LAN9220 are supplied by
  97. * SW4_3V3 of LTC3589. Before the regulator driver
  98. * for this PMIC is available, we use a fixed dummy
  99. * 3V3 regulator to get LAN9220 driver probing work.
  100. */
  101. vdd33a-supply = <&reg_3p3v>;
  102. vddvario-supply = <&reg_3p3v>;
  103. smsc,irq-push-pull;
  104. };
  105. };
  106. regulators {
  107. compatible = "simple-bus";
  108. reg_3p3v: 3p3v {
  109. compatible = "regulator-fixed";
  110. regulator-name = "3P3V";
  111. regulator-min-microvolt = <3300000>;
  112. regulator-max-microvolt = <3300000>;
  113. regulator-always-on;
  114. };
  115. };
  116. gpio-keys {
  117. compatible = "gpio-keys";
  118. home {
  119. label = "Home";
  120. gpios = <&gpio5 10 0>;
  121. linux,code = <102>; /* KEY_HOME */
  122. gpio-key,wakeup;
  123. };
  124. back {
  125. label = "Back";
  126. gpios = <&gpio5 11 0>;
  127. linux,code = <158>; /* KEY_BACK */
  128. gpio-key,wakeup;
  129. };
  130. program {
  131. label = "Program";
  132. gpios = <&gpio5 12 0>;
  133. linux,code = <362>; /* KEY_PROGRAM */
  134. gpio-key,wakeup;
  135. };
  136. volume-up {
  137. label = "Volume Up";
  138. gpios = <&gpio5 13 0>;
  139. linux,code = <115>; /* KEY_VOLUMEUP */
  140. };
  141. volume-down {
  142. label = "Volume Down";
  143. gpios = <&gpio4 0 0>;
  144. linux,code = <114>; /* KEY_VOLUMEDOWN */
  145. };
  146. };
  147. };