entry.S 4.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Copyright (C) 2001 MIPS Technologies, Inc.
  9. */
  10. #include <asm/asm.h>
  11. #include <asm/asmmacro.h>
  12. #include <asm/regdef.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/stackframe.h>
  15. #include <asm/isadep.h>
  16. #include <asm/thread_info.h>
  17. #include <asm/war.h>
  18. #ifdef CONFIG_MIPS_MT_SMTC
  19. #include <asm/mipsmtregs.h>
  20. #endif
  21. #ifndef CONFIG_PREEMPT
  22. #define resume_kernel restore_all
  23. #else
  24. #define __ret_from_irq ret_from_exception
  25. #endif
  26. .text
  27. .align 5
  28. #ifndef CONFIG_PREEMPT
  29. FEXPORT(ret_from_exception)
  30. local_irq_disable # preempt stop
  31. b __ret_from_irq
  32. #endif
  33. FEXPORT(ret_from_irq)
  34. LONG_S s0, TI_REGS($28)
  35. FEXPORT(__ret_from_irq)
  36. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  37. andi t0, t0, KU_USER
  38. beqz t0, resume_kernel
  39. resume_userspace:
  40. local_irq_disable # make sure we dont miss an
  41. # interrupt setting need_resched
  42. # between sampling and return
  43. LONG_L a2, TI_FLAGS($28) # current->work
  44. andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
  45. bnez t0, work_pending
  46. j restore_all
  47. #ifdef CONFIG_PREEMPT
  48. resume_kernel:
  49. local_irq_disable
  50. lw t0, TI_PRE_COUNT($28)
  51. bnez t0, restore_all
  52. need_resched:
  53. LONG_L t0, TI_FLAGS($28)
  54. andi t1, t0, _TIF_NEED_RESCHED
  55. beqz t1, restore_all
  56. LONG_L t0, PT_STATUS(sp) # Interrupts off?
  57. andi t0, 1
  58. beqz t0, restore_all
  59. jal preempt_schedule_irq
  60. b need_resched
  61. #endif
  62. FEXPORT(ret_from_kernel_thread)
  63. jal schedule_tail # a0 = struct task_struct *prev
  64. move a0, s1
  65. jal s0
  66. li a0, 0
  67. j sys_exit
  68. FEXPORT(ret_from_fork)
  69. jal schedule_tail # a0 = struct task_struct *prev
  70. FEXPORT(syscall_exit)
  71. local_irq_disable # make sure need_resched and
  72. # signals dont change between
  73. # sampling and return
  74. LONG_L a2, TI_FLAGS($28) # current->work
  75. li t0, _TIF_ALLWORK_MASK
  76. and t0, a2, t0
  77. bnez t0, syscall_exit_work
  78. restore_all: # restore full frame
  79. #ifdef CONFIG_MIPS_MT_SMTC
  80. #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
  81. /* Re-arm any temporarily masked interrupts not explicitly "acked" */
  82. mfc0 v0, CP0_TCSTATUS
  83. ori v1, v0, TCSTATUS_IXMT
  84. mtc0 v1, CP0_TCSTATUS
  85. andi v0, TCSTATUS_IXMT
  86. _ehb
  87. mfc0 t0, CP0_TCCONTEXT
  88. DMT 9 # dmt t1
  89. jal mips_ihb
  90. mfc0 t2, CP0_STATUS
  91. andi t3, t0, 0xff00
  92. or t2, t2, t3
  93. mtc0 t2, CP0_STATUS
  94. _ehb
  95. andi t1, t1, VPECONTROL_TE
  96. beqz t1, 1f
  97. EMT
  98. 1:
  99. mfc0 v1, CP0_TCSTATUS
  100. /* We set IXMT above, XOR should clear it here */
  101. xori v1, v1, TCSTATUS_IXMT
  102. or v1, v0, v1
  103. mtc0 v1, CP0_TCSTATUS
  104. _ehb
  105. xor t0, t0, t3
  106. mtc0 t0, CP0_TCCONTEXT
  107. #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
  108. /* Detect and execute deferred IPI "interrupts" */
  109. LONG_L s0, TI_REGS($28)
  110. LONG_S sp, TI_REGS($28)
  111. jal deferred_smtc_ipi
  112. LONG_S s0, TI_REGS($28)
  113. #endif /* CONFIG_MIPS_MT_SMTC */
  114. .set noat
  115. RESTORE_TEMP
  116. RESTORE_AT
  117. RESTORE_STATIC
  118. restore_partial: # restore partial frame
  119. #ifdef CONFIG_TRACE_IRQFLAGS
  120. SAVE_STATIC
  121. SAVE_AT
  122. SAVE_TEMP
  123. LONG_L v0, PT_STATUS(sp)
  124. #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  125. and v0, ST0_IEP
  126. #else
  127. and v0, ST0_IE
  128. #endif
  129. beqz v0, 1f
  130. jal trace_hardirqs_on
  131. b 2f
  132. 1: jal trace_hardirqs_off
  133. 2:
  134. RESTORE_TEMP
  135. RESTORE_AT
  136. RESTORE_STATIC
  137. #endif
  138. RESTORE_SOME
  139. RESTORE_SP_AND_RET
  140. .set at
  141. work_pending:
  142. andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
  143. beqz t0, work_notifysig
  144. work_resched:
  145. jal schedule
  146. local_irq_disable # make sure need_resched and
  147. # signals dont change between
  148. # sampling and return
  149. LONG_L a2, TI_FLAGS($28)
  150. andi t0, a2, _TIF_WORK_MASK # is there any work to be done
  151. # other than syscall tracing?
  152. beqz t0, restore_all
  153. andi t0, a2, _TIF_NEED_RESCHED
  154. bnez t0, work_resched
  155. work_notifysig: # deal with pending signals and
  156. # notify-resume requests
  157. move a0, sp
  158. li a1, 0
  159. jal do_notify_resume # a2 already loaded
  160. j resume_userspace
  161. FEXPORT(syscall_exit_partial)
  162. local_irq_disable # make sure need_resched doesn't
  163. # change between and return
  164. LONG_L a2, TI_FLAGS($28) # current->work
  165. li t0, _TIF_ALLWORK_MASK
  166. and t0, a2
  167. beqz t0, restore_partial
  168. SAVE_STATIC
  169. syscall_exit_work:
  170. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  171. andi t0, t0, KU_USER
  172. beqz t0, resume_kernel
  173. li t0, _TIF_WORK_SYSCALL_EXIT
  174. and t0, a2 # a2 is preloaded with TI_FLAGS
  175. beqz t0, work_pending # trace bit set?
  176. local_irq_enable # could let syscall_trace_leave()
  177. # call schedule() instead
  178. move a0, sp
  179. jal syscall_trace_leave
  180. b resume_userspace
  181. #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
  182. /*
  183. * MIPS32R2 Instruction Hazard Barrier - must be called
  184. *
  185. * For C code use the inline version named instruction_hazard().
  186. */
  187. LEAF(mips_ihb)
  188. .set mips32r2
  189. jr.hb ra
  190. nop
  191. END(mips_ihb)
  192. #endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */